1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* 3 * Microsemi MIPS SoC support 4 * 5 * Copyright (c) 2017 Microsemi Corporation 6 */ 7 #include <asm/machine.h> 8 #include <asm/prom.h> 9 10 #define DEVCPU_GCB_CHIP_REGS_CHIP_ID 0x71070000 11 #define CHIP_ID_PART_ID GENMASK(27, 12) 12 13 #define OCELOT_PART_ID (0x7514 << 12) 14 15 #define UART_UART 0x70100000 16 17 static __init bool ocelot_detect(void) 18 { 19 u32 rev; 20 int idx; 21 22 /* Look for the TLB entry set up by redboot before trying to use it */ 23 write_c0_entryhi(DEVCPU_GCB_CHIP_REGS_CHIP_ID); 24 mtc0_tlbw_hazard(); 25 tlb_probe(); 26 tlb_probe_hazard(); 27 idx = read_c0_index(); 28 if (idx < 0) 29 return 0; 30 31 /* A TLB entry exists, lets assume its usable and check the CHIP ID */ 32 rev = __raw_readl((void __iomem *)DEVCPU_GCB_CHIP_REGS_CHIP_ID); 33 34 if ((rev & CHIP_ID_PART_ID) != OCELOT_PART_ID) 35 return 0; 36 37 /* Copy command line from bootloader early for Initrd detection */ 38 if (fw_arg0 < 10 && (fw_arg1 & 0xFFF00000) == 0x80000000) { 39 unsigned int prom_argc = fw_arg0; 40 const char **prom_argv = (const char **)fw_arg1; 41 42 if (prom_argc > 1 && strlen(prom_argv[1]) > 0) 43 /* ignore all built-in args if any f/w args given */ 44 strcpy(arcs_cmdline, prom_argv[1]); 45 } 46 47 return 1; 48 } 49 50 static void __init ocelot_earlyprintk_init(void) 51 { 52 void __iomem *uart_base; 53 54 uart_base = ioremap_nocache(UART_UART, 0x20); 55 setup_8250_early_printk_port((unsigned long)uart_base, 2, 50000); 56 } 57 58 static void __init ocelot_late_init(void) 59 { 60 ocelot_earlyprintk_init(); 61 } 62 63 static __init const void *ocelot_fixup_fdt(const void *fdt, 64 const void *match_data) 65 { 66 /* This has to be done so late because ioremap needs to work */ 67 late_time_init = ocelot_late_init; 68 69 return fdt; 70 } 71 72 extern char __dtb_ocelot_pcb123_begin[]; 73 74 MIPS_MACHINE(ocelot) = { 75 .fdt = __dtb_ocelot_pcb123_begin, 76 .fixup_fdt = ocelot_fixup_fdt, 77 .detect = ocelot_detect, 78 }; 79