1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Support for Ingenic SoCs
4  *
5  * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
6  * Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
7  * Copyright (C) 2020 Paul Cercueil <paul@crapouillou.net>
8  */
9 
10 #include <linux/of_address.h>
11 #include <linux/of_fdt.h>
12 #include <linux/pm.h>
13 #include <linux/sizes.h>
14 #include <linux/suspend.h>
15 #include <linux/types.h>
16 
17 #include <asm/bootinfo.h>
18 #include <asm/machine.h>
19 #include <asm/reboot.h>
20 
21 static __init char *ingenic_get_system_type(unsigned long machtype)
22 {
23 	switch (machtype) {
24 	case MACH_INGENIC_X2000E:
25 		return "X2000E";
26 	case MACH_INGENIC_X2000:
27 		return "X2000";
28 	case MACH_INGENIC_X1830:
29 		return "X1830";
30 	case MACH_INGENIC_X1000E:
31 		return "X1000E";
32 	case MACH_INGENIC_X1000:
33 		return "X1000";
34 	case MACH_INGENIC_JZ4780:
35 		return "JZ4780";
36 	case MACH_INGENIC_JZ4775:
37 		return "JZ4775";
38 	case MACH_INGENIC_JZ4770:
39 		return "JZ4770";
40 	case MACH_INGENIC_JZ4725B:
41 		return "JZ4725B";
42 	default:
43 		return "JZ4740";
44 	}
45 }
46 
47 static __init const void *ingenic_fixup_fdt(const void *fdt, const void *match_data)
48 {
49 	/*
50 	 * Old devicetree files for the qi,lb60 board did not have a /memory
51 	 * node. Hardcode the memory info here.
52 	 */
53 	if (!fdt_node_check_compatible(fdt, 0, "qi,lb60") &&
54 	    fdt_path_offset(fdt, "/memory") < 0)
55 		early_init_dt_add_memory_arch(0, SZ_32M);
56 
57 	mips_machtype = (unsigned long)match_data;
58 	system_type = ingenic_get_system_type(mips_machtype);
59 
60 	return fdt;
61 }
62 
63 static const struct of_device_id ingenic_of_match[] __initconst = {
64 	{ .compatible = "ingenic,jz4740", .data = (void *)MACH_INGENIC_JZ4740 },
65 	{ .compatible = "ingenic,jz4725b", .data = (void *)MACH_INGENIC_JZ4725B },
66 	{ .compatible = "ingenic,jz4770", .data = (void *)MACH_INGENIC_JZ4770 },
67 	{ .compatible = "ingenic,jz4775", .data = (void *)MACH_INGENIC_JZ4775 },
68 	{ .compatible = "ingenic,jz4780", .data = (void *)MACH_INGENIC_JZ4780 },
69 	{ .compatible = "ingenic,x1000", .data = (void *)MACH_INGENIC_X1000 },
70 	{ .compatible = "ingenic,x1000e", .data = (void *)MACH_INGENIC_X1000E },
71 	{ .compatible = "ingenic,x1830", .data = (void *)MACH_INGENIC_X1830 },
72 	{ .compatible = "ingenic,x2000", .data = (void *)MACH_INGENIC_X2000 },
73 	{ .compatible = "ingenic,x2000e", .data = (void *)MACH_INGENIC_X2000E },
74 	{}
75 };
76 
77 MIPS_MACHINE(ingenic) = {
78 	.matches = ingenic_of_match,
79 	.fixup_fdt = ingenic_fixup_fdt,
80 };
81 
82 static void ingenic_wait_instr(void)
83 {
84 	__asm__(".set push;\n"
85 		".set mips3;\n"
86 		"wait;\n"
87 		".set pop;\n"
88 	);
89 }
90 
91 static void ingenic_halt(void)
92 {
93 	for (;;)
94 		ingenic_wait_instr();
95 }
96 
97 static int __maybe_unused ingenic_pm_enter(suspend_state_t state)
98 {
99 	ingenic_wait_instr();
100 
101 	return 0;
102 }
103 
104 static const struct platform_suspend_ops ingenic_pm_ops __maybe_unused = {
105 	.valid = suspend_valid_only_mem,
106 	.enter = ingenic_pm_enter,
107 };
108 
109 static int __init ingenic_pm_init(void)
110 {
111 	if (boot_cpu_type() == CPU_XBURST) {
112 		if (IS_ENABLED(CONFIG_PM_SLEEP))
113 			suspend_set_ops(&ingenic_pm_ops);
114 		_machine_halt = ingenic_halt;
115 	}
116 
117 	return 0;
118 
119 }
120 late_initcall(ingenic_pm_init);
121