1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Support for Ingenic SoCs 4 * 5 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> 6 * Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org> 7 * Copyright (C) 2020 Paul Cercueil <paul@crapouillou.net> 8 */ 9 10 #include <linux/of_address.h> 11 #include <linux/of_fdt.h> 12 #include <linux/pm.h> 13 #include <linux/sizes.h> 14 #include <linux/suspend.h> 15 #include <linux/types.h> 16 17 #include <asm/bootinfo.h> 18 #include <asm/machine.h> 19 #include <asm/reboot.h> 20 21 static __init char *ingenic_get_system_type(unsigned long machtype) 22 { 23 switch (machtype) { 24 case MACH_INGENIC_X1830: 25 return "X1830"; 26 case MACH_INGENIC_X1000: 27 return "X1000"; 28 case MACH_INGENIC_JZ4780: 29 return "JZ4780"; 30 case MACH_INGENIC_JZ4770: 31 return "JZ4770"; 32 case MACH_INGENIC_JZ4725B: 33 return "JZ4725B"; 34 default: 35 return "JZ4740"; 36 } 37 } 38 39 static __init const void *ingenic_fixup_fdt(const void *fdt, const void *match_data) 40 { 41 /* 42 * Old devicetree files for the qi,lb60 board did not have a /memory 43 * node. Hardcode the memory info here. 44 */ 45 if (!fdt_node_check_compatible(fdt, 0, "qi,lb60") && 46 fdt_path_offset(fdt, "/memory") < 0) 47 early_init_dt_add_memory_arch(0, SZ_32M); 48 49 mips_machtype = (unsigned long)match_data; 50 system_type = ingenic_get_system_type(mips_machtype); 51 52 return fdt; 53 } 54 55 static const struct of_device_id ingenic_of_match[] __initconst = { 56 { .compatible = "ingenic,jz4740", .data = (void *)MACH_INGENIC_JZ4740 }, 57 { .compatible = "ingenic,jz4725b", .data = (void *)MACH_INGENIC_JZ4725B }, 58 { .compatible = "ingenic,jz4770", .data = (void *)MACH_INGENIC_JZ4770 }, 59 { .compatible = "ingenic,jz4780", .data = (void *)MACH_INGENIC_JZ4780 }, 60 { .compatible = "ingenic,x1000", .data = (void *)MACH_INGENIC_X1000 }, 61 { .compatible = "ingenic,x1830", .data = (void *)MACH_INGENIC_X1830 }, 62 {} 63 }; 64 65 MIPS_MACHINE(ingenic) = { 66 .matches = ingenic_of_match, 67 .fixup_fdt = ingenic_fixup_fdt, 68 }; 69 70 static void ingenic_wait_instr(void) 71 { 72 __asm__(".set push;\n" 73 ".set mips3;\n" 74 "wait;\n" 75 ".set pop;\n" 76 ); 77 } 78 79 static void ingenic_halt(void) 80 { 81 for (;;) 82 ingenic_wait_instr(); 83 } 84 85 static int __maybe_unused ingenic_pm_enter(suspend_state_t state) 86 { 87 ingenic_wait_instr(); 88 89 return 0; 90 } 91 92 static const struct platform_suspend_ops ingenic_pm_ops __maybe_unused = { 93 .valid = suspend_valid_only_mem, 94 .enter = ingenic_pm_enter, 95 }; 96 97 static int __init ingenic_pm_init(void) 98 { 99 if (boot_cpu_type() == CPU_XBURST) { 100 if (IS_ENABLED(CONFIG_PM_SLEEP)) 101 suspend_set_ops(&ingenic_pm_ops); 102 _machine_halt = ingenic_halt; 103 } 104 105 return 0; 106 107 } 108 late_initcall(ingenic_pm_init); 109