xref: /openbmc/linux/arch/mips/fw/lib/call_o32.S (revision 293d5b43)
1/*
2 *	O32 interface for the 64 (or N32) ABI.
3 *
4 *	Copyright (C) 2002, 2014  Maciej W. Rozycki
5 *
6 *	This program is free software; you can redistribute it and/or
7 *	modify it under the terms of the GNU General Public License
8 *	as published by the Free Software Foundation; either version
9 *	2 of the License, or (at your option) any later version.
10 */
11
12#include <asm/asm.h>
13#include <asm/regdef.h>
14
15/* O32 register size.  */
16#define O32_SZREG	4
17/* Maximum number of arguments supported.  Must be even!  */
18#define O32_ARGC	32
19/* Number of static registers we save.  */
20#define O32_STATC	11
21/* Argument area frame size.  */
22#define O32_ARGSZ	(O32_SZREG * O32_ARGC)
23/* Static register save area frame size.  */
24#define O32_STATSZ	(SZREG * O32_STATC)
25/* Stack pointer register save area frame size.  */
26#define O32_SPSZ	SZREG
27/* Combined area frame size.  */
28#define O32_FRAMESZ	(O32_ARGSZ + O32_SPSZ + O32_STATSZ)
29/* Switched stack frame size.  */
30#define O32_NFRAMESZ	(O32_ARGSZ + O32_SPSZ)
31
32		.text
33
34/*
35 * O32 function call dispatcher, for interfacing 32-bit ROM routines.
36 *
37 * The standard 64 (N32) calling sequence is supported, with a0 holding
38 * a function pointer, a1 a pointer to the new stack to call the
39 * function with or 0 if no stack switching is requested, a2-a7 -- the
40 * function call's first six arguments, and the stack -- the remaining
41 * arguments (up to O32_ARGC, including a2-a7).  Static registers, gp
42 * and fp are preserved, v0 holds the result.  This code relies on the
43 * called o32 function for sp and ra restoration and this dispatcher has
44 * to be placed in a KSEGx (or KUSEG) address space.  Any pointers
45 * passed have to point to addresses within one of these spaces as well.
46 */
47NESTED(call_o32, O32_FRAMESZ, ra)
48		REG_SUBU	sp,O32_FRAMESZ
49
50		REG_S		ra,O32_FRAMESZ-1*SZREG(sp)
51		REG_S		fp,O32_FRAMESZ-2*SZREG(sp)
52		REG_S		gp,O32_FRAMESZ-3*SZREG(sp)
53		REG_S		s7,O32_FRAMESZ-4*SZREG(sp)
54		REG_S		s6,O32_FRAMESZ-5*SZREG(sp)
55		REG_S		s5,O32_FRAMESZ-6*SZREG(sp)
56		REG_S		s4,O32_FRAMESZ-7*SZREG(sp)
57		REG_S		s3,O32_FRAMESZ-8*SZREG(sp)
58		REG_S		s2,O32_FRAMESZ-9*SZREG(sp)
59		REG_S		s1,O32_FRAMESZ-10*SZREG(sp)
60		REG_S		s0,O32_FRAMESZ-11*SZREG(sp)
61
62		move		jp,a0
63
64		move		fp,sp
65		beqz		a1,0f
66		REG_SUBU	fp,a1,O32_NFRAMESZ
670:
68		REG_S		sp,O32_NFRAMESZ-1*SZREG(fp)
69
70		sll		a0,a2,zero
71		sll		a1,a3,zero
72		sll		a2,a4,zero
73		sll		a3,a5,zero
74		sw		a6,4*O32_SZREG(fp)
75		sw		a7,5*O32_SZREG(fp)
76
77		PTR_LA		t0,O32_FRAMESZ(sp)
78		PTR_LA		t1,6*O32_SZREG(fp)
79		li		t2,O32_ARGC-6
801:
81		lw		t3,(t0)
82		REG_ADDU	t0,SZREG
83		sw		t3,(t1)
84		REG_SUBU	t2,1
85		REG_ADDU	t1,O32_SZREG
86		bnez		t2,1b
87
88		move		sp,fp
89
90		jalr		jp
91
92		REG_L		sp,O32_NFRAMESZ-1*SZREG(sp)
93
94		REG_L		s0,O32_FRAMESZ-11*SZREG(sp)
95		REG_L		s1,O32_FRAMESZ-10*SZREG(sp)
96		REG_L		s2,O32_FRAMESZ-9*SZREG(sp)
97		REG_L		s3,O32_FRAMESZ-8*SZREG(sp)
98		REG_L		s4,O32_FRAMESZ-7*SZREG(sp)
99		REG_L		s5,O32_FRAMESZ-6*SZREG(sp)
100		REG_L		s6,O32_FRAMESZ-5*SZREG(sp)
101		REG_L		s7,O32_FRAMESZ-4*SZREG(sp)
102		REG_L		gp,O32_FRAMESZ-3*SZREG(sp)
103		REG_L		fp,O32_FRAMESZ-2*SZREG(sp)
104		REG_L		ra,O32_FRAMESZ-1*SZREG(sp)
105
106		REG_ADDU	sp,O32_FRAMESZ
107		jr		ra
108END(call_o32)
109