1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1996 David S. Miller (dm@sgi.com) 7 * Compatibility with board caches, Ulf Carlsson 8 */ 9 #include <linux/kernel.h> 10 #include <asm/sgialib.h> 11 #include <asm/bcache.h> 12 #include <asm/setup.h> 13 14 /* 15 * IP22 boardcache is not compatible with board caches. Thus we disable it 16 * during romvec action. Since r4xx0.c is always compiled and linked with your 17 * kernel, this shouldn't cause any harm regardless what MIPS processor you 18 * have. 19 * 20 * The ARC write and read functions seem to interfere with the serial lines 21 * in some way. You should be careful with them. 22 */ 23 24 void prom_putchar(char c) 25 { 26 ULONG cnt; 27 CHAR it = c; 28 29 bc_disable(); 30 ArcWrite(1, &it, 1, &cnt); 31 bc_enable(); 32 } 33 34 char prom_getchar(void) 35 { 36 ULONG cnt; 37 CHAR c; 38 39 bc_disable(); 40 ArcRead(0, &c, 1, &cnt); 41 bc_enable(); 42 43 return c; 44 } 45