1 /* 2 * linux/arch/mips/dec/ioasic-irq.c 3 * 4 * DEC I/O ASIC interrupts. 5 * 6 * Copyright (c) 2002, 2003 Maciej W. Rozycki 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 11 * 2 of the License, or (at your option) any later version. 12 */ 13 14 #include <linux/init.h> 15 #include <linux/irq.h> 16 #include <linux/types.h> 17 18 #include <asm/dec/ioasic.h> 19 #include <asm/dec/ioasic_addrs.h> 20 #include <asm/dec/ioasic_ints.h> 21 22 23 static int ioasic_irq_base; 24 25 26 static inline void unmask_ioasic_irq(unsigned int irq) 27 { 28 u32 simr; 29 30 simr = ioasic_read(IO_REG_SIMR); 31 simr |= (1 << (irq - ioasic_irq_base)); 32 ioasic_write(IO_REG_SIMR, simr); 33 } 34 35 static inline void mask_ioasic_irq(unsigned int irq) 36 { 37 u32 simr; 38 39 simr = ioasic_read(IO_REG_SIMR); 40 simr &= ~(1 << (irq - ioasic_irq_base)); 41 ioasic_write(IO_REG_SIMR, simr); 42 } 43 44 static inline void clear_ioasic_irq(unsigned int irq) 45 { 46 u32 sir; 47 48 sir = ~(1 << (irq - ioasic_irq_base)); 49 ioasic_write(IO_REG_SIR, sir); 50 } 51 52 static inline void ack_ioasic_irq(unsigned int irq) 53 { 54 mask_ioasic_irq(irq); 55 fast_iob(); 56 } 57 58 static inline void end_ioasic_irq(unsigned int irq) 59 { 60 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 61 unmask_ioasic_irq(irq); 62 } 63 64 static struct irq_chip ioasic_irq_type = { 65 .name = "IO-ASIC", 66 .ack = ack_ioasic_irq, 67 .mask = mask_ioasic_irq, 68 .mask_ack = ack_ioasic_irq, 69 .unmask = unmask_ioasic_irq, 70 }; 71 72 73 #define unmask_ioasic_dma_irq unmask_ioasic_irq 74 75 #define mask_ioasic_dma_irq mask_ioasic_irq 76 77 #define ack_ioasic_dma_irq ack_ioasic_irq 78 79 static inline void end_ioasic_dma_irq(unsigned int irq) 80 { 81 clear_ioasic_irq(irq); 82 fast_iob(); 83 end_ioasic_irq(irq); 84 } 85 86 static struct irq_chip ioasic_dma_irq_type = { 87 .name = "IO-ASIC-DMA", 88 .ack = ack_ioasic_dma_irq, 89 .mask = mask_ioasic_dma_irq, 90 .mask_ack = ack_ioasic_dma_irq, 91 .unmask = unmask_ioasic_dma_irq, 92 .end = end_ioasic_dma_irq, 93 }; 94 95 96 void __init init_ioasic_irqs(int base) 97 { 98 int i; 99 100 /* Mask interrupts. */ 101 ioasic_write(IO_REG_SIMR, 0); 102 fast_iob(); 103 104 for (i = base; i < base + IO_INR_DMA; i++) 105 set_irq_chip_and_handler(i, &ioasic_irq_type, 106 handle_level_irq); 107 for (; i < base + IO_IRQ_LINES; i++) 108 set_irq_chip(i, &ioasic_dma_irq_type); 109 110 ioasic_irq_base = base; 111 } 112