1 /* 2 * Setup pointers to hardware dependent routines. 3 * 4 * This file is subject to the terms and conditions of the GNU General Public 5 * License. See the file "COPYING" in the main directory of this archive 6 * for more details. 7 * 8 * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org) 9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv) 10 * 11 */ 12 #include <linux/config.h> 13 #include <linux/interrupt.h> 14 #include <linux/pci.h> 15 #include <linux/init.h> 16 #include <linux/serial.h> 17 #include <linux/serial_core.h> 18 19 #include <asm/bootinfo.h> 20 #include <asm/time.h> 21 #include <asm/io.h> 22 #include <asm/irq.h> 23 #include <asm/processor.h> 24 #include <asm/reboot.h> 25 #include <asm/gt64120.h> 26 #include <asm/serial.h> 27 28 #include <asm/cobalt/cobalt.h> 29 30 extern void cobalt_machine_restart(char *command); 31 extern void cobalt_machine_halt(void); 32 extern void cobalt_machine_power_off(void); 33 34 int cobalt_board_id; 35 36 const char *get_system_type(void) 37 { 38 switch (cobalt_board_id) { 39 case COBALT_BRD_ID_QUBE1: 40 return "Cobalt Qube"; 41 case COBALT_BRD_ID_RAQ1: 42 return "Cobalt RaQ"; 43 case COBALT_BRD_ID_QUBE2: 44 return "Cobalt Qube2"; 45 case COBALT_BRD_ID_RAQ2: 46 return "Cobalt RaQ2"; 47 } 48 return "MIPS Cobalt"; 49 } 50 51 static void __init cobalt_timer_setup(struct irqaction *irq) 52 { 53 /* Load timer value for 1KHz (TCLK is 50MHz) */ 54 GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS); 55 56 /* Enable timer */ 57 GALILEO_OUTL(GALILEO_ENTC0 | GALILEO_SELTC0, GT_TC_CONTROL_OFS); 58 59 /* Register interrupt */ 60 setup_irq(COBALT_GALILEO_IRQ, irq); 61 62 /* Enable interrupt */ 63 GALILEO_OUTL(GALILEO_INTR_T0EXP | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS); 64 } 65 66 extern struct pci_ops gt64111_pci_ops; 67 68 static struct resource cobalt_mem_resource = { 69 "PCI memory", GT64111_MEM_BASE, GT64111_MEM_END, IORESOURCE_MEM 70 }; 71 72 static struct resource cobalt_io_resource = { 73 "PCI I/O", 0x1000, 0xffff, IORESOURCE_IO 74 }; 75 76 static struct resource cobalt_io_resources[] = { 77 { "dma1", 0x00, 0x1f, IORESOURCE_BUSY }, 78 { "timer", 0x40, 0x5f, IORESOURCE_BUSY }, 79 { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY }, 80 { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY }, 81 { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY }, 82 }; 83 84 #define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource)) 85 86 static struct pci_controller cobalt_pci_controller = { 87 .pci_ops = >64111_pci_ops, 88 .mem_resource = &cobalt_mem_resource, 89 .mem_offset = 0, 90 .io_resource = &cobalt_io_resource, 91 .io_offset = 0 - GT64111_IO_BASE 92 }; 93 94 void __init plat_setup(void) 95 { 96 static struct uart_port uart; 97 unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0); 98 int i; 99 100 _machine_restart = cobalt_machine_restart; 101 _machine_halt = cobalt_machine_halt; 102 _machine_power_off = cobalt_machine_power_off; 103 104 board_timer_setup = cobalt_timer_setup; 105 106 set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE)); 107 108 /* I/O port resource must include UART and LCD/buttons */ 109 ioport_resource.end = 0x0fffffff; 110 111 /* 112 * This is a prom style console. We just poke at the 113 * UART to make it talk. 114 * Only use this console if you really screw up and can't 115 * get to the stage of setting up a real serial console. 116 */ 117 /*ns16550_setup_console();*/ 118 119 /* request I/O space for devices used on all i[345]86 PCs */ 120 for (i = 0; i < COBALT_IO_RESOURCES; i++) 121 request_resource(&ioport_resource, cobalt_io_resources + i); 122 123 /* Read the cobalt id register out of the PCI config space */ 124 PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3)); 125 cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS); 126 cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8); 127 cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id); 128 129 printk("Cobalt board ID: %d\n", cobalt_board_id); 130 131 #ifdef CONFIG_PCI 132 register_pci_controller(&cobalt_pci_controller); 133 #endif 134 135 #ifdef CONFIG_SERIAL_8250 136 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) { 137 138 uart.line = 0; 139 uart.type = PORT_UNKNOWN; 140 uart.uartclk = 18432000; 141 uart.irq = COBALT_SERIAL_IRQ; 142 uart.flags = STD_COM_FLAGS; 143 uart.iobase = 0xc800000; 144 uart.iotype = UPIO_PORT; 145 146 early_serial_setup(&uart); 147 } 148 #endif 149 } 150 151 /* 152 * Prom init. We read our one and only communication with the firmware. 153 * Grab the amount of installed memory. 154 * Better boot loaders (CoLo) pass a command line too :-) 155 */ 156 157 void __init prom_init(void) 158 { 159 int narg, indx, posn, nchr; 160 unsigned long memsz; 161 char **argv; 162 163 mips_machgroup = MACH_GROUP_COBALT; 164 165 memsz = fw_arg0 & 0x7fff0000; 166 narg = fw_arg0 & 0x0000ffff; 167 168 if (narg) { 169 arcs_cmdline[0] = '\0'; 170 argv = (char **) fw_arg1; 171 posn = 0; 172 for (indx = 1; indx < narg; ++indx) { 173 nchr = strlen(argv[indx]); 174 if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline)) 175 break; 176 if (posn) 177 arcs_cmdline[posn++] = ' '; 178 strcpy(arcs_cmdline + posn, argv[indx]); 179 posn += nchr; 180 } 181 } 182 183 add_memory_region(0x0, memsz, BOOT_MEM_RAM); 184 } 185 186 unsigned long __init prom_free_prom_memory(void) 187 { 188 /* Nothing to do! */ 189 return 0; 190 } 191