1af866496SDavid Daney /***********************license start***************
2af866496SDavid Daney  * Author: Cavium Networks
3af866496SDavid Daney  *
4af866496SDavid Daney  * Contact: support@caviumnetworks.com
5af866496SDavid Daney  * This file is part of the OCTEON SDK
6af866496SDavid Daney  *
7af866496SDavid Daney  * Copyright (c) 2003-2009 Cavium Networks
8af866496SDavid Daney  *
9af866496SDavid Daney  * This file is free software; you can redistribute it and/or modify
10af866496SDavid Daney  * it under the terms of the GNU General Public License, Version 2, as
11af866496SDavid Daney  * published by the Free Software Foundation.
12af866496SDavid Daney  *
13af866496SDavid Daney  * This file is distributed in the hope that it will be useful, but
14af866496SDavid Daney  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15af866496SDavid Daney  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16af866496SDavid Daney  * NONINFRINGEMENT.  See the GNU General Public License for more
17af866496SDavid Daney  * details.
18af866496SDavid Daney  *
19af866496SDavid Daney  * You should have received a copy of the GNU General Public License
20af866496SDavid Daney  * along with this file; if not, write to the Free Software
21af866496SDavid Daney  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22af866496SDavid Daney  * or visit http://www.gnu.org/licenses/.
23af866496SDavid Daney  *
24af866496SDavid Daney  * This file may also be available under a different license from Cavium.
25af866496SDavid Daney  * Contact Cavium Networks for more information
26af866496SDavid Daney  ***********************license end**************************************/
27af866496SDavid Daney 
28af866496SDavid Daney /*
29af866496SDavid Daney  *
30af866496SDavid Daney  * Automatically generated functions useful for enabling
31af866496SDavid Daney  * and decoding RSL_INT_BLOCKS interrupts.
32af866496SDavid Daney  *
33af866496SDavid Daney  */
34af866496SDavid Daney 
35af866496SDavid Daney #include <asm/octeon/octeon.h>
36af866496SDavid Daney 
37af866496SDavid Daney #include <asm/octeon/cvmx-gmxx-defs.h>
38af866496SDavid Daney #include <asm/octeon/cvmx-pcsx-defs.h>
39af866496SDavid Daney #include <asm/octeon/cvmx-pcsxx-defs.h>
40af866496SDavid Daney #include <asm/octeon/cvmx-spxx-defs.h>
41af866496SDavid Daney #include <asm/octeon/cvmx-stxx-defs.h>
42af866496SDavid Daney 
43af866496SDavid Daney #ifndef PRINT_ERROR
44af866496SDavid Daney #define PRINT_ERROR(format, ...)
45af866496SDavid Daney #endif
46af866496SDavid Daney 
47af866496SDavid Daney 
48af866496SDavid Daney /**
49*faff43daSRandy Dunlap  * __cvmx_interrupt_gmxx_rxx_int_en_enable - enable all interrupt bits in cvmx_gmxx_rxx_int_en_t
50*faff43daSRandy Dunlap  * @index: interrupt register offset
51*faff43daSRandy Dunlap  * @block: interrupt register block_id
52af866496SDavid Daney  */
__cvmx_interrupt_gmxx_rxx_int_en_enable(int index,int block)53af866496SDavid Daney void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
54af866496SDavid Daney {
55af866496SDavid Daney 	union cvmx_gmxx_rxx_int_en gmx_rx_int_en;
56af866496SDavid Daney 	cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, block),
57af866496SDavid Daney 		       cvmx_read_csr(CVMX_GMXX_RXX_INT_REG(index, block)));
58af866496SDavid Daney 	gmx_rx_int_en.u64 = 0;
59af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN56XX)) {
60af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_29_63 */
61af866496SDavid Daney 		gmx_rx_int_en.s.hg2cc = 1;
62af866496SDavid Daney 		gmx_rx_int_en.s.hg2fld = 1;
63af866496SDavid Daney 		gmx_rx_int_en.s.undat = 1;
64af866496SDavid Daney 		gmx_rx_int_en.s.uneop = 1;
65af866496SDavid Daney 		gmx_rx_int_en.s.unsop = 1;
66af866496SDavid Daney 		gmx_rx_int_en.s.bad_term = 1;
67af866496SDavid Daney 		gmx_rx_int_en.s.bad_seq = 1;
68af866496SDavid Daney 		gmx_rx_int_en.s.rem_fault = 1;
69af866496SDavid Daney 		gmx_rx_int_en.s.loc_fault = 1;
70af866496SDavid Daney 		gmx_rx_int_en.s.pause_drp = 1;
71af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_16_18 */
72af866496SDavid Daney 		/*gmx_rx_int_en.s.ifgerr = 1; */
7392a76f6dSAdam Buchbinder 		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
74af866496SDavid Daney 		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
75af866496SDavid Daney 		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
76af866496SDavid Daney 		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
77af866496SDavid Daney 		gmx_rx_int_en.s.ovrerr = 1;
78af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_9_9 */
79af866496SDavid Daney 		gmx_rx_int_en.s.skperr = 1;
80af866496SDavid Daney 		gmx_rx_int_en.s.rcverr = 1;
81af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_5_6 */
82af866496SDavid Daney 		/*gmx_rx_int_en.s.fcserr = 1; // FCS errors are handled when we get work */
83af866496SDavid Daney 		gmx_rx_int_en.s.jabber = 1;
84af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_2_2 */
85af866496SDavid Daney 		gmx_rx_int_en.s.carext = 1;
86af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_0_0 */
87af866496SDavid Daney 	}
88af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN30XX)) {
89af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_19_63 */
90af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_dupx = 1; */
91af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_spd = 1; */
92af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_link = 1; */
93af866496SDavid Daney 		/*gmx_rx_int_en.s.ifgerr = 1; */
9492a76f6dSAdam Buchbinder 		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
95af866496SDavid Daney 		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
96af866496SDavid Daney 		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
97af866496SDavid Daney 		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
98af866496SDavid Daney 		gmx_rx_int_en.s.ovrerr = 1;
99af866496SDavid Daney 		gmx_rx_int_en.s.niberr = 1;
100af866496SDavid Daney 		gmx_rx_int_en.s.skperr = 1;
101af866496SDavid Daney 		gmx_rx_int_en.s.rcverr = 1;
102af866496SDavid Daney 		/*gmx_rx_int_en.s.lenerr = 1; // Length errors are handled when we get work */
103af866496SDavid Daney 		gmx_rx_int_en.s.alnerr = 1;
104af866496SDavid Daney 		/*gmx_rx_int_en.s.fcserr = 1; // FCS errors are handled when we get work */
105af866496SDavid Daney 		gmx_rx_int_en.s.jabber = 1;
106af866496SDavid Daney 		gmx_rx_int_en.s.maxerr = 1;
107af866496SDavid Daney 		gmx_rx_int_en.s.carext = 1;
108af866496SDavid Daney 		gmx_rx_int_en.s.minerr = 1;
109af866496SDavid Daney 	}
110af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN50XX)) {
111af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_20_63 */
112af866496SDavid Daney 		gmx_rx_int_en.s.pause_drp = 1;
113af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_dupx = 1; */
114af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_spd = 1; */
115af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_link = 1; */
116af866496SDavid Daney 		/*gmx_rx_int_en.s.ifgerr = 1; */
11792a76f6dSAdam Buchbinder 		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
118af866496SDavid Daney 		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
119af866496SDavid Daney 		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
120af866496SDavid Daney 		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
121af866496SDavid Daney 		gmx_rx_int_en.s.ovrerr = 1;
122af866496SDavid Daney 		gmx_rx_int_en.s.niberr = 1;
123af866496SDavid Daney 		gmx_rx_int_en.s.skperr = 1;
124af866496SDavid Daney 		gmx_rx_int_en.s.rcverr = 1;
125af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_6_6 */
126af866496SDavid Daney 		gmx_rx_int_en.s.alnerr = 1;
127af866496SDavid Daney 		/*gmx_rx_int_en.s.fcserr = 1; // FCS errors are handled when we get work */
128af866496SDavid Daney 		gmx_rx_int_en.s.jabber = 1;
129af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_2_2 */
130af866496SDavid Daney 		gmx_rx_int_en.s.carext = 1;
131af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_0_0 */
132af866496SDavid Daney 	}
133af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN38XX)) {
134af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_19_63 */
135af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_dupx = 1; */
136af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_spd = 1; */
137af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_link = 1; */
138af866496SDavid Daney 		/*gmx_rx_int_en.s.ifgerr = 1; */
13992a76f6dSAdam Buchbinder 		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
140af866496SDavid Daney 		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
141af866496SDavid Daney 		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
142af866496SDavid Daney 		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
143af866496SDavid Daney 		gmx_rx_int_en.s.ovrerr = 1;
144af866496SDavid Daney 		gmx_rx_int_en.s.niberr = 1;
145af866496SDavid Daney 		gmx_rx_int_en.s.skperr = 1;
146af866496SDavid Daney 		gmx_rx_int_en.s.rcverr = 1;
147af866496SDavid Daney 		/*gmx_rx_int_en.s.lenerr = 1; // Length errors are handled when we get work */
148af866496SDavid Daney 		gmx_rx_int_en.s.alnerr = 1;
149af866496SDavid Daney 		/*gmx_rx_int_en.s.fcserr = 1; // FCS errors are handled when we get work */
150af866496SDavid Daney 		gmx_rx_int_en.s.jabber = 1;
151af866496SDavid Daney 		gmx_rx_int_en.s.maxerr = 1;
152af866496SDavid Daney 		gmx_rx_int_en.s.carext = 1;
153af866496SDavid Daney 		gmx_rx_int_en.s.minerr = 1;
154af866496SDavid Daney 	}
155af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN31XX)) {
156af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_19_63 */
157af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_dupx = 1; */
158af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_spd = 1; */
159af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_link = 1; */
160af866496SDavid Daney 		/*gmx_rx_int_en.s.ifgerr = 1; */
16192a76f6dSAdam Buchbinder 		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
162af866496SDavid Daney 		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
163af866496SDavid Daney 		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
164af866496SDavid Daney 		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
165af866496SDavid Daney 		gmx_rx_int_en.s.ovrerr = 1;
166af866496SDavid Daney 		gmx_rx_int_en.s.niberr = 1;
167af866496SDavid Daney 		gmx_rx_int_en.s.skperr = 1;
168af866496SDavid Daney 		gmx_rx_int_en.s.rcverr = 1;
169af866496SDavid Daney 		/*gmx_rx_int_en.s.lenerr = 1; // Length errors are handled when we get work */
170af866496SDavid Daney 		gmx_rx_int_en.s.alnerr = 1;
171af866496SDavid Daney 		/*gmx_rx_int_en.s.fcserr = 1; // FCS errors are handled when we get work */
172af866496SDavid Daney 		gmx_rx_int_en.s.jabber = 1;
173af866496SDavid Daney 		gmx_rx_int_en.s.maxerr = 1;
174af866496SDavid Daney 		gmx_rx_int_en.s.carext = 1;
175af866496SDavid Daney 		gmx_rx_int_en.s.minerr = 1;
176af866496SDavid Daney 	}
177af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN58XX)) {
178af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_20_63 */
179af866496SDavid Daney 		gmx_rx_int_en.s.pause_drp = 1;
180af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_dupx = 1; */
181af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_spd = 1; */
182af866496SDavid Daney 		/*gmx_rx_int_en.s.phy_link = 1; */
183af866496SDavid Daney 		/*gmx_rx_int_en.s.ifgerr = 1; */
18492a76f6dSAdam Buchbinder 		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
185af866496SDavid Daney 		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
186af866496SDavid Daney 		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
187af866496SDavid Daney 		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
188af866496SDavid Daney 		gmx_rx_int_en.s.ovrerr = 1;
189af866496SDavid Daney 		gmx_rx_int_en.s.niberr = 1;
190af866496SDavid Daney 		gmx_rx_int_en.s.skperr = 1;
191af866496SDavid Daney 		gmx_rx_int_en.s.rcverr = 1;
192af866496SDavid Daney 		/*gmx_rx_int_en.s.lenerr = 1; // Length errors are handled when we get work */
193af866496SDavid Daney 		gmx_rx_int_en.s.alnerr = 1;
194af866496SDavid Daney 		/*gmx_rx_int_en.s.fcserr = 1; // FCS errors are handled when we get work */
195af866496SDavid Daney 		gmx_rx_int_en.s.jabber = 1;
196af866496SDavid Daney 		gmx_rx_int_en.s.maxerr = 1;
197af866496SDavid Daney 		gmx_rx_int_en.s.carext = 1;
198af866496SDavid Daney 		gmx_rx_int_en.s.minerr = 1;
199af866496SDavid Daney 	}
200af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN52XX)) {
201af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_29_63 */
202af866496SDavid Daney 		gmx_rx_int_en.s.hg2cc = 1;
203af866496SDavid Daney 		gmx_rx_int_en.s.hg2fld = 1;
204af866496SDavid Daney 		gmx_rx_int_en.s.undat = 1;
205af866496SDavid Daney 		gmx_rx_int_en.s.uneop = 1;
206af866496SDavid Daney 		gmx_rx_int_en.s.unsop = 1;
207af866496SDavid Daney 		gmx_rx_int_en.s.bad_term = 1;
208af866496SDavid Daney 		gmx_rx_int_en.s.bad_seq = 0;
209af866496SDavid Daney 		gmx_rx_int_en.s.rem_fault = 1;
210af866496SDavid Daney 		gmx_rx_int_en.s.loc_fault = 0;
211af866496SDavid Daney 		gmx_rx_int_en.s.pause_drp = 1;
212af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_16_18 */
213af866496SDavid Daney 		/*gmx_rx_int_en.s.ifgerr = 1; */
21492a76f6dSAdam Buchbinder 		/*gmx_rx_int_en.s.coldet = 1; // Collision detect */
215af866496SDavid Daney 		/*gmx_rx_int_en.s.falerr = 1; // False carrier error or extend error after slottime */
216af866496SDavid Daney 		/*gmx_rx_int_en.s.rsverr = 1; // RGMII reserved opcodes */
217af866496SDavid Daney 		/*gmx_rx_int_en.s.pcterr = 1; // Bad Preamble / Protocol */
218af866496SDavid Daney 		gmx_rx_int_en.s.ovrerr = 1;
219af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_9_9 */
220af866496SDavid Daney 		gmx_rx_int_en.s.skperr = 1;
221af866496SDavid Daney 		gmx_rx_int_en.s.rcverr = 1;
222af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_5_6 */
223af866496SDavid Daney 		/*gmx_rx_int_en.s.fcserr = 1; // FCS errors are handled when we get work */
224af866496SDavid Daney 		gmx_rx_int_en.s.jabber = 1;
225af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_2_2 */
226af866496SDavid Daney 		gmx_rx_int_en.s.carext = 1;
227af866496SDavid Daney 		/* Skipping gmx_rx_int_en.s.reserved_0_0 */
228af866496SDavid Daney 	}
229af866496SDavid Daney 	cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, block), gmx_rx_int_en.u64);
230af866496SDavid Daney }
231af866496SDavid Daney /**
232*faff43daSRandy Dunlap  * __cvmx_interrupt_pcsx_intx_en_reg_enable - enable all interrupt bits in cvmx_pcsx_intx_en_reg_t
233*faff43daSRandy Dunlap  * @index: interrupt register offset
234*faff43daSRandy Dunlap  * @block: interrupt register block_id
235af866496SDavid Daney  */
__cvmx_interrupt_pcsx_intx_en_reg_enable(int index,int block)236af866496SDavid Daney void __cvmx_interrupt_pcsx_intx_en_reg_enable(int index, int block)
237af866496SDavid Daney {
238af866496SDavid Daney 	union cvmx_pcsx_intx_en_reg pcs_int_en_reg;
239af866496SDavid Daney 	cvmx_write_csr(CVMX_PCSX_INTX_REG(index, block),
240af866496SDavid Daney 		       cvmx_read_csr(CVMX_PCSX_INTX_REG(index, block)));
241af866496SDavid Daney 	pcs_int_en_reg.u64 = 0;
242af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN56XX)) {
243af866496SDavid Daney 		/* Skipping pcs_int_en_reg.s.reserved_12_63 */
244af866496SDavid Daney 		/*pcs_int_en_reg.s.dup = 1; // This happens during normal operation */
245af866496SDavid Daney 		pcs_int_en_reg.s.sync_bad_en = 1;
246af866496SDavid Daney 		pcs_int_en_reg.s.an_bad_en = 1;
247af866496SDavid Daney 		pcs_int_en_reg.s.rxlock_en = 1;
248af866496SDavid Daney 		pcs_int_en_reg.s.rxbad_en = 1;
249af866496SDavid Daney 		/*pcs_int_en_reg.s.rxerr_en = 1; // This happens during normal operation */
250af866496SDavid Daney 		pcs_int_en_reg.s.txbad_en = 1;
251af866496SDavid Daney 		pcs_int_en_reg.s.txfifo_en = 1;
252af866496SDavid Daney 		pcs_int_en_reg.s.txfifu_en = 1;
253af866496SDavid Daney 		pcs_int_en_reg.s.an_err_en = 1;
254af866496SDavid Daney 		/*pcs_int_en_reg.s.xmit_en = 1; // This happens during normal operation */
255af866496SDavid Daney 		/*pcs_int_en_reg.s.lnkspd_en = 1; // This happens during normal operation */
256af866496SDavid Daney 	}
257af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN52XX)) {
258af866496SDavid Daney 		/* Skipping pcs_int_en_reg.s.reserved_12_63 */
259af866496SDavid Daney 		/*pcs_int_en_reg.s.dup = 1; // This happens during normal operation */
260af866496SDavid Daney 		pcs_int_en_reg.s.sync_bad_en = 1;
261af866496SDavid Daney 		pcs_int_en_reg.s.an_bad_en = 1;
262af866496SDavid Daney 		pcs_int_en_reg.s.rxlock_en = 1;
263af866496SDavid Daney 		pcs_int_en_reg.s.rxbad_en = 1;
264af866496SDavid Daney 		/*pcs_int_en_reg.s.rxerr_en = 1; // This happens during normal operation */
265af866496SDavid Daney 		pcs_int_en_reg.s.txbad_en = 1;
266af866496SDavid Daney 		pcs_int_en_reg.s.txfifo_en = 1;
267af866496SDavid Daney 		pcs_int_en_reg.s.txfifu_en = 1;
268af866496SDavid Daney 		pcs_int_en_reg.s.an_err_en = 1;
269af866496SDavid Daney 		/*pcs_int_en_reg.s.xmit_en = 1; // This happens during normal operation */
270af866496SDavid Daney 		/*pcs_int_en_reg.s.lnkspd_en = 1; // This happens during normal operation */
271af866496SDavid Daney 	}
272af866496SDavid Daney 	cvmx_write_csr(CVMX_PCSX_INTX_EN_REG(index, block), pcs_int_en_reg.u64);
273af866496SDavid Daney }
274af866496SDavid Daney /**
275*faff43daSRandy Dunlap  * __cvmx_interrupt_pcsxx_int_en_reg_enable - enable all interrupt bits in cvmx_pcsxx_int_en_reg_t
276*faff43daSRandy Dunlap  * @index: interrupt register block_id
277af866496SDavid Daney  */
__cvmx_interrupt_pcsxx_int_en_reg_enable(int index)278af866496SDavid Daney void __cvmx_interrupt_pcsxx_int_en_reg_enable(int index)
279af866496SDavid Daney {
280af866496SDavid Daney 	union cvmx_pcsxx_int_en_reg pcsx_int_en_reg;
281af866496SDavid Daney 	cvmx_write_csr(CVMX_PCSXX_INT_REG(index),
282af866496SDavid Daney 		       cvmx_read_csr(CVMX_PCSXX_INT_REG(index)));
283af866496SDavid Daney 	pcsx_int_en_reg.u64 = 0;
284af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN56XX)) {
285af866496SDavid Daney 		/* Skipping pcsx_int_en_reg.s.reserved_6_63 */
286af866496SDavid Daney 		pcsx_int_en_reg.s.algnlos_en = 1;
287af866496SDavid Daney 		pcsx_int_en_reg.s.synlos_en = 1;
288af866496SDavid Daney 		pcsx_int_en_reg.s.bitlckls_en = 1;
289af866496SDavid Daney 		pcsx_int_en_reg.s.rxsynbad_en = 1;
290af866496SDavid Daney 		pcsx_int_en_reg.s.rxbad_en = 1;
291af866496SDavid Daney 		pcsx_int_en_reg.s.txflt_en = 1;
292af866496SDavid Daney 	}
293af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN52XX)) {
294af866496SDavid Daney 		/* Skipping pcsx_int_en_reg.s.reserved_6_63 */
295af866496SDavid Daney 		pcsx_int_en_reg.s.algnlos_en = 1;
296af866496SDavid Daney 		pcsx_int_en_reg.s.synlos_en = 1;
297af866496SDavid Daney 		pcsx_int_en_reg.s.bitlckls_en = 0;	/* Happens if XAUI module is not installed */
298af866496SDavid Daney 		pcsx_int_en_reg.s.rxsynbad_en = 1;
299af866496SDavid Daney 		pcsx_int_en_reg.s.rxbad_en = 1;
300af866496SDavid Daney 		pcsx_int_en_reg.s.txflt_en = 1;
301af866496SDavid Daney 	}
302af866496SDavid Daney 	cvmx_write_csr(CVMX_PCSXX_INT_EN_REG(index), pcsx_int_en_reg.u64);
303af866496SDavid Daney }
304af866496SDavid Daney 
305af866496SDavid Daney /**
306*faff43daSRandy Dunlap  * __cvmx_interrupt_spxx_int_msk_enable - enable all interrupt bits in cvmx_spxx_int_msk_t
307*faff43daSRandy Dunlap  * @index: interrupt register block_id
308af866496SDavid Daney  */
__cvmx_interrupt_spxx_int_msk_enable(int index)309af866496SDavid Daney void __cvmx_interrupt_spxx_int_msk_enable(int index)
310af866496SDavid Daney {
311af866496SDavid Daney 	union cvmx_spxx_int_msk spx_int_msk;
312af866496SDavid Daney 	cvmx_write_csr(CVMX_SPXX_INT_REG(index),
313af866496SDavid Daney 		       cvmx_read_csr(CVMX_SPXX_INT_REG(index)));
314af866496SDavid Daney 	spx_int_msk.u64 = 0;
315af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN38XX)) {
316af866496SDavid Daney 		/* Skipping spx_int_msk.s.reserved_12_63 */
317af866496SDavid Daney 		spx_int_msk.s.calerr = 1;
318af866496SDavid Daney 		spx_int_msk.s.syncerr = 1;
319af866496SDavid Daney 		spx_int_msk.s.diperr = 1;
320af866496SDavid Daney 		spx_int_msk.s.tpaovr = 1;
321af866496SDavid Daney 		spx_int_msk.s.rsverr = 1;
322af866496SDavid Daney 		spx_int_msk.s.drwnng = 1;
323af866496SDavid Daney 		spx_int_msk.s.clserr = 1;
324af866496SDavid Daney 		spx_int_msk.s.spiovr = 1;
325af866496SDavid Daney 		/* Skipping spx_int_msk.s.reserved_2_3 */
326af866496SDavid Daney 		spx_int_msk.s.abnorm = 1;
327af866496SDavid Daney 		spx_int_msk.s.prtnxa = 1;
328af866496SDavid Daney 	}
329af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN58XX)) {
330af866496SDavid Daney 		/* Skipping spx_int_msk.s.reserved_12_63 */
331af866496SDavid Daney 		spx_int_msk.s.calerr = 1;
332af866496SDavid Daney 		spx_int_msk.s.syncerr = 1;
333af866496SDavid Daney 		spx_int_msk.s.diperr = 1;
334af866496SDavid Daney 		spx_int_msk.s.tpaovr = 1;
335af866496SDavid Daney 		spx_int_msk.s.rsverr = 1;
336af866496SDavid Daney 		spx_int_msk.s.drwnng = 1;
337af866496SDavid Daney 		spx_int_msk.s.clserr = 1;
338af866496SDavid Daney 		spx_int_msk.s.spiovr = 1;
339af866496SDavid Daney 		/* Skipping spx_int_msk.s.reserved_2_3 */
340af866496SDavid Daney 		spx_int_msk.s.abnorm = 1;
341af866496SDavid Daney 		spx_int_msk.s.prtnxa = 1;
342af866496SDavid Daney 	}
343af866496SDavid Daney 	cvmx_write_csr(CVMX_SPXX_INT_MSK(index), spx_int_msk.u64);
344af866496SDavid Daney }
345af866496SDavid Daney /**
346*faff43daSRandy Dunlap  * __cvmx_interrupt_stxx_int_msk_enable - enable all interrupt bits in cvmx_stxx_int_msk_t
347*faff43daSRandy Dunlap  * @index: interrupt register block_id
348af866496SDavid Daney  */
__cvmx_interrupt_stxx_int_msk_enable(int index)349af866496SDavid Daney void __cvmx_interrupt_stxx_int_msk_enable(int index)
350af866496SDavid Daney {
351af866496SDavid Daney 	union cvmx_stxx_int_msk stx_int_msk;
352af866496SDavid Daney 	cvmx_write_csr(CVMX_STXX_INT_REG(index),
353af866496SDavid Daney 		       cvmx_read_csr(CVMX_STXX_INT_REG(index)));
354af866496SDavid Daney 	stx_int_msk.u64 = 0;
355af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN38XX)) {
356af866496SDavid Daney 		/* Skipping stx_int_msk.s.reserved_8_63 */
357af866496SDavid Daney 		stx_int_msk.s.frmerr = 1;
358af866496SDavid Daney 		stx_int_msk.s.unxfrm = 1;
359af866496SDavid Daney 		stx_int_msk.s.nosync = 1;
360af866496SDavid Daney 		stx_int_msk.s.diperr = 1;
361af866496SDavid Daney 		stx_int_msk.s.datovr = 1;
362af866496SDavid Daney 		stx_int_msk.s.ovrbst = 1;
363af866496SDavid Daney 		stx_int_msk.s.calpar1 = 1;
364af866496SDavid Daney 		stx_int_msk.s.calpar0 = 1;
365af866496SDavid Daney 	}
366af866496SDavid Daney 	if (OCTEON_IS_MODEL(OCTEON_CN58XX)) {
367af866496SDavid Daney 		/* Skipping stx_int_msk.s.reserved_8_63 */
368af866496SDavid Daney 		stx_int_msk.s.frmerr = 1;
369af866496SDavid Daney 		stx_int_msk.s.unxfrm = 1;
370af866496SDavid Daney 		stx_int_msk.s.nosync = 1;
371af866496SDavid Daney 		stx_int_msk.s.diperr = 1;
372af866496SDavid Daney 		stx_int_msk.s.datovr = 1;
373af866496SDavid Daney 		stx_int_msk.s.ovrbst = 1;
374af866496SDavid Daney 		stx_int_msk.s.calpar1 = 1;
375af866496SDavid Daney 		stx_int_msk.s.calpar0 = 1;
376af866496SDavid Daney 	}
377af866496SDavid Daney 	cvmx_write_csr(CVMX_STXX_INT_MSK(index), stx_int_msk.u64);
378af866496SDavid Daney }
379