1if CPU_CAVIUM_OCTEON 2 3config CAVIUM_CN63XXP1 4 bool "Enable CN63XXP1 errata workarounds" 5 default "n" 6 help 7 The CN63XXP1 chip requires build time workarounds to 8 function reliably, select this option to enable them. These 9 workarounds will cause a slight decrease in performance on 10 non-CN63XXP1 hardware, so it is recommended to select "n" 11 unless it is known the workarounds are needed. 12 13config CAVIUM_OCTEON_CVMSEG_SIZE 14 int "Number of L1 cache lines reserved for CVMSEG memory" 15 range 0 54 16 default 1 17 help 18 CVMSEG LM is a segment that accesses portions of the dcache as a 19 local memory; the larger CVMSEG is, the smaller the cache is. 20 This selects the size of CVMSEG LM, which is in cache blocks. The 21 legally range is from zero to 54 cache blocks (i.e. CVMSEG LM is 22 between zero and 6192 bytes). 23 24endif # CPU_CAVIUM_OCTEON 25 26if CAVIUM_OCTEON_SOC 27 28config CAVIUM_OCTEON_LOCK_L2 29 bool "Lock often used kernel code in the L2" 30 default "y" 31 help 32 Enable locking parts of the kernel into the L2 cache. 33 34config CAVIUM_OCTEON_LOCK_L2_TLB 35 bool "Lock the TLB handler in L2" 36 depends on CAVIUM_OCTEON_LOCK_L2 37 default "y" 38 help 39 Lock the low level TLB fast path into L2. 40 41config CAVIUM_OCTEON_LOCK_L2_EXCEPTION 42 bool "Lock the exception handler in L2" 43 depends on CAVIUM_OCTEON_LOCK_L2 44 default "y" 45 help 46 Lock the low level exception handler into L2. 47 48config CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT 49 bool "Lock the interrupt handler in L2" 50 depends on CAVIUM_OCTEON_LOCK_L2 51 default "y" 52 help 53 Lock the low level interrupt handler into L2. 54 55config CAVIUM_OCTEON_LOCK_L2_INTERRUPT 56 bool "Lock the 2nd level interrupt handler in L2" 57 depends on CAVIUM_OCTEON_LOCK_L2 58 default "y" 59 help 60 Lock the 2nd level interrupt handler in L2. 61 62config CAVIUM_OCTEON_LOCK_L2_MEMCPY 63 bool "Lock memcpy() in L2" 64 depends on CAVIUM_OCTEON_LOCK_L2 65 default "y" 66 help 67 Lock the kernel's implementation of memcpy() into L2. 68 69config IOMMU_HELPER 70 bool 71 72config NEED_SG_DMA_LENGTH 73 bool 74 75config SWIOTLB 76 def_bool y 77 select IOMMU_HELPER 78 select NEED_SG_DMA_LENGTH 79 80config OCTEON_ILM 81 tristate "Module to measure interrupt latency using Octeon CIU Timer" 82 help 83 This driver is a module to measure interrupt latency using the 84 the CIU Timers on Octeon. 85 86 To compile this driver as a module, choose M here. The module 87 will be called octeon-ilm 88 89endif # CAVIUM_OCTEON_SOC 90