1/dts-v1/; 2 3/memreserve/ 0x00000000 0x00001000; // reserved 4/memreserve/ 0x00001000 0x000ef000; // ROM data 5/memreserve/ 0x000f0000 0x004cc000; // reserved 6 7#include <dt-bindings/interrupt-controller/mips-gic.h> 8 9/ { 10 #address-cells = <1>; 11 #size-cells = <1>; 12 compatible = "mti,sead-3"; 13 model = "MIPS SEAD-3"; 14 interrupt-parent = <&gic>; 15 16 chosen { 17 stdout-path = "uart1:115200"; 18 }; 19 20 aliases { 21 uart0 = &uart0; 22 uart1 = &uart1; 23 }; 24 25 cpus { 26 cpu@0 { 27 compatible = "mti,mips14KEc", "mti,mips14Kc"; 28 }; 29 }; 30 31 memory { 32 device_type = "memory"; 33 reg = <0x0 0x08000000>; 34 }; 35 36 cpu_intc: interrupt-controller { 37 compatible = "mti,cpu-interrupt-controller"; 38 39 interrupt-controller; 40 #interrupt-cells = <1>; 41 }; 42 43 gic: interrupt-controller@1b1c0000 { 44 compatible = "mti,gic"; 45 reg = <0x1b1c0000 0x20000>; 46 47 interrupt-controller; 48 #interrupt-cells = <3>; 49 50 /* 51 * Declare the interrupt-parent even though the mti,gic 52 * binding doesn't require it, such that the kernel can 53 * figure out that cpu_intc is the root interrupt 54 * controller & should be probed first. 55 */ 56 interrupt-parent = <&cpu_intc>; 57 }; 58 59 ehci@1b200000 { 60 compatible = "generic-ehci"; 61 reg = <0x1b200000 0x1000>; 62 63 interrupts = <0>; /* GIC 0 or CPU 6 */ 64 65 has-transaction-translator; 66 }; 67 68 flash@1c000000 { 69 compatible = "intel,28f128j3", "cfi-flash"; 70 reg = <0x1c000000 0x2000000>; 71 #address-cells = <1>; 72 #size-cells = <1>; 73 bank-width = <4>; 74 75 partitions { 76 compatible = "fixed-partitions"; 77 #address-cells = <1>; 78 #size-cells = <1>; 79 80 user-fs@0 { 81 label = "User FS"; 82 reg = <0x0 0x1fc0000>; 83 }; 84 85 board-config@3e0000 { 86 label = "Board Config"; 87 reg = <0x1fc0000 0x40000>; 88 }; 89 }; 90 }; 91 92 fpga_regs: system-controller@1f000000 { 93 compatible = "mti,sead3-fpga", "syscon", "simple-mfd"; 94 reg = <0x1f000000 0x200>; 95 96 reboot { 97 compatible = "syscon-reboot"; 98 regmap = <&fpga_regs>; 99 offset = <0x50>; 100 mask = <0x4d>; 101 }; 102 103 poweroff { 104 compatible = "restart-poweroff"; 105 }; 106 }; 107 108 system-controller@1f000200 { 109 compatible = "mti,sead3-cpld", "syscon", "simple-mfd"; 110 reg = <0x1f000200 0x300>; 111 112 led@10.0 { 113 compatible = "register-bit-led"; 114 offset = <0x10>; 115 mask = <0x1>; 116 label = "pled0"; 117 }; 118 led@10.1 { 119 compatible = "register-bit-led"; 120 offset = <0x10>; 121 mask = <0x2>; 122 label = "pled1"; 123 }; 124 led@10.2 { 125 compatible = "register-bit-led"; 126 offset = <0x10>; 127 mask = <0x4>; 128 label = "pled2"; 129 }; 130 led@10.3 { 131 compatible = "register-bit-led"; 132 offset = <0x10>; 133 mask = <0x8>; 134 label = "pled3"; 135 }; 136 led@10.4 { 137 compatible = "register-bit-led"; 138 offset = <0x10>; 139 mask = <0x10>; 140 label = "pled4"; 141 }; 142 led@10.5 { 143 compatible = "register-bit-led"; 144 offset = <0x10>; 145 mask = <0x20>; 146 label = "pled5"; 147 }; 148 led@10.6 { 149 compatible = "register-bit-led"; 150 offset = <0x10>; 151 mask = <0x40>; 152 label = "pled6"; 153 }; 154 led@10.7 { 155 compatible = "register-bit-led"; 156 offset = <0x10>; 157 mask = <0x80>; 158 label = "pled7"; 159 }; 160 161 led@18.0 { 162 compatible = "register-bit-led"; 163 offset = <0x18>; 164 mask = <0x1>; 165 label = "fled0"; 166 }; 167 led@18.1 { 168 compatible = "register-bit-led"; 169 offset = <0x18>; 170 mask = <0x2>; 171 label = "fled1"; 172 }; 173 led@18.2 { 174 compatible = "register-bit-led"; 175 offset = <0x18>; 176 mask = <0x4>; 177 label = "fled2"; 178 }; 179 led@18.3 { 180 compatible = "register-bit-led"; 181 offset = <0x18>; 182 mask = <0x8>; 183 label = "fled3"; 184 }; 185 led@18.4 { 186 compatible = "register-bit-led"; 187 offset = <0x18>; 188 mask = <0x10>; 189 label = "fled4"; 190 }; 191 led@18.5 { 192 compatible = "register-bit-led"; 193 offset = <0x18>; 194 mask = <0x20>; 195 label = "fled5"; 196 }; 197 led@18.6 { 198 compatible = "register-bit-led"; 199 offset = <0x18>; 200 mask = <0x40>; 201 label = "fled6"; 202 }; 203 led@18.7 { 204 compatible = "register-bit-led"; 205 offset = <0x18>; 206 mask = <0x80>; 207 label = "fled7"; 208 }; 209 210 lcd@200 { 211 compatible = "mti,sead3-lcd"; 212 offset = <0x200>; 213 }; 214 }; 215 216 /* UART connected to FTDI & miniUSB socket */ 217 uart0: uart@1f000900 { 218 compatible = "ns16550a"; 219 reg = <0x1f000900 0x20>; 220 reg-io-width = <4>; 221 reg-shift = <2>; 222 223 clock-frequency = <14745600>; 224 225 interrupts = <3>; /* GIC 3 or CPU 4 */ 226 227 no-loopback-test; 228 }; 229 230 /* UART connected to RS232 socket */ 231 uart1: uart@1f000800 { 232 compatible = "ns16550a"; 233 reg = <0x1f000800 0x20>; 234 reg-io-width = <4>; 235 reg-shift = <2>; 236 237 clock-frequency = <14745600>; 238 239 interrupts = <2>; /* GIC 2 or CPU 4 */ 240 241 no-loopback-test; 242 }; 243 244 eth@1f010000 { 245 compatible = "smsc,lan9115"; 246 reg = <0x1f010000 0x10000>; 247 reg-io-width = <4>; 248 249 interrupts = <0>; /* GIC 0 or CPU 6 */ 250 251 phy-mode = "mii"; 252 smsc,irq-push-pull; 253 smsc,save-mac-address; 254 }; 255}; 256