1/dts-v1/; 2 3/memreserve/ 0x00000000 0x00001000; // reserved 4/memreserve/ 0x00001000 0x000ef000; // ROM data 5/memreserve/ 0x000f0000 0x004cc000; // reserved 6 7#include <dt-bindings/interrupt-controller/mips-gic.h> 8 9/ { 10 #address-cells = <1>; 11 #size-cells = <1>; 12 compatible = "mti,sead-3"; 13 interrupt-parent = <&gic>; 14 15 chosen { 16 stdout-path = "uart1:115200"; 17 }; 18 19 aliases { 20 uart0 = &uart0; 21 uart1 = &uart1; 22 }; 23 24 cpus { 25 cpu@0 { 26 compatible = "mti,mips14KEc", "mti,mips14Kc"; 27 }; 28 }; 29 30 memory { 31 device_type = "memory"; 32 reg = <0x0 0x08000000>; 33 }; 34 35 cpu_intc: interrupt-controller { 36 compatible = "mti,cpu-interrupt-controller"; 37 38 interrupt-controller; 39 #interrupt-cells = <1>; 40 }; 41 42 gic: interrupt-controller@1b1c0000 { 43 compatible = "mti,gic"; 44 reg = <0x1b1c0000 0x20000>; 45 46 interrupt-controller; 47 #interrupt-cells = <3>; 48 49 /* 50 * Declare the interrupt-parent even though the mti,gic 51 * binding doesn't require it, such that the kernel can 52 * figure out that cpu_intc is the root interrupt 53 * controller & should be probed first. 54 */ 55 interrupt-parent = <&cpu_intc>; 56 57 timer { 58 compatible = "mti,gic-timer"; 59 interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; 60 }; 61 }; 62 63 ehci@1b200000 { 64 compatible = "generic-ehci"; 65 reg = <0x1b200000 0x1000>; 66 67 interrupts = <0>; /* GIC 0 or CPU 6 */ 68 69 has-transaction-translator; 70 }; 71 72 flash@1c000000 { 73 compatible = "intel,28f128j3", "cfi-flash"; 74 reg = <0x1c000000 0x2000000>; 75 #address-cells = <1>; 76 #size-cells = <1>; 77 bank-width = <4>; 78 79 partitions { 80 compatible = "fixed-partitions"; 81 #address-cells = <1>; 82 #size-cells = <1>; 83 84 user-fs@0 { 85 label = "User FS"; 86 reg = <0x0 0x1fc0000>; 87 }; 88 89 board-config@3e0000 { 90 label = "Board Config"; 91 reg = <0x1fc0000 0x40000>; 92 }; 93 }; 94 }; 95 96 fpga_regs: system-controller@1f000000 { 97 compatible = "mti,sead3-fpga", "syscon", "simple-mfd"; 98 reg = <0x1f000000 0x200>; 99 100 reboot { 101 compatible = "syscon-reboot"; 102 regmap = <&fpga_regs>; 103 offset = <0x50>; 104 mask = <0x4d>; 105 }; 106 107 poweroff { 108 compatible = "restart-poweroff"; 109 }; 110 }; 111 112 system-controller@1f000200 { 113 compatible = "mti,sead3-cpld", "syscon", "simple-mfd"; 114 reg = <0x1f000200 0x300>; 115 116 led@10.0 { 117 compatible = "register-bit-led"; 118 offset = <0x10>; 119 mask = <0x1>; 120 label = "pled0"; 121 }; 122 led@10.1 { 123 compatible = "register-bit-led"; 124 offset = <0x10>; 125 mask = <0x2>; 126 label = "pled1"; 127 }; 128 led@10.2 { 129 compatible = "register-bit-led"; 130 offset = <0x10>; 131 mask = <0x4>; 132 label = "pled2"; 133 }; 134 led@10.3 { 135 compatible = "register-bit-led"; 136 offset = <0x10>; 137 mask = <0x8>; 138 label = "pled3"; 139 }; 140 led@10.4 { 141 compatible = "register-bit-led"; 142 offset = <0x10>; 143 mask = <0x10>; 144 label = "pled4"; 145 }; 146 led@10.5 { 147 compatible = "register-bit-led"; 148 offset = <0x10>; 149 mask = <0x20>; 150 label = "pled5"; 151 }; 152 led@10.6 { 153 compatible = "register-bit-led"; 154 offset = <0x10>; 155 mask = <0x40>; 156 label = "pled6"; 157 }; 158 led@10.7 { 159 compatible = "register-bit-led"; 160 offset = <0x10>; 161 mask = <0x80>; 162 label = "pled7"; 163 }; 164 165 led@18.0 { 166 compatible = "register-bit-led"; 167 offset = <0x18>; 168 mask = <0x1>; 169 label = "fled0"; 170 }; 171 led@18.1 { 172 compatible = "register-bit-led"; 173 offset = <0x18>; 174 mask = <0x2>; 175 label = "fled1"; 176 }; 177 led@18.2 { 178 compatible = "register-bit-led"; 179 offset = <0x18>; 180 mask = <0x4>; 181 label = "fled2"; 182 }; 183 led@18.3 { 184 compatible = "register-bit-led"; 185 offset = <0x18>; 186 mask = <0x8>; 187 label = "fled3"; 188 }; 189 led@18.4 { 190 compatible = "register-bit-led"; 191 offset = <0x18>; 192 mask = <0x10>; 193 label = "fled4"; 194 }; 195 led@18.5 { 196 compatible = "register-bit-led"; 197 offset = <0x18>; 198 mask = <0x20>; 199 label = "fled5"; 200 }; 201 led@18.6 { 202 compatible = "register-bit-led"; 203 offset = <0x18>; 204 mask = <0x40>; 205 label = "fled6"; 206 }; 207 led@18.7 { 208 compatible = "register-bit-led"; 209 offset = <0x18>; 210 mask = <0x80>; 211 label = "fled7"; 212 }; 213 }; 214 215 /* UART connected to FTDI & miniUSB socket */ 216 uart0: uart@1f000900 { 217 compatible = "ns16550a"; 218 reg = <0x1f000900 0x20>; 219 reg-io-width = <4>; 220 reg-shift = <2>; 221 222 clock-frequency = <14745600>; 223 224 interrupts = <3>; /* GIC 3 or CPU 4 */ 225 226 no-loopback-test; 227 }; 228 229 /* UART connected to RS232 socket */ 230 uart1: uart@1f000800 { 231 compatible = "ns16550a"; 232 reg = <0x1f000800 0x20>; 233 reg-io-width = <4>; 234 reg-shift = <2>; 235 236 clock-frequency = <14745600>; 237 238 interrupts = <2>; /* GIC 2 or CPU 4 */ 239 240 no-loopback-test; 241 }; 242 243 eth@1f010000 { 244 compatible = "smsc,lan9115"; 245 reg = <0x1f010000 0x10000>; 246 reg-io-width = <4>; 247 248 interrupts = <0>; /* GIC 0 or CPU 6 */ 249 250 phy-mode = "mii"; 251 smsc,irq-push-pull; 252 smsc,save-mac-address; 253 }; 254}; 255