139c1485cSHuacai Chen// SPDX-License-Identifier: GPL-2.0 239c1485cSHuacai Chen 339c1485cSHuacai Chen#include <dt-bindings/interrupt-controller/irq.h> 439c1485cSHuacai Chen 539c1485cSHuacai Chen/dts-v1/; 639c1485cSHuacai Chen/ { 739c1485cSHuacai Chen compatible = "loongson,loongson64v-4core-virtio"; 839c1485cSHuacai Chen #address-cells = <2>; 939c1485cSHuacai Chen #size-cells = <2>; 1039c1485cSHuacai Chen 1139c1485cSHuacai Chen cpuintc: interrupt-controller { 1239c1485cSHuacai Chen #address-cells = <0>; 1339c1485cSHuacai Chen #interrupt-cells = <1>; 1439c1485cSHuacai Chen interrupt-controller; 1539c1485cSHuacai Chen compatible = "mti,cpu-interrupt-controller"; 1639c1485cSHuacai Chen }; 1739c1485cSHuacai Chen 1839c1485cSHuacai Chen package0: bus@1fe00000 { 1939c1485cSHuacai Chen compatible = "simple-bus"; 2039c1485cSHuacai Chen #address-cells = <2>; 2139c1485cSHuacai Chen #size-cells = <1>; 2239c1485cSHuacai Chen ranges = <0 0x1fe00000 0 0x1fe00000 0x100000 2339c1485cSHuacai Chen 0 0x3ff00000 0 0x3ff00000 0x100000 2439c1485cSHuacai Chen 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>; 2539c1485cSHuacai Chen 2639c1485cSHuacai Chen liointc: interrupt-controller@3ff01400 { 2739c1485cSHuacai Chen compatible = "loongson,liointc-1.0"; 2839c1485cSHuacai Chen reg = <0 0x3ff01400 0x64>; 2939c1485cSHuacai Chen 3039c1485cSHuacai Chen interrupt-controller; 3139c1485cSHuacai Chen #interrupt-cells = <2>; 3239c1485cSHuacai Chen 3339c1485cSHuacai Chen interrupt-parent = <&cpuintc>; 3439c1485cSHuacai Chen interrupts = <2>, <3>; 3539c1485cSHuacai Chen interrupt-names = "int0", "int1"; 3639c1485cSHuacai Chen 3739c1485cSHuacai Chen loongson,parent_int_map = <0x00000001>, /* int0 */ 3839c1485cSHuacai Chen <0xfffffffe>, /* int1 */ 3939c1485cSHuacai Chen <0x00000000>, /* int2 */ 4039c1485cSHuacai Chen <0x00000000>; /* int3 */ 4139c1485cSHuacai Chen 4239c1485cSHuacai Chen }; 4339c1485cSHuacai Chen 4439c1485cSHuacai Chen cpu_uart0: serial@1fe001e0 { 4539c1485cSHuacai Chen compatible = "ns16550a"; 4639c1485cSHuacai Chen reg = <0 0x1fe001e0 0x8>; 4739c1485cSHuacai Chen clock-frequency = <33000000>; 4839c1485cSHuacai Chen interrupt-parent = <&liointc>; 4939c1485cSHuacai Chen interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 5039c1485cSHuacai Chen no-loopback-test; 5139c1485cSHuacai Chen }; 5239c1485cSHuacai Chen }; 5339c1485cSHuacai Chen 5439c1485cSHuacai Chen bus@10000000 { 5539c1485cSHuacai Chen compatible = "simple-bus"; 5639c1485cSHuacai Chen #address-cells = <2>; 5739c1485cSHuacai Chen #size-cells = <2>; 5839c1485cSHuacai Chen ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */ 5939c1485cSHuacai Chen 0 0x40000000 0 0x40000000 0 0x40000000>; /* PCI MEM */ 6039c1485cSHuacai Chen 6139c1485cSHuacai Chen rtc0: rtc@10081000 { 6239c1485cSHuacai Chen compatible = "google,goldfish-rtc"; 6339c1485cSHuacai Chen reg = <0 0x10081000 0 0x1000>; 6439c1485cSHuacai Chen interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; 6539c1485cSHuacai Chen interrupt-parent = <&liointc>; 6639c1485cSHuacai Chen }; 6739c1485cSHuacai Chen 6839c1485cSHuacai Chen pci@1a000000 { 6939c1485cSHuacai Chen compatible = "pci-host-ecam-generic"; 7039c1485cSHuacai Chen device_type = "pci"; 7139c1485cSHuacai Chen #address-cells = <3>; 7239c1485cSHuacai Chen #size-cells = <2>; 7339c1485cSHuacai Chen #interrupt-cells = <1>; 7439c1485cSHuacai Chen 7539c1485cSHuacai Chen bus-range = <0x0 0x1f>; 7639c1485cSHuacai Chen reg = <0 0x1a000000 0 0x02000000>; 7739c1485cSHuacai Chen 7839c1485cSHuacai Chen ranges = <0x01000000 0x0 0x00004000 0x0 0x18004000 0x0 0x0000c000>, 7939c1485cSHuacai Chen <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>; 8039c1485cSHuacai Chen 8139c1485cSHuacai Chen interrupt-map = < 8239c1485cSHuacai Chen 0x0000 0x0 0x0 0x1 &liointc 0x2 IRQ_TYPE_LEVEL_HIGH 8339c1485cSHuacai Chen 0x0800 0x0 0x0 0x1 &liointc 0x3 IRQ_TYPE_LEVEL_HIGH 8439c1485cSHuacai Chen 0x1000 0x0 0x0 0x1 &liointc 0x4 IRQ_TYPE_LEVEL_HIGH 8539c1485cSHuacai Chen 0x1800 0x0 0x0 0x1 &liointc 0x5 IRQ_TYPE_LEVEL_HIGH 8639c1485cSHuacai Chen >; 8739c1485cSHuacai Chen 8839c1485cSHuacai Chen interrupt-map-mask = <0x1800 0x0 0x0 0x7>; 8939c1485cSHuacai Chen }; 9039c1485cSHuacai Chen 91*a3da3d3dSzhaoxiao isa@18000000 { 9239c1485cSHuacai Chen compatible = "isa"; 9339c1485cSHuacai Chen #address-cells = <2>; 9439c1485cSHuacai Chen #size-cells = <1>; 9539c1485cSHuacai Chen ranges = <1 0 0 0x18000000 0x4000>; 9639c1485cSHuacai Chen }; 9739c1485cSHuacai Chen }; 9839c1485cSHuacai Chen 9939c1485cSHuacai Chen hypervisor { 10039c1485cSHuacai Chen compatible = "linux,kvm"; 10139c1485cSHuacai Chen }; 10239c1485cSHuacai Chen}; 103