xref: /openbmc/linux/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi (revision f29119b301d598f245154edc797c69c712a8b7fe) 
1// SPDX-License-Identifier: GPL-2.0
2
3/dts-v1/;
4
5#include <dt-bindings/interrupt-controller/irq.h>
6
7/ {
8	compatible = "loongson,loongson2k1000";
9
10	#address-cells = <2>;
11	#size-cells = <2>;
12
13	cpus {
14		#address-cells = <1>;
15		#size-cells = <0>;
16
17		cpu0: cpu@0 {
18			device_type = "cpu";
19			compatible = "loongson,gs264";
20			reg = <0x0>;
21			#clock-cells = <1>;
22			clocks = <&cpu_clk>;
23		};
24	};
25
26	memory@200000 {
27		compatible = "memory";
28		device_type = "memory";
29		reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
30			<0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */
31			<0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */
32	};
33
34	cpu_clk: cpu_clk {
35		#clock-cells = <0>;
36		compatible = "fixed-clock";
37		clock-frequency = <800000000>;
38	};
39
40	cpuintc: interrupt-controller {
41		#address-cells = <0>;
42		#interrupt-cells = <1>;
43		interrupt-controller;
44		compatible = "mti,cpu-interrupt-controller";
45	};
46
47	package0: bus@10000000 {
48		compatible = "simple-bus";
49		#address-cells = <2>;
50		#size-cells = <2>;
51		ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
52			0 0x40000000 0 0x40000000 0 0x40000000
53			0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
54
55		isa@18000000 {
56			compatible = "isa";
57			#size-cells = <1>;
58			#address-cells = <2>;
59			ranges = <1 0x0 0x0 0x18000000 0x4000>;
60		};
61
62		pm: reset-controller@1fe07000 {
63			compatible = "loongson,ls2k-pm";
64			reg = <0 0x1fe07000 0 0x422>;
65		};
66
67		liointc0: interrupt-controller@1fe11400 {
68			compatible = "loongson,liointc-2.0";
69			reg = <0 0x1fe11400 0 0x40>,
70				<0 0x1fe11040 0 0x8>,
71				<0 0x1fe11140 0 0x8>;
72			reg-names = "main", "isr0", "isr1";
73
74			interrupt-controller;
75			#interrupt-cells = <2>;
76
77			interrupt-parent = <&cpuintc>;
78			interrupts = <2>;
79			interrupt-names = "int0";
80
81			loongson,parent_int_map = <0xffffffff>, /* int0 */
82						<0x00000000>, /* int1 */
83						<0x00000000>, /* int2 */
84						<0x00000000>; /* int3 */
85		};
86
87		liointc1: interrupt-controller@1fe11440 {
88			compatible = "loongson,liointc-2.0";
89			reg = <0 0x1fe11440 0 0x40>,
90				<0 0x1fe11048 0 0x8>,
91				<0 0x1fe11148 0 0x8>;
92			reg-names = "main", "isr0", "isr1";
93
94			interrupt-controller;
95			#interrupt-cells = <2>;
96
97			interrupt-parent = <&cpuintc>;
98			interrupts = <3>;
99			interrupt-names = "int1";
100
101			loongson,parent_int_map = <0x00000000>, /* int0 */
102						<0xffffffff>, /* int1 */
103						<0x00000000>, /* int2 */
104						<0x00000000>; /* int3 */
105		};
106
107		rtc0: rtc@1fe07800 {
108			compatible = "loongson,ls2k1000-rtc";
109			reg = <0 0x1fe07800 0 0x78>;
110			interrupt-parent = <&liointc0>;
111			interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
112		};
113
114		uart0: serial@1fe00000 {
115			compatible = "ns16550a";
116			reg = <0 0x1fe00000 0 0x8>;
117			clock-frequency = <125000000>;
118			interrupt-parent = <&liointc0>;
119			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
120			no-loopback-test;
121		};
122
123		pci@1a000000 {
124			compatible = "loongson,ls2k-pci";
125			device_type = "pci";
126			#address-cells = <3>;
127			#size-cells = <2>;
128			#interrupt-cells = <2>;
129
130			reg = <0 0x1a000000 0 0x02000000>,
131				<0xfe 0x00000000 0 0x20000000>;
132
133			ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000  0x0 0x00010000>,
134				 <0x02000000 0x0 0x40000000 0x0 0x40000000  0x0 0x40000000>;
135
136			gmac@3,0 {
137				compatible = "pci0014,7a03.0",
138						   "pci0014,7a03",
139						   "pciclass0c0320",
140						   "pciclass0c03";
141
142				reg = <0x1800 0x0 0x0 0x0 0x0>;
143				interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
144					     <13 IRQ_TYPE_LEVEL_LOW>;
145				interrupt-names = "macirq", "eth_lpi";
146				interrupt-parent = <&liointc0>;
147				phy-mode = "rgmii";
148				mdio {
149					#address-cells = <1>;
150					#size-cells = <0>;
151					compatible = "snps,dwmac-mdio";
152					phy0: ethernet-phy@0 {
153						reg = <0>;
154					};
155				};
156			};
157
158			gmac@3,1 {
159				compatible = "pci0014,7a03.0",
160						   "pci0014,7a03",
161						   "pciclass0c0320",
162						   "pciclass0c03",
163						   "loongson, pci-gmac";
164
165				reg = <0x1900 0x0 0x0 0x0 0x0>;
166				interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
167					     <15 IRQ_TYPE_LEVEL_LOW>;
168				interrupt-names = "macirq", "eth_lpi";
169				interrupt-parent = <&liointc0>;
170				phy-mode = "rgmii";
171				mdio {
172					#address-cells = <1>;
173					#size-cells = <0>;
174					compatible = "snps,dwmac-mdio";
175					phy1: ethernet-phy@1 {
176						reg = <0>;
177					};
178				};
179			};
180
181			ehci@4,1 {
182				compatible = "pci0014,7a14.0",
183						   "pci0014,7a14",
184						   "pciclass0c0320",
185						   "pciclass0c03";
186
187				reg = <0x2100 0x0 0x0 0x0 0x0>;
188				interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
189				interrupt-parent = <&liointc1>;
190			};
191
192			ohci@4,2 {
193				compatible = "pci0014,7a24.0",
194						   "pci0014,7a24",
195						   "pciclass0c0310",
196						   "pciclass0c03";
197
198				reg = <0x2200 0x0 0x0 0x0 0x0>;
199				interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
200				interrupt-parent = <&liointc1>;
201			};
202
203			sata@8,0 {
204				compatible = "pci0014,7a08.0",
205						   "pci0014,7a08",
206						   "pciclass010601",
207						   "pciclass0106";
208
209				reg = <0x4000 0x0 0x0 0x0 0x0>;
210				interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
211				interrupt-parent = <&liointc0>;
212			};
213
214			pci_bridge@9,0 {
215				compatible = "pci0014,7a19.0",
216						   "pci0014,7a19",
217						   "pciclass060400",
218						   "pciclass0604";
219
220				reg = <0x4800 0x0 0x0 0x0 0x0>;
221				#interrupt-cells = <1>;
222				interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
223				interrupt-parent = <&liointc1>;
224				interrupt-map-mask = <0 0 0 0>;
225				interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>;
226				external-facing;
227			};
228
229			pci_bridge@a,0 {
230				compatible = "pci0014,7a09.0",
231						   "pci0014,7a09",
232						   "pciclass060400",
233						   "pciclass0604";
234
235				reg = <0x5000 0x0 0x0 0x0 0x0>;
236				#interrupt-cells = <1>;
237				interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
238				interrupt-parent = <&liointc1>;
239				interrupt-map-mask = <0 0 0 0>;
240				interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>;
241				external-facing;
242			};
243
244			pci_bridge@b,0 {
245				compatible = "pci0014,7a09.0",
246						   "pci0014,7a09",
247						   "pciclass060400",
248						   "pciclass0604";
249
250				reg = <0x5800 0x0 0x0 0x0 0x0>;
251				#interrupt-cells = <1>;
252				interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
253				interrupt-parent = <&liointc1>;
254				interrupt-map-mask = <0 0 0 0>;
255				interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>;
256				external-facing;
257			};
258
259			pci_bridge@c,0 {
260				compatible = "pci0014,7a09.0",
261						   "pci0014,7a09",
262						   "pciclass060400",
263						   "pciclass0604";
264
265				reg = <0x6000 0x0 0x0 0x0 0x0>;
266				#interrupt-cells = <1>;
267				interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
268				interrupt-parent = <&liointc1>;
269				interrupt-map-mask = <0 0 0 0>;
270				interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>;
271				external-facing;
272			};
273
274			pci_bridge@d,0 {
275				compatible = "pci0014,7a19.0",
276						   "pci0014,7a19",
277						   "pciclass060400",
278						   "pciclass0604";
279
280				reg = <0x6800 0x0 0x0 0x0 0x0>;
281				#interrupt-cells = <1>;
282				interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
283				interrupt-parent = <&liointc1>;
284				interrupt-map-mask = <0 0 0 0>;
285				interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>;
286				external-facing;
287			};
288
289			pci_bridge@e,0 {
290				compatible = "pci0014,7a09.0",
291						   "pci0014,7a09",
292						   "pciclass060400",
293						   "pciclass0604";
294
295				reg = <0x7000 0x0 0x0 0x0 0x0>;
296				#interrupt-cells = <1>;
297				interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
298				interrupt-parent = <&liointc1>;
299				interrupt-map-mask = <0 0 0 0>;
300				interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>;
301				external-facing;
302			};
303
304		};
305	};
306};
307
308