xref: /openbmc/linux/arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi (revision 27479037e8c447e9701a4eee5dc25afc811319ca) 
1// SPDX-License-Identifier: GPL-2.0
2
3/dts-v1/;
4
5#include <dt-bindings/interrupt-controller/irq.h>
6
7/ {
8	compatible = "loongson,loongson2k1000";
9
10	#address-cells = <2>;
11	#size-cells = <2>;
12
13	cpus {
14		#address-cells = <1>;
15		#size-cells = <0>;
16
17		cpu0: cpu@0 {
18			device_type = "cpu";
19			compatible = "loongson,gs264";
20			reg = <0x0>;
21			#clock-cells = <1>;
22			clocks = <&cpu_clk>;
23		};
24	};
25
26	memory@200000 {
27		compatible = "memory";
28		device_type = "memory";
29		reg = <0x00000000 0x00200000 0x00000000 0x0ee00000>, /* 238 MB at 2 MB */
30			<0x00000000 0x20000000 0x00000000 0x1f000000>, /* 496 MB at 512 MB */
31			<0x00000001 0x10000000 0x00000001 0xb0000000>; /* 6912 MB at 4352MB */
32	};
33
34	cpu_clk: cpu_clk {
35		#clock-cells = <0>;
36		compatible = "fixed-clock";
37		clock-frequency = <800000000>;
38	};
39
40	cpuintc: interrupt-controller {
41		#address-cells = <0>;
42		#interrupt-cells = <1>;
43		interrupt-controller;
44		compatible = "mti,cpu-interrupt-controller";
45	};
46
47	package0: bus@10000000 {
48		compatible = "simple-bus";
49		#address-cells = <2>;
50		#size-cells = <2>;
51		ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
52			0 0x40000000 0 0x40000000 0 0x40000000
53			0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
54
55		isa@18000000 {
56			compatible = "isa";
57			#size-cells = <1>;
58			#address-cells = <2>;
59			ranges = <1 0x0 0x0 0x18000000 0x4000>;
60		};
61
62		pm: reset-controller@1fe07000 {
63			compatible = "loongson,ls2k-pm";
64			reg = <0 0x1fe07000 0 0x422>;
65		};
66
67		liointc0: interrupt-controller@1fe11400 {
68			compatible = "loongson,liointc-2.0";
69			reg = <0 0x1fe11400 0 0x40>,
70				<0 0x1fe11040 0 0x8>,
71				<0 0x1fe11140 0 0x8>;
72			reg-names = "main", "isr0", "isr1";
73
74			interrupt-controller;
75			#interrupt-cells = <2>;
76
77			interrupt-parent = <&cpuintc>;
78			interrupts = <2>;
79			interrupt-names = "int0";
80
81			loongson,parent_int_map = <0xffffffff>, /* int0 */
82						<0x00000000>, /* int1 */
83						<0x00000000>, /* int2 */
84						<0x00000000>; /* int3 */
85		};
86
87		liointc1: interrupt-controller@1fe11440 {
88			compatible = "loongson,liointc-2.0";
89			reg = <0 0x1fe11440 0 0x40>,
90				<0 0x1fe11048 0 0x8>,
91				<0 0x1fe11148 0 0x8>;
92			reg-names = "main", "isr0", "isr1";
93
94			interrupt-controller;
95			#interrupt-cells = <2>;
96
97			interrupt-parent = <&cpuintc>;
98			interrupts = <3>;
99			interrupt-names = "int1";
100
101			loongson,parent_int_map = <0x00000000>, /* int0 */
102						<0xffffffff>, /* int1 */
103						<0x00000000>, /* int2 */
104						<0x00000000>; /* int3 */
105		};
106
107		rtc0: rtc@1fe07800 {
108			compatible = "loongson,ls2k1000-rtc";
109			reg = <0 0x1fe07800 0 0x78>;
110			interrupt-parent = <&liointc0>;
111			interrupts = <60 IRQ_TYPE_LEVEL_LOW>;
112		};
113
114		uart0: serial@1fe00000 {
115			compatible = "ns16550a";
116			reg = <0 0x1fe00000 0 0x8>;
117			clock-frequency = <125000000>;
118			interrupt-parent = <&liointc0>;
119			interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
120			no-loopback-test;
121		};
122
123		pci@1a000000 {
124			compatible = "loongson,ls2k-pci";
125			device_type = "pci";
126			#address-cells = <3>;
127			#size-cells = <2>;
128			#interrupt-cells = <2>;
129
130			reg = <0 0x1a000000 0 0x02000000>,
131				<0xfe 0x00000000 0 0x20000000>;
132
133			ranges = <0x01000000 0x0 0x00000000 0x0 0x18000000  0x0 0x00010000>,
134				 <0x02000000 0x0 0x40000000 0x0 0x40000000  0x0 0x40000000>;
135
136			gmac@3,0 {
137				compatible = "pci0014,7a03.0",
138						   "pci0014,7a03",
139						   "pciclass0c0320",
140						   "pciclass0c03";
141
142				reg = <0x1800 0x0 0x0 0x0 0x0>;
143				interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
144					     <13 IRQ_TYPE_LEVEL_LOW>;
145				interrupt-names = "macirq", "eth_lpi";
146				interrupt-parent = <&liointc0>;
147				phy-mode = "rgmii-id";
148				phy-handle = <&phy1>;
149				mdio {
150					#address-cells = <1>;
151					#size-cells = <0>;
152					compatible = "snps,dwmac-mdio";
153					phy0: ethernet-phy@0 {
154						reg = <0>;
155					};
156				};
157			};
158
159			gmac@3,1 {
160				compatible = "pci0014,7a03.0",
161						   "pci0014,7a03",
162						   "pciclass0c0320",
163						   "pciclass0c03",
164						   "loongson, pci-gmac";
165
166				reg = <0x1900 0x0 0x0 0x0 0x0>;
167				interrupts = <14 IRQ_TYPE_LEVEL_LOW>,
168					     <15 IRQ_TYPE_LEVEL_LOW>;
169				interrupt-names = "macirq", "eth_lpi";
170				interrupt-parent = <&liointc0>;
171				phy-mode = "rgmii-id";
172				phy-handle = <&phy1>;
173				mdio {
174					#address-cells = <1>;
175					#size-cells = <0>;
176					compatible = "snps,dwmac-mdio";
177					phy1: ethernet-phy@1 {
178						reg = <0>;
179					};
180				};
181			};
182
183			ehci@4,1 {
184				compatible = "pci0014,7a14.0",
185						   "pci0014,7a14",
186						   "pciclass0c0320",
187						   "pciclass0c03";
188
189				reg = <0x2100 0x0 0x0 0x0 0x0>;
190				interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
191				interrupt-parent = <&liointc1>;
192			};
193
194			ohci@4,2 {
195				compatible = "pci0014,7a24.0",
196						   "pci0014,7a24",
197						   "pciclass0c0310",
198						   "pciclass0c03";
199
200				reg = <0x2200 0x0 0x0 0x0 0x0>;
201				interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
202				interrupt-parent = <&liointc1>;
203			};
204
205			sata@8,0 {
206				compatible = "pci0014,7a08.0",
207						   "pci0014,7a08",
208						   "pciclass010601",
209						   "pciclass0106";
210
211				reg = <0x4000 0x0 0x0 0x0 0x0>;
212				interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
213				interrupt-parent = <&liointc0>;
214			};
215
216			pci_bridge@9,0 {
217				compatible = "pci0014,7a19.0",
218						   "pci0014,7a19",
219						   "pciclass060400",
220						   "pciclass0604";
221
222				reg = <0x4800 0x0 0x0 0x0 0x0>;
223				#interrupt-cells = <1>;
224				interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
225				interrupt-parent = <&liointc1>;
226				interrupt-map-mask = <0 0 0 0>;
227				interrupt-map = <0 0 0 0 &liointc1 0 IRQ_TYPE_LEVEL_LOW>;
228				external-facing;
229			};
230
231			pci_bridge@a,0 {
232				compatible = "pci0014,7a09.0",
233						   "pci0014,7a09",
234						   "pciclass060400",
235						   "pciclass0604";
236
237				reg = <0x5000 0x0 0x0 0x0 0x0>;
238				#interrupt-cells = <1>;
239				interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
240				interrupt-parent = <&liointc1>;
241				interrupt-map-mask = <0 0 0 0>;
242				interrupt-map = <0 0 0 0 &liointc1 1 IRQ_TYPE_LEVEL_LOW>;
243				external-facing;
244			};
245
246			pci_bridge@b,0 {
247				compatible = "pci0014,7a09.0",
248						   "pci0014,7a09",
249						   "pciclass060400",
250						   "pciclass0604";
251
252				reg = <0x5800 0x0 0x0 0x0 0x0>;
253				#interrupt-cells = <1>;
254				interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
255				interrupt-parent = <&liointc1>;
256				interrupt-map-mask = <0 0 0 0>;
257				interrupt-map = <0 0 0 0 &liointc1 2 IRQ_TYPE_LEVEL_LOW>;
258				external-facing;
259			};
260
261			pci_bridge@c,0 {
262				compatible = "pci0014,7a09.0",
263						   "pci0014,7a09",
264						   "pciclass060400",
265						   "pciclass0604";
266
267				reg = <0x6000 0x0 0x0 0x0 0x0>;
268				#interrupt-cells = <1>;
269				interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
270				interrupt-parent = <&liointc1>;
271				interrupt-map-mask = <0 0 0 0>;
272				interrupt-map = <0 0 0 0 &liointc1 3 IRQ_TYPE_LEVEL_LOW>;
273				external-facing;
274			};
275
276			pci_bridge@d,0 {
277				compatible = "pci0014,7a19.0",
278						   "pci0014,7a19",
279						   "pciclass060400",
280						   "pciclass0604";
281
282				reg = <0x6800 0x0 0x0 0x0 0x0>;
283				#interrupt-cells = <1>;
284				interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
285				interrupt-parent = <&liointc1>;
286				interrupt-map-mask = <0 0 0 0>;
287				interrupt-map = <0 0 0 0 &liointc1 4 IRQ_TYPE_LEVEL_LOW>;
288				external-facing;
289			};
290
291			pci_bridge@e,0 {
292				compatible = "pci0014,7a09.0",
293						   "pci0014,7a09",
294						   "pciclass060400",
295						   "pciclass0604";
296
297				reg = <0x7000 0x0 0x0 0x0 0x0>;
298				#interrupt-cells = <1>;
299				interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
300				interrupt-parent = <&liointc1>;
301				interrupt-map-mask = <0 0 0 0>;
302				interrupt-map = <0 0 0 0 &liointc1 5 IRQ_TYPE_LEVEL_LOW>;
303				external-facing;
304			};
305
306		};
307	};
308};
309
310