1/ { 2 #address-cells = <1>; 3 #size-cells = <1>; 4 compatible = "lantiq,xway", "lantiq,danube"; 5 6 cpus { 7 cpu@0 { 8 compatible = "mips,mips24Kc"; 9 }; 10 }; 11 12 biu@1F800000 { 13 #address-cells = <1>; 14 #size-cells = <1>; 15 compatible = "lantiq,biu", "simple-bus"; 16 reg = <0x1F800000 0x800000>; 17 ranges = <0x0 0x1F800000 0x7FFFFF>; 18 19 icu0: icu@80200 { 20 #interrupt-cells = <1>; 21 interrupt-controller; 22 compatible = "lantiq,icu"; 23 reg = <0x80200 0x120>; 24 }; 25 26 watchdog@803F0 { 27 compatible = "lantiq,wdt"; 28 reg = <0x803F0 0x10>; 29 }; 30 }; 31 32 sram@1F000000 { 33 #address-cells = <1>; 34 #size-cells = <1>; 35 compatible = "lantiq,sram"; 36 reg = <0x1F000000 0x800000>; 37 ranges = <0x0 0x1F000000 0x7FFFFF>; 38 39 eiu0: eiu@101000 { 40 #interrupt-cells = <1>; 41 interrupt-controller; 42 interrupt-parent; 43 compatible = "lantiq,eiu-xway"; 44 reg = <0x101000 0x1000>; 45 }; 46 47 pmu0: pmu@102000 { 48 compatible = "lantiq,pmu-xway"; 49 reg = <0x102000 0x1000>; 50 }; 51 52 cgu0: cgu@103000 { 53 compatible = "lantiq,cgu-xway"; 54 reg = <0x103000 0x1000>; 55 #clock-cells = <1>; 56 }; 57 58 rcu0: rcu@203000 { 59 compatible = "lantiq,rcu-xway"; 60 reg = <0x203000 0x1000>; 61 }; 62 }; 63 64 fpi@10000000 { 65 #address-cells = <1>; 66 #size-cells = <1>; 67 compatible = "lantiq,fpi", "simple-bus"; 68 ranges = <0x0 0x10000000 0xEEFFFFF>; 69 reg = <0x10000000 0xEF00000>; 70 71 gptu@E100A00 { 72 compatible = "lantiq,gptu-xway"; 73 reg = <0xE100A00 0x100>; 74 }; 75 76 serial@E100C00 { 77 compatible = "lantiq,asc"; 78 reg = <0xE100C00 0x400>; 79 interrupt-parent = <&icu0>; 80 interrupts = <112 113 114>; 81 }; 82 83 dma0: dma@E104100 { 84 compatible = "lantiq,dma-xway"; 85 reg = <0xE104100 0x800>; 86 }; 87 88 ebu0: ebu@E105300 { 89 compatible = "lantiq,ebu-xway"; 90 reg = <0xE105300 0x100>; 91 }; 92 93 pci0: pci@E105400 { 94 #address-cells = <3>; 95 #size-cells = <2>; 96 #interrupt-cells = <1>; 97 compatible = "lantiq,pci-xway"; 98 bus-range = <0x0 0x0>; 99 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ 100 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */ 101 reg = <0x7000000 0x8000 /* config space */ 102 0xE105400 0x400>; /* pci bridge */ 103 }; 104 }; 105}; 106