1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/clock/ingenic,tcu.h> 3#include <dt-bindings/clock/x1830-cgu.h> 4#include <dt-bindings/dma/x1830-dma.h> 5 6/ { 7 #address-cells = <1>; 8 #size-cells = <1>; 9 compatible = "ingenic,x1830"; 10 11 cpuintc: interrupt-controller { 12 #address-cells = <0>; 13 #interrupt-cells = <1>; 14 interrupt-controller; 15 compatible = "mti,cpu-interrupt-controller"; 16 }; 17 18 intc: interrupt-controller@10001000 { 19 compatible = "ingenic,x1830-intc", "ingenic,jz4780-intc"; 20 reg = <0x10001000 0x50>; 21 22 interrupt-controller; 23 #interrupt-cells = <1>; 24 25 interrupt-parent = <&cpuintc>; 26 interrupts = <2>; 27 }; 28 29 exclk: ext { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 }; 33 34 rtclk: rtc { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <32768>; 38 }; 39 40 cgu: x1830-cgu@10000000 { 41 compatible = "ingenic,x1830-cgu"; 42 reg = <0x10000000 0x100>; 43 44 #clock-cells = <1>; 45 46 clocks = <&exclk>, <&rtclk>; 47 clock-names = "ext", "rtc"; 48 }; 49 50 tcu: timer@10002000 { 51 compatible = "ingenic,x1830-tcu", "ingenic,x1000-tcu", "simple-mfd"; 52 reg = <0x10002000 0x1000>; 53 #address-cells = <1>; 54 #size-cells = <1>; 55 ranges = <0x0 0x10002000 0x1000>; 56 57 #clock-cells = <1>; 58 59 clocks = <&cgu X1830_CLK_RTCLK 60 &cgu X1830_CLK_EXCLK 61 &cgu X1830_CLK_PCLK>; 62 clock-names = "rtc", "ext", "pclk"; 63 64 interrupt-controller; 65 #interrupt-cells = <1>; 66 67 interrupt-parent = <&intc>; 68 interrupts = <27 26 25>; 69 70 wdt: watchdog@0 { 71 compatible = "ingenic,x1830-watchdog", "ingenic,jz4780-watchdog"; 72 reg = <0x0 0x10>; 73 74 clocks = <&tcu TCU_CLK_WDT>; 75 clock-names = "wdt"; 76 }; 77 }; 78 79 rtc: rtc@10003000 { 80 compatible = "ingenic,x1830-rtc", "ingenic,jz4780-rtc"; 81 reg = <0x10003000 0x4c>; 82 83 interrupt-parent = <&intc>; 84 interrupts = <32>; 85 86 clocks = <&cgu X1830_CLK_RTCLK>; 87 clock-names = "rtc"; 88 }; 89 90 pinctrl: pin-controller@10010000 { 91 compatible = "ingenic,x1830-pinctrl"; 92 reg = <0x10010000 0x800>; 93 #address-cells = <1>; 94 #size-cells = <0>; 95 96 gpa: gpio@0 { 97 compatible = "ingenic,x1830-gpio"; 98 reg = <0>; 99 100 gpio-controller; 101 gpio-ranges = <&pinctrl 0 0 32>; 102 #gpio-cells = <2>; 103 104 interrupt-controller; 105 #interrupt-cells = <2>; 106 107 interrupt-parent = <&intc>; 108 interrupts = <17>; 109 }; 110 111 gpb: gpio@1 { 112 compatible = "ingenic,x1830-gpio"; 113 reg = <1>; 114 115 gpio-controller; 116 gpio-ranges = <&pinctrl 0 32 32>; 117 #gpio-cells = <2>; 118 119 interrupt-controller; 120 #interrupt-cells = <2>; 121 122 interrupt-parent = <&intc>; 123 interrupts = <16>; 124 }; 125 126 gpc: gpio@2 { 127 compatible = "ingenic,x1830-gpio"; 128 reg = <2>; 129 130 gpio-controller; 131 gpio-ranges = <&pinctrl 0 64 32>; 132 #gpio-cells = <2>; 133 134 interrupt-controller; 135 #interrupt-cells = <2>; 136 137 interrupt-parent = <&intc>; 138 interrupts = <15>; 139 }; 140 141 gpd: gpio@3 { 142 compatible = "ingenic,x1830-gpio"; 143 reg = <3>; 144 145 gpio-controller; 146 gpio-ranges = <&pinctrl 0 96 32>; 147 #gpio-cells = <2>; 148 149 interrupt-controller; 150 #interrupt-cells = <2>; 151 152 interrupt-parent = <&intc>; 153 interrupts = <14>; 154 }; 155 }; 156 157 uart0: serial@10030000 { 158 compatible = "ingenic,x1830-uart", "ingenic,x1000-uart"; 159 reg = <0x10030000 0x100>; 160 161 interrupt-parent = <&intc>; 162 interrupts = <51>; 163 164 clocks = <&exclk>, <&cgu X1830_CLK_UART0>; 165 clock-names = "baud", "module"; 166 167 status = "disabled"; 168 }; 169 170 uart1: serial@10031000 { 171 compatible = "ingenic,x1830-uart", "ingenic,x1000-uart"; 172 reg = <0x10031000 0x100>; 173 174 interrupt-parent = <&intc>; 175 interrupts = <50>; 176 177 clocks = <&exclk>, <&cgu X1830_CLK_UART1>; 178 clock-names = "baud", "module"; 179 180 status = "disabled"; 181 }; 182 183 i2c0: i2c-controller@10050000 { 184 compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c"; 185 reg = <0x10050000 0x1000>; 186 #address-cells = <1>; 187 #size-cells = <0>; 188 189 interrupt-parent = <&intc>; 190 interrupts = <60>; 191 192 clocks = <&cgu X1830_CLK_SMB0>; 193 194 status = "disabled"; 195 }; 196 197 i2c1: i2c-controller@10051000 { 198 compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c"; 199 reg = <0x10051000 0x1000>; 200 #address-cells = <1>; 201 #size-cells = <0>; 202 203 interrupt-parent = <&intc>; 204 interrupts = <59>; 205 206 clocks = <&cgu X1830_CLK_SMB1>; 207 208 status = "disabled"; 209 }; 210 211 i2c2: i2c-controller@10052000 { 212 compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c"; 213 reg = <0x10052000 0x1000>; 214 #address-cells = <1>; 215 #size-cells = <0>; 216 217 interrupt-parent = <&intc>; 218 interrupts = <58>; 219 220 clocks = <&cgu X1830_CLK_SMB2>; 221 222 status = "disabled"; 223 }; 224 225 pdma: dma-controller@13420000 { 226 compatible = "ingenic,x1830-dma"; 227 reg = <0x13420000 0x400 228 0x13421000 0x40>; 229 #dma-cells = <2>; 230 231 interrupt-parent = <&intc>; 232 interrupts = <10>; 233 234 clocks = <&cgu X1830_CLK_PDMA>; 235 }; 236 237 msc0: mmc@13450000 { 238 compatible = "ingenic,x1830-mmc", "ingenic,x1000-mmc"; 239 reg = <0x13450000 0x1000>; 240 241 interrupt-parent = <&intc>; 242 interrupts = <37>; 243 244 clocks = <&cgu X1830_CLK_MSC0>; 245 clock-names = "mmc"; 246 247 cap-sd-highspeed; 248 cap-mmc-highspeed; 249 cap-sdio-irq; 250 251 dmas = <&pdma X1830_DMA_MSC0_RX 0xffffffff>, 252 <&pdma X1830_DMA_MSC0_TX 0xffffffff>; 253 dma-names = "rx", "tx"; 254 255 status = "disabled"; 256 }; 257 258 msc1: mmc@13460000 { 259 compatible = "ingenic,x1830-mmc", "ingenic,x1000-mmc"; 260 reg = <0x13460000 0x1000>; 261 262 interrupt-parent = <&intc>; 263 interrupts = <36>; 264 265 clocks = <&cgu X1830_CLK_MSC1>; 266 clock-names = "mmc"; 267 268 cap-sd-highspeed; 269 cap-mmc-highspeed; 270 cap-sdio-irq; 271 272 dmas = <&pdma X1830_DMA_MSC1_RX 0xffffffff>, 273 <&pdma X1830_DMA_MSC1_TX 0xffffffff>; 274 dma-names = "rx", "tx"; 275 276 status = "disabled"; 277 }; 278 279 mac: ethernet@134b0000 { 280 compatible = "ingenic,x1830-mac", "snps,dwmac"; 281 reg = <0x134b0000 0x2000>; 282 283 interrupt-parent = <&intc>; 284 interrupts = <55>; 285 interrupt-names = "macirq"; 286 287 clocks = <&cgu X1830_CLK_MAC>; 288 clock-names = "stmmaceth"; 289 290 status = "disabled"; 291 292 mdio: mdio { 293 compatible = "snps,dwmac-mdio"; 294 #address-cells = <1>; 295 #size-cells = <0>; 296 297 status = "disabled"; 298 }; 299 }; 300}; 301