1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/clock/ingenic,tcu.h> 3#include <dt-bindings/clock/x1000-cgu.h> 4#include <dt-bindings/dma/x1000-dma.h> 5 6/ { 7 #address-cells = <1>; 8 #size-cells = <1>; 9 compatible = "ingenic,x1000", "ingenic,x1000e"; 10 11 cpuintc: interrupt-controller { 12 #address-cells = <0>; 13 #interrupt-cells = <1>; 14 interrupt-controller; 15 compatible = "mti,cpu-interrupt-controller"; 16 }; 17 18 intc: interrupt-controller@10001000 { 19 compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc"; 20 reg = <0x10001000 0x50>; 21 22 interrupt-controller; 23 #interrupt-cells = <1>; 24 25 interrupt-parent = <&cpuintc>; 26 interrupts = <2>; 27 }; 28 29 exclk: ext { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 }; 33 34 rtclk: rtc { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <32768>; 38 }; 39 40 cgu: x1000-cgu@10000000 { 41 compatible = "ingenic,x1000-cgu"; 42 reg = <0x10000000 0x100>; 43 44 #clock-cells = <1>; 45 46 clocks = <&exclk>, <&rtclk>; 47 clock-names = "ext", "rtc"; 48 }; 49 50 tcu: timer@10002000 { 51 compatible = "ingenic,x1000-tcu", "simple-mfd"; 52 reg = <0x10002000 0x1000>; 53 #address-cells = <1>; 54 #size-cells = <1>; 55 ranges = <0x0 0x10002000 0x1000>; 56 57 #clock-cells = <1>; 58 59 clocks = <&cgu X1000_CLK_RTCLK>, 60 <&cgu X1000_CLK_EXCLK>, 61 <&cgu X1000_CLK_PCLK>; 62 clock-names = "rtc", "ext", "pclk"; 63 64 interrupt-controller; 65 #interrupt-cells = <1>; 66 67 interrupt-parent = <&intc>; 68 interrupts = <27 26 25>; 69 70 wdt: watchdog@0 { 71 compatible = "ingenic,x1000-watchdog", "ingenic,jz4780-watchdog"; 72 reg = <0x0 0x10>; 73 74 clocks = <&tcu TCU_CLK_WDT>; 75 clock-names = "wdt"; 76 }; 77 }; 78 79 rtc: rtc@10003000 { 80 compatible = "ingenic,x1000-rtc", "ingenic,jz4780-rtc"; 81 reg = <0x10003000 0x4c>; 82 83 interrupt-parent = <&intc>; 84 interrupts = <32>; 85 86 clocks = <&cgu X1000_CLK_RTCLK>; 87 clock-names = "rtc"; 88 }; 89 90 pinctrl: pin-controller@10010000 { 91 compatible = "ingenic,x1000-pinctrl"; 92 reg = <0x10010000 0x800>; 93 #address-cells = <1>; 94 #size-cells = <0>; 95 96 gpa: gpio@0 { 97 compatible = "ingenic,x1000-gpio"; 98 reg = <0>; 99 100 gpio-controller; 101 gpio-ranges = <&pinctrl 0 0 32>; 102 #gpio-cells = <2>; 103 104 interrupt-controller; 105 #interrupt-cells = <2>; 106 107 interrupt-parent = <&intc>; 108 interrupts = <17>; 109 }; 110 111 gpb: gpio@1 { 112 compatible = "ingenic,x1000-gpio"; 113 reg = <1>; 114 115 gpio-controller; 116 gpio-ranges = <&pinctrl 0 32 32>; 117 #gpio-cells = <2>; 118 119 interrupt-controller; 120 #interrupt-cells = <2>; 121 122 interrupt-parent = <&intc>; 123 interrupts = <16>; 124 }; 125 126 gpc: gpio@2 { 127 compatible = "ingenic,x1000-gpio"; 128 reg = <2>; 129 130 gpio-controller; 131 gpio-ranges = <&pinctrl 0 64 32>; 132 #gpio-cells = <2>; 133 134 interrupt-controller; 135 #interrupt-cells = <2>; 136 137 interrupt-parent = <&intc>; 138 interrupts = <15>; 139 }; 140 141 gpd: gpio@3 { 142 compatible = "ingenic,x1000-gpio"; 143 reg = <3>; 144 145 gpio-controller; 146 gpio-ranges = <&pinctrl 0 96 32>; 147 #gpio-cells = <2>; 148 149 interrupt-controller; 150 #interrupt-cells = <2>; 151 152 interrupt-parent = <&intc>; 153 interrupts = <14>; 154 }; 155 }; 156 157 uart0: serial@10030000 { 158 compatible = "ingenic,x1000-uart"; 159 reg = <0x10030000 0x100>; 160 161 interrupt-parent = <&intc>; 162 interrupts = <51>; 163 164 clocks = <&exclk>, <&cgu X1000_CLK_UART0>; 165 clock-names = "baud", "module"; 166 167 status = "disabled"; 168 }; 169 170 uart1: serial@10031000 { 171 compatible = "ingenic,x1000-uart"; 172 reg = <0x10031000 0x100>; 173 174 interrupt-parent = <&intc>; 175 interrupts = <50>; 176 177 clocks = <&exclk>, <&cgu X1000_CLK_UART1>; 178 clock-names = "baud", "module"; 179 180 status = "disabled"; 181 }; 182 183 uart2: serial@10032000 { 184 compatible = "ingenic,x1000-uart"; 185 reg = <0x10032000 0x100>; 186 187 interrupt-parent = <&intc>; 188 interrupts = <49>; 189 190 clocks = <&exclk>, <&cgu X1000_CLK_UART2>; 191 clock-names = "baud", "module"; 192 193 status = "disabled"; 194 }; 195 196 i2c0: i2c-controller@10050000 { 197 compatible = "ingenic,x1000-i2c"; 198 reg = <0x10050000 0x1000>; 199 #address-cells = <1>; 200 #size-cells = <0>; 201 202 interrupt-parent = <&intc>; 203 interrupts = <60>; 204 205 clocks = <&cgu X1000_CLK_I2C0>; 206 207 status = "disabled"; 208 }; 209 210 i2c1: i2c-controller@10051000 { 211 compatible = "ingenic,x1000-i2c"; 212 reg = <0x10051000 0x1000>; 213 #address-cells = <1>; 214 #size-cells = <0>; 215 216 interrupt-parent = <&intc>; 217 interrupts = <59>; 218 219 clocks = <&cgu X1000_CLK_I2C1>; 220 221 status = "disabled"; 222 }; 223 224 i2c2: i2c-controller@10052000 { 225 compatible = "ingenic,x1000-i2c"; 226 reg = <0x10052000 0x1000>; 227 #address-cells = <1>; 228 #size-cells = <0>; 229 230 interrupt-parent = <&intc>; 231 interrupts = <58>; 232 233 clocks = <&cgu X1000_CLK_I2C2>; 234 235 status = "disabled"; 236 }; 237 238 pdma: dma-controller@13420000 { 239 compatible = "ingenic,x1000-dma"; 240 reg = <0x13420000 0x400>, <0x13421000 0x40>; 241 #dma-cells = <2>; 242 243 interrupt-parent = <&intc>; 244 interrupts = <10>; 245 246 clocks = <&cgu X1000_CLK_PDMA>; 247 }; 248 249 msc0: mmc@13450000 { 250 compatible = "ingenic,x1000-mmc"; 251 reg = <0x13450000 0x1000>; 252 253 interrupt-parent = <&intc>; 254 interrupts = <37>; 255 256 clocks = <&cgu X1000_CLK_MSC0>; 257 clock-names = "mmc"; 258 259 cap-sd-highspeed; 260 cap-mmc-highspeed; 261 cap-sdio-irq; 262 263 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>, 264 <&pdma X1000_DMA_MSC0_TX 0xffffffff>; 265 dma-names = "rx", "tx"; 266 267 status = "disabled"; 268 }; 269 270 msc1: mmc@13460000 { 271 compatible = "ingenic,x1000-mmc"; 272 reg = <0x13460000 0x1000>; 273 274 interrupt-parent = <&intc>; 275 interrupts = <36>; 276 277 clocks = <&cgu X1000_CLK_MSC1>; 278 clock-names = "mmc"; 279 280 cap-sd-highspeed; 281 cap-mmc-highspeed; 282 cap-sdio-irq; 283 284 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>, 285 <&pdma X1000_DMA_MSC1_TX 0xffffffff>; 286 dma-names = "rx", "tx"; 287 288 status = "disabled"; 289 }; 290 291 mac: ethernet@134b0000 { 292 compatible = "ingenic,x1000-mac", "snps,dwmac"; 293 reg = <0x134b0000 0x2000>; 294 295 interrupt-parent = <&intc>; 296 interrupts = <55>; 297 interrupt-names = "macirq"; 298 299 clocks = <&cgu X1000_CLK_MAC>; 300 clock-names = "stmmaceth"; 301 302 status = "disabled"; 303 304 mdio: mdio { 305 compatible = "snps,dwmac-mdio"; 306 #address-cells = <1>; 307 #size-cells = <0>; 308 309 status = "disabled"; 310 }; 311 }; 312}; 313