1#include <dt-bindings/clock/jz4740-cgu.h>
2
3/ {
4	#address-cells = <1>;
5	#size-cells = <1>;
6	compatible = "ingenic,jz4740";
7
8	cpuintc: interrupt-controller {
9		#address-cells = <0>;
10		#interrupt-cells = <1>;
11		interrupt-controller;
12		compatible = "mti,cpu-interrupt-controller";
13	};
14
15	intc: interrupt-controller@10001000 {
16		compatible = "ingenic,jz4740-intc";
17		reg = <0x10001000 0x14>;
18
19		interrupt-controller;
20		#interrupt-cells = <1>;
21
22		interrupt-parent = <&cpuintc>;
23		interrupts = <2>;
24	};
25
26	ext: ext {
27		compatible = "fixed-clock";
28		#clock-cells = <0>;
29	};
30
31	rtc: rtc {
32		compatible = "fixed-clock";
33		#clock-cells = <0>;
34		clock-frequency = <32768>;
35	};
36
37	cgu: jz4740-cgu@10000000 {
38		compatible = "ingenic,jz4740-cgu";
39		reg = <0x10000000 0x100>;
40
41		clocks = <&ext>, <&rtc>;
42		clock-names = "ext", "rtc";
43
44		#clock-cells = <1>;
45	};
46
47	rtc_dev: rtc@10003000 {
48		compatible = "ingenic,jz4740-rtc";
49		reg = <0x10003000 0x40>;
50
51		interrupt-parent = <&intc>;
52		interrupts = <15>;
53
54		clocks = <&cgu JZ4740_CLK_RTC>;
55		clock-names = "rtc";
56	};
57
58	uart0: serial@10030000 {
59		compatible = "ingenic,jz4740-uart";
60		reg = <0x10030000 0x100>;
61
62		interrupt-parent = <&intc>;
63		interrupts = <9>;
64
65		clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
66		clock-names = "baud", "module";
67	};
68
69	uart1: serial@10031000 {
70		compatible = "ingenic,jz4740-uart";
71		reg = <0x10031000 0x100>;
72
73		interrupt-parent = <&intc>;
74		interrupts = <8>;
75
76		clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
77		clock-names = "baud", "module";
78	};
79
80	uhc: uhc@13030000 {
81		compatible = "ingenic,jz4740-ohci", "generic-ohci";
82		reg = <0x13030000 0x1000>;
83
84		clocks = <&cgu JZ4740_CLK_UHC>;
85		assigned-clocks = <&cgu JZ4740_CLK_UHC>;
86		assigned-clock-rates = <48000000>;
87
88		interrupt-parent = <&intc>;
89		interrupts = <3>;
90
91		status = "disabled";
92	};
93};
94