1#include <dt-bindings/clock/jz4740-cgu.h> 2 3/ { 4 #address-cells = <1>; 5 #size-cells = <1>; 6 compatible = "ingenic,jz4740"; 7 8 cpuintc: interrupt-controller { 9 #address-cells = <0>; 10 #interrupt-cells = <1>; 11 interrupt-controller; 12 compatible = "mti,cpu-interrupt-controller"; 13 }; 14 15 intc: interrupt-controller@10001000 { 16 compatible = "ingenic,jz4740-intc"; 17 reg = <0x10001000 0x14>; 18 19 interrupt-controller; 20 #interrupt-cells = <1>; 21 22 interrupt-parent = <&cpuintc>; 23 interrupts = <2>; 24 }; 25 26 ext: ext { 27 compatible = "fixed-clock"; 28 #clock-cells = <0>; 29 }; 30 31 rtc: rtc { 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; 34 clock-frequency = <32768>; 35 }; 36 37 cgu: jz4740-cgu@10000000 { 38 compatible = "ingenic,jz4740-cgu"; 39 reg = <0x10000000 0x100>; 40 41 clocks = <&ext>, <&rtc>; 42 clock-names = "ext", "rtc"; 43 44 #clock-cells = <1>; 45 }; 46 47 rtc_dev: rtc@10003000 { 48 compatible = "ingenic,jz4740-rtc"; 49 reg = <0x10003000 0x40>; 50 51 interrupt-parent = <&intc>; 52 interrupts = <15>; 53 54 clocks = <&cgu JZ4740_CLK_RTC>; 55 clock-names = "rtc"; 56 }; 57 58 pinctrl: pin-controller@10010000 { 59 compatible = "ingenic,jz4740-pinctrl"; 60 reg = <0x10010000 0x400>; 61 62 #address-cells = <1>; 63 #size-cells = <0>; 64 65 gpa: gpio@0 { 66 compatible = "ingenic,jz4740-gpio"; 67 reg = <0>; 68 69 gpio-controller; 70 gpio-ranges = <&pinctrl 0 0 32>; 71 #gpio-cells = <2>; 72 73 interrupt-controller; 74 #interrupt-cells = <2>; 75 76 interrupt-parent = <&intc>; 77 interrupts = <28>; 78 }; 79 80 gpb: gpio@1 { 81 compatible = "ingenic,jz4740-gpio"; 82 reg = <1>; 83 84 gpio-controller; 85 gpio-ranges = <&pinctrl 0 32 32>; 86 #gpio-cells = <2>; 87 88 interrupt-controller; 89 #interrupt-cells = <2>; 90 91 interrupt-parent = <&intc>; 92 interrupts = <27>; 93 }; 94 95 gpc: gpio@2 { 96 compatible = "ingenic,jz4740-gpio"; 97 reg = <2>; 98 99 gpio-controller; 100 gpio-ranges = <&pinctrl 0 64 32>; 101 #gpio-cells = <2>; 102 103 interrupt-controller; 104 #interrupt-cells = <2>; 105 106 interrupt-parent = <&intc>; 107 interrupts = <26>; 108 }; 109 110 gpd: gpio@3 { 111 compatible = "ingenic,jz4740-gpio"; 112 reg = <3>; 113 114 gpio-controller; 115 gpio-ranges = <&pinctrl 0 96 32>; 116 #gpio-cells = <2>; 117 118 interrupt-controller; 119 #interrupt-cells = <2>; 120 121 interrupt-parent = <&intc>; 122 interrupts = <25>; 123 }; 124 }; 125 126 uart0: serial@10030000 { 127 compatible = "ingenic,jz4740-uart"; 128 reg = <0x10030000 0x100>; 129 130 interrupt-parent = <&intc>; 131 interrupts = <9>; 132 133 clocks = <&ext>, <&cgu JZ4740_CLK_UART0>; 134 clock-names = "baud", "module"; 135 }; 136 137 uart1: serial@10031000 { 138 compatible = "ingenic,jz4740-uart"; 139 reg = <0x10031000 0x100>; 140 141 interrupt-parent = <&intc>; 142 interrupts = <8>; 143 144 clocks = <&ext>, <&cgu JZ4740_CLK_UART1>; 145 clock-names = "baud", "module"; 146 }; 147 148 uhc: uhc@13030000 { 149 compatible = "ingenic,jz4740-ohci", "generic-ohci"; 150 reg = <0x13030000 0x1000>; 151 152 clocks = <&cgu JZ4740_CLK_UHC>; 153 assigned-clocks = <&cgu JZ4740_CLK_UHC>; 154 assigned-clock-rates = <48000000>; 155 156 interrupt-parent = <&intc>; 157 interrupts = <3>; 158 159 status = "disabled"; 160 }; 161}; 162