1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include "jz4780.dtsi" 5#include <dt-bindings/clock/ingenic,tcu.h> 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/regulator/active-semi,8865-regulator.h> 10 11/ { 12 compatible = "img,ci20", "ingenic,jz4780"; 13 14 aliases { 15 serial0 = &uart0; 16 serial1 = &uart1; 17 serial3 = &uart3; 18 serial4 = &uart4; 19 }; 20 21 chosen { 22 stdout-path = &uart4; 23 }; 24 25 memory { 26 device_type = "memory"; 27 reg = <0x0 0x10000000 28 0x30000000 0x30000000>; 29 }; 30 31 gpio-keys { 32 compatible = "gpio-keys"; 33 34 switch { 35 label = "ci20:sw1"; 36 linux,code = <KEY_F13>; 37 gpios = <&gpd 17 GPIO_ACTIVE_HIGH>; 38 wakeup-source; 39 }; 40 }; 41 42 leds { 43 compatible = "gpio-leds"; 44 45 led-0 { 46 label = "ci20:red:led0"; 47 gpios = <&gpc 3 GPIO_ACTIVE_HIGH>; 48 linux,default-trigger = "none"; 49 }; 50 51 led-1 { 52 label = "ci20:red:led1"; 53 gpios = <&gpc 2 GPIO_ACTIVE_HIGH>; 54 linux,default-trigger = "nand-disk"; 55 }; 56 57 led-2 { 58 label = "ci20:red:led2"; 59 gpios = <&gpc 1 GPIO_ACTIVE_HIGH>; 60 linux,default-trigger = "cpu1"; 61 }; 62 63 led-3 { 64 label = "ci20:red:led3"; 65 gpios = <&gpc 0 GPIO_ACTIVE_HIGH>; 66 linux,default-trigger = "cpu0"; 67 }; 68 }; 69 70 eth0_power: fixedregulator-0 { 71 compatible = "regulator-fixed"; 72 73 regulator-name = "eth0_power"; 74 regulator-min-microvolt = <3300000>; 75 regulator-max-microvolt = <3300000>; 76 77 gpio = <&gpb 25 0>; 78 enable-active-high; 79 }; 80 81 hdmi_out: connector { 82 compatible = "hdmi-connector"; 83 label = "HDMI OUT"; 84 type = "a"; 85 86 ddc-en-gpios = <&gpa 25 GPIO_ACTIVE_HIGH>; 87 88 port { 89 hdmi_con: endpoint { 90 remote-endpoint = <&dw_hdmi_out>; 91 }; 92 }; 93 }; 94 95 ir: ir { 96 compatible = "gpio-ir-receiver"; 97 gpios = <&gpe 3 GPIO_ACTIVE_LOW>; 98 }; 99 100 wlan0_power: fixedregulator-1 { 101 compatible = "regulator-fixed"; 102 103 regulator-name = "wlan0_power"; 104 105 gpio = <&gpb 19 0>; 106 enable-active-high; 107 }; 108 109 otg_power: fixedregulator-2 { 110 compatible = "regulator-fixed"; 111 112 regulator-name = "otg_power"; 113 regulator-min-microvolt = <5000000>; 114 regulator-max-microvolt = <5000000>; 115 116 gpio = <&gpf 15 0>; 117 enable-active-high; 118 }; 119}; 120 121&ext { 122 clock-frequency = <48000000>; 123}; 124 125&cgu { 126 /* 127 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher 128 * precision. 129 */ 130 assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>, 131 <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>, 132 <&cgu JZ4780_CLK_HDMI>; 133 assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>, 134 <&cgu JZ4780_CLK_MPLL>, 135 <&cgu JZ4780_CLK_SSIPLL>; 136 assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>; 137}; 138 139&tcu { 140 /* 141 * 750 kHz for the system timers and clocksource, 142 * use channel #0 and #1 for the per cpu system timers, 143 * and use channel #2 for the clocksource. 144 * 145 * 3000 kHz for the OST timer to provide a higher 146 * precision clocksource. 147 */ 148 assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, 149 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>; 150 assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>; 151}; 152 153&mmc0 { 154 status = "okay"; 155 156 bus-width = <4>; 157 max-frequency = <50000000>; 158 159 pinctrl-names = "default"; 160 pinctrl-0 = <&pins_mmc0>; 161 162 cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>; 163}; 164 165&mmc1 { 166 status = "okay"; 167 168 bus-width = <4>; 169 max-frequency = <50000000>; 170 non-removable; 171 172 pinctrl-names = "default"; 173 pinctrl-0 = <&pins_mmc1>; 174 175 brcmf: wifi@1 { 176/* reg = <4>;*/ 177 compatible = "brcm,bcm4330-fmac"; 178 vcc-supply = <&wlan0_power>; 179 device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>; 180 shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>; 181 }; 182}; 183 184&uart0 { 185 status = "okay"; 186 187 pinctrl-names = "default"; 188 pinctrl-0 = <&pins_uart0>; 189}; 190 191&uart1 { 192 status = "okay"; 193 194 pinctrl-names = "default"; 195 pinctrl-0 = <&pins_uart1>; 196}; 197 198&uart2 { 199 status = "okay"; 200 201 pinctrl-names = "default"; 202 pinctrl-0 = <&pins_uart2>; 203 uart-has-rtscts; 204 205 bluetooth { 206 compatible = "brcm,bcm4330-bt"; 207 reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>; 208 vcc-supply = <&wlan0_power>; 209 device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>; 210 host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>; 211 shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>; 212 }; 213}; 214 215&uart3 { 216 status = "okay"; 217 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pins_uart3>; 220}; 221 222&uart4 { 223 status = "okay"; 224 225 pinctrl-names = "default"; 226 pinctrl-0 = <&pins_uart4>; 227}; 228 229&i2c0 { 230 status = "okay"; 231 232 pinctrl-names = "default"; 233 pinctrl-0 = <&pins_i2c0>; 234 235 clock-frequency = <400000>; 236 237 act8600: act8600@5a { 238 compatible = "active-semi,act8600"; 239 reg = <0x5a>; 240 241 regulators { 242 vddcore: DCDC1 { 243 regulator-min-microvolt = <1100000>; 244 regulator-max-microvolt = <1100000>; 245 vp1-supply = <&vcc_33v>; 246 regulator-always-on; 247 }; 248 vddmem: DCDC2 { 249 regulator-min-microvolt = <1500000>; 250 regulator-max-microvolt = <1500000>; 251 vp2-supply = <&vcc_33v>; 252 regulator-always-on; 253 }; 254 vcc_33: DCDC3 { 255 regulator-min-microvolt = <3300000>; 256 regulator-max-microvolt = <3300000>; 257 vp3-supply = <&vcc_33v>; 258 regulator-always-on; 259 }; 260 vcc_50: SUDCDC_REG4 { 261 regulator-min-microvolt = <5000000>; 262 regulator-max-microvolt = <5000000>; 263 regulator-always-on; 264 }; 265 vcc_25: LDO5 { 266 regulator-min-microvolt = <2500000>; 267 regulator-max-microvolt = <2500000>; 268 inl-supply = <&vcc_33v>; 269 regulator-always-on; 270 }; 271 wifi_io: LDO6 { 272 regulator-min-microvolt = <2500000>; 273 regulator-max-microvolt = <2500000>; 274 inl-supply = <&vcc_33v>; 275 regulator-always-on; 276 }; 277 cim_io_28: LDO7 { 278 regulator-min-microvolt = <2800000>; 279 regulator-max-microvolt = <2800000>; 280 inl-supply = <&vcc_33v>; 281 regulator-always-on; 282 }; 283 cim_io_15: LDO8 { 284 regulator-min-microvolt = <1500000>; 285 regulator-max-microvolt = <1500000>; 286 inl-supply = <&vcc_33v>; 287 regulator-always-on; 288 }; 289 vrtc_18: LDO_REG9 { 290 /* Despite the datasheet stating 3.3V 291 * for REG9 and the driver expecting that, 292 * REG9 outputs 1.8V. 293 * Likely the CI20 uses a proprietary 294 * factory programmed chip variant. 295 * Since this is a simple on/off LDO the 296 * exact values do not matter. 297 */ 298 regulator-min-microvolt = <3300000>; 299 regulator-max-microvolt = <3300000>; 300 regulator-always-on; 301 }; 302 vcc_11: LDO_REG10 { 303 regulator-min-microvolt = <1200000>; 304 regulator-max-microvolt = <1200000>; 305 regulator-always-on; 306 }; 307 }; 308 }; 309}; 310 311&i2c1 { 312 status = "okay"; 313 314 pinctrl-names = "default"; 315 pinctrl-0 = <&pins_i2c1>; 316 317}; 318 319&i2c2 { 320 status = "okay"; 321 322 pinctrl-names = "default"; 323 pinctrl-0 = <&pins_i2c2>; 324 325}; 326 327&i2c3 { 328 status = "okay"; 329 330 pinctrl-names = "default"; 331 pinctrl-0 = <&pins_i2c3>; 332 333}; 334 335&i2c4 { 336 status = "okay"; 337 338 pinctrl-names = "default"; 339 pinctrl-0 = <&pins_i2c4>; 340 341 clock-frequency = <400000>; 342 343 rtc@51 { 344 compatible = "nxp,pcf8563"; 345 reg = <0x51>; 346 347 interrupt-parent = <&gpf>; 348 interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 349 }; 350}; 351 352&nemc { 353 status = "okay"; 354 355 nandc: nand-controller@1 { 356 compatible = "ingenic,jz4780-nand"; 357 reg = <1 0 0x1000000>; 358 359 #address-cells = <1>; 360 #size-cells = <0>; 361 362 ingenic,bch-controller = <&bch>; 363 364 ingenic,nemc-tAS = <10>; 365 ingenic,nemc-tAH = <5>; 366 ingenic,nemc-tBP = <10>; 367 ingenic,nemc-tAW = <15>; 368 ingenic,nemc-tSTRV = <100>; 369 370 /* 371 * Only CLE/ALE are needed for the devices that are connected, rather 372 * than the full address line set. 373 */ 374 pinctrl-names = "default"; 375 pinctrl-0 = <&pins_nemc>; 376 377 nand@1 { 378 reg = <1>; 379 380 nand-ecc-step-size = <1024>; 381 nand-ecc-strength = <24>; 382 nand-ecc-mode = "hw"; 383 nand-on-flash-bbt; 384 385 pinctrl-names = "default"; 386 pinctrl-0 = <&pins_nemc_cs1>; 387 388 partitions { 389 compatible = "fixed-partitions"; 390 #address-cells = <2>; 391 #size-cells = <2>; 392 393 partition@0 { 394 label = "u-boot-spl"; 395 reg = <0x0 0x0 0x0 0x800000>; 396 }; 397 398 partition@800000 { 399 label = "u-boot"; 400 reg = <0x0 0x800000 0x0 0x200000>; 401 }; 402 403 partition@a00000 { 404 label = "u-boot-env"; 405 reg = <0x0 0xa00000 0x0 0x200000>; 406 }; 407 408 partition@c00000 { 409 label = "boot"; 410 reg = <0x0 0xc00000 0x0 0x4000000>; 411 }; 412 413 partition@4c00000 { 414 label = "system"; 415 reg = <0x0 0x4c00000 0x1 0xfb400000>; 416 }; 417 }; 418 }; 419 }; 420 421 dm9000@6 { 422 compatible = "davicom,dm9000"; 423 davicom,no-eeprom; 424 425 pinctrl-names = "default"; 426 pinctrl-0 = <&pins_nemc_cs6>; 427 428 reg = <6 0 1 /* addr */ 429 6 2 1>; /* data */ 430 431 ingenic,nemc-tAS = <15>; 432 ingenic,nemc-tAH = <10>; 433 ingenic,nemc-tBP = <20>; 434 ingenic,nemc-tAW = <50>; 435 ingenic,nemc-tSTRV = <100>; 436 437 reset-gpios = <&gpf 12 GPIO_ACTIVE_LOW>; 438 vcc-supply = <ð0_power>; 439 440 interrupt-parent = <&gpe>; 441 interrupts = <19 4>; 442 443 nvmem-cells = <ð0_addr>; 444 nvmem-cell-names = "mac-address"; 445 }; 446}; 447 448&bch { 449 status = "okay"; 450}; 451 452&otg_phy { 453 status = "okay"; 454 455 vcc-supply = <&otg_power>; 456}; 457 458&otg { 459 status = "okay"; 460}; 461 462&pinctrl { 463 pins_uart0: uart0 { 464 function = "uart0"; 465 groups = "uart0-data"; 466 bias-disable; 467 }; 468 469 pins_uart1: uart1 { 470 function = "uart1"; 471 groups = "uart1-data"; 472 bias-disable; 473 }; 474 475 pins_uart2: uart2 { 476 function = "uart2"; 477 groups = "uart2-data", "uart2-hwflow"; 478 bias-disable; 479 }; 480 481 pins_uart3: uart3 { 482 function = "uart3"; 483 groups = "uart3-data", "uart3-hwflow"; 484 bias-disable; 485 }; 486 487 pins_uart4: uart4 { 488 function = "uart4"; 489 groups = "uart4-data"; 490 bias-disable; 491 }; 492 493 pins_i2c0: i2c0 { 494 function = "i2c0"; 495 groups = "i2c0-data"; 496 bias-disable; 497 }; 498 499 pins_i2c1: i2c1 { 500 function = "i2c1"; 501 groups = "i2c1-data"; 502 bias-disable; 503 }; 504 505 pins_i2c2: i2c2 { 506 function = "i2c2"; 507 groups = "i2c2-data"; 508 bias-disable; 509 }; 510 511 pins_i2c3: i2c3 { 512 function = "i2c3"; 513 groups = "i2c3-data"; 514 bias-disable; 515 }; 516 517 pins_i2c4: i2c4 { 518 function = "i2c4"; 519 groups = "i2c4-data-e"; 520 bias-disable; 521 }; 522 523 pins_hdmi_ddc: hdmi_ddc { 524 function = "hdmi-ddc"; 525 groups = "hdmi-ddc"; 526 bias-disable; 527 }; 528 529 pins_nemc: nemc { 530 function = "nemc"; 531 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; 532 bias-disable; 533 }; 534 535 pins_nemc_cs1: nemc-cs1 { 536 function = "nemc-cs1"; 537 groups = "nemc-cs1"; 538 bias-disable; 539 }; 540 541 pins_nemc_cs6: nemc-cs6 { 542 function = "nemc-cs6"; 543 groups = "nemc-cs6"; 544 bias-disable; 545 }; 546 547 pins_mmc0: mmc0 { 548 function = "mmc0"; 549 groups = "mmc0-1bit-e", "mmc0-4bit-e"; 550 bias-disable; 551 }; 552 553 pins_mmc1: mmc1 { 554 function = "mmc1"; 555 groups = "mmc1-1bit-d", "mmc1-4bit-d"; 556 bias-disable; 557 }; 558}; 559 560&hdmi { 561 status = "okay"; 562 563 pinctrl-names = "default"; 564 pinctrl-0 = <&pins_hdmi_ddc>; 565 566 ports { 567 #address-cells = <1>; 568 #size-cells = <0>; 569 570 port@0 { 571 reg = <0>; 572 dw_hdmi_in: endpoint { 573 remote-endpoint = <&lcd_out>; 574 }; 575 }; 576 577 port@1 { 578 reg = <1>; 579 dw_hdmi_out: endpoint { 580 remote-endpoint = <&hdmi_con>; 581 }; 582 }; 583 }; 584}; 585 586&lcdc0 { 587 status = "okay"; 588 589 port { 590 lcd_out: endpoint { 591 remote-endpoint = <&dw_hdmi_in>; 592 }; 593 }; 594}; 595