xref: /openbmc/linux/arch/mips/boot/dts/ingenic/ci20.dts (revision e7f127b2)
1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include "jz4780.dtsi"
5#include <dt-bindings/clock/ingenic,tcu.h>
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/input/input.h>
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/regulator/active-semi,8865-regulator.h>
10
11/ {
12	compatible = "img,ci20", "ingenic,jz4780";
13
14	aliases {
15		serial0 = &uart0;
16		serial1 = &uart1;
17		serial3 = &uart3;
18		serial4 = &uart4;
19	};
20
21	chosen {
22		stdout-path = &uart4;
23	};
24
25	memory {
26		device_type = "memory";
27		reg = <0x0 0x10000000
28		       0x30000000 0x30000000>;
29	};
30
31	gpio-keys {
32		compatible = "gpio-keys";
33
34		sw1 {
35			label = "ci20:sw1";
36			linux,code = <KEY_F13>;
37			gpios = <&gpd 17 GPIO_ACTIVE_HIGH>;
38			wakeup-source;
39		};
40	};
41
42	leds {
43		compatible = "gpio-leds";
44
45		led0 {
46			label = "ci20:red:led0";
47			gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
48			linux,default-trigger = "none";
49		};
50
51		led1 {
52			label = "ci20:red:led1";
53			gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
54			linux,default-trigger = "nand-disk";
55		};
56
57		led2 {
58			label = "ci20:red:led2";
59			gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
60			linux,default-trigger = "cpu1";
61		};
62
63		led3 {
64			label = "ci20:red:led3";
65			gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
66			linux,default-trigger = "cpu0";
67		};
68	};
69
70	eth0_power: fixedregulator@0 {
71		compatible = "regulator-fixed";
72
73		regulator-name = "eth0_power";
74		regulator-min-microvolt = <3300000>;
75		regulator-max-microvolt = <3300000>;
76
77		gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
78		enable-active-high;
79	};
80
81	hdmi_out: connector {
82		compatible = "hdmi-connector";
83		label = "HDMI OUT";
84		type = "a";
85
86		port {
87			hdmi_con: endpoint {
88				remote-endpoint = <&dw_hdmi_out>;
89			};
90		};
91	};
92
93	ir: ir {
94		compatible = "gpio-ir-receiver";
95		gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
96	};
97
98	wlan0_power: fixedregulator@1 {
99		compatible = "regulator-fixed";
100
101		regulator-name = "wlan0_power";
102
103		gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
104		enable-active-high;
105	};
106
107	otg_power: fixedregulator@2 {
108		compatible = "regulator-fixed";
109
110		regulator-name = "otg_power";
111		regulator-min-microvolt = <5000000>;
112		regulator-max-microvolt = <5000000>;
113
114		gpio = <&gpf 14 GPIO_ACTIVE_LOW>;
115		enable-active-high;
116	};
117
118	hdmi_power: fixedregulator@3 {
119		compatible = "regulator-fixed";
120
121		regulator-name = "hdmi_power";
122		regulator-min-microvolt = <5000000>;
123		regulator-max-microvolt = <5000000>;
124
125		gpio = <&gpa 25 0>;
126		enable-active-high;
127	};
128};
129
130&ext {
131	clock-frequency = <48000000>;
132};
133
134&cgu {
135	/*
136	 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
137	 * precision.
138	 */
139	assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
140			  <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>,
141			  <&cgu JZ4780_CLK_HDMI>;
142	assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
143				 <&cgu JZ4780_CLK_MPLL>,
144				 <&cgu JZ4780_CLK_SSIPLL>;
145	assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>;
146};
147
148&tcu {
149	/*
150	 * 750 kHz for the system timers and clocksource,
151	 * use channel #0 and #1 for the per cpu system timers,
152	 * and use channel #2 for the clocksource.
153	 *
154	 * 3000 kHz for the OST timer to provide a higher
155	 * precision clocksource.
156	 */
157	assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
158					  <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>;
159	assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>;
160};
161
162&mmc0 {
163	status = "okay";
164
165	bus-width = <4>;
166	max-frequency = <50000000>;
167
168	pinctrl-names = "default";
169	pinctrl-0 = <&pins_mmc0>;
170
171	cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
172};
173
174&mmc1 {
175	status = "okay";
176
177	bus-width = <4>;
178	max-frequency = <50000000>;
179	non-removable;
180
181	pinctrl-names = "default";
182	pinctrl-0 = <&pins_mmc1>;
183
184	brcmf: wifi@1 {
185/*		reg = <4>;*/
186		compatible = "brcm,bcm4330-fmac";
187		vcc-supply = <&wlan0_power>;
188		device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
189		shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
190	};
191};
192
193&uart0 {
194	status = "okay";
195
196	pinctrl-names = "default";
197	pinctrl-0 = <&pins_uart0>;
198};
199
200&uart1 {
201	status = "okay";
202
203	pinctrl-names = "default";
204	pinctrl-0 = <&pins_uart1>;
205};
206
207&uart2 {
208	status = "okay";
209
210	pinctrl-names = "default";
211	pinctrl-0 = <&pins_uart2>;
212	uart-has-rtscts;
213
214	bluetooth {
215		compatible = "brcm,bcm4330-bt";
216		reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
217		vcc-supply = <&wlan0_power>;
218		device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
219		host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
220		shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
221	};
222};
223
224&uart3 {
225	status = "okay";
226
227	pinctrl-names = "default";
228	pinctrl-0 = <&pins_uart3>;
229};
230
231&uart4 {
232	status = "okay";
233
234	pinctrl-names = "default";
235	pinctrl-0 = <&pins_uart4>;
236};
237
238&i2c0 {
239	status = "okay";
240
241	pinctrl-names = "default";
242	pinctrl-0 = <&pins_i2c0>;
243
244	clock-frequency = <400000>;
245
246	act8600: act8600@5a {
247		compatible = "active-semi,act8600";
248		reg = <0x5a>;
249		status = "okay";
250
251		regulators {
252			vddcore: SUDCDC1 {
253				regulator-name = "DCDC_REG1";
254				regulator-min-microvolt = <1100000>;
255				regulator-max-microvolt = <1100000>;
256				regulator-always-on;
257			};
258			vddmem: SUDCDC2 {
259				regulator-name = "DCDC_REG2";
260				regulator-min-microvolt = <1500000>;
261				regulator-max-microvolt = <1500000>;
262				regulator-always-on;
263			};
264			vcc_33: SUDCDC3 {
265				regulator-name = "DCDC_REG3";
266				regulator-min-microvolt = <3300000>;
267				regulator-max-microvolt = <3300000>;
268				regulator-always-on;
269			};
270			vcc_50: SUDCDC4 {
271				regulator-name = "SUDCDC_REG4";
272				regulator-min-microvolt = <5000000>;
273				regulator-max-microvolt = <5000000>;
274				regulator-always-on;
275			};
276			vcc_25: LDO_REG5 {
277				regulator-name = "LDO_REG5";
278				regulator-min-microvolt = <2500000>;
279				regulator-max-microvolt = <2500000>;
280				regulator-always-on;
281			};
282			wifi_io: LDO_REG6 {
283				regulator-name = "LDO_REG6";
284				regulator-min-microvolt = <2500000>;
285				regulator-max-microvolt = <2500000>;
286				regulator-always-on;
287			};
288			vcc_28: LDO_REG7 {
289				regulator-name = "LDO_REG7";
290				regulator-min-microvolt = <2800000>;
291				regulator-max-microvolt = <2800000>;
292				regulator-always-on;
293			};
294			vcc_15: LDO_REG8 {
295				regulator-name = "LDO_REG8";
296				regulator-min-microvolt = <1500000>;
297				regulator-max-microvolt = <1500000>;
298				regulator-always-on;
299			};
300			vrtc_18: LDO_REG9 {
301				regulator-name = "LDO_REG9";
302				/* Despite the datasheet stating 3.3V
303				 * for REG9 and the driver expecting that,
304				 * REG9 outputs 1.8V.
305				 * Likely the CI20 uses a proprietary
306				 * factory programmed chip variant.
307				 * Since this is a simple on/off LDO the
308				 * exact values do not matter.
309				 */
310				regulator-min-microvolt = <3300000>;
311				regulator-max-microvolt = <3300000>;
312				regulator-always-on;
313			};
314			vcc_11: LDO_REG10 {
315				regulator-name = "LDO_REG10";
316				regulator-min-microvolt = <1200000>;
317				regulator-max-microvolt = <1200000>;
318				regulator-always-on;
319			};
320		};
321	};
322};
323
324&i2c1 {
325	status = "okay";
326
327	pinctrl-names = "default";
328	pinctrl-0 = <&pins_i2c1>;
329
330};
331
332&i2c2 {
333	status = "okay";
334
335	pinctrl-names = "default";
336	pinctrl-0 = <&pins_i2c2>;
337
338};
339
340&i2c3 {
341	status = "okay";
342
343	pinctrl-names = "default";
344	pinctrl-0 = <&pins_i2c3>;
345
346};
347
348&i2c4 {
349	status = "okay";
350
351	pinctrl-names = "default";
352	pinctrl-0 = <&pins_i2c4>;
353
354	clock-frequency = <400000>;
355
356		rtc@51 {
357			compatible = "nxp,pcf8563";
358			reg = <0x51>;
359
360			interrupt-parent = <&gpf>;
361			interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
362		};
363};
364
365&nemc {
366	status = "okay";
367
368	nandc: nand-controller@1 {
369		compatible = "ingenic,jz4780-nand";
370		reg = <1 0 0x1000000>;
371
372		#address-cells = <1>;
373		#size-cells = <0>;
374
375		ingenic,bch-controller = <&bch>;
376
377		ingenic,nemc-tAS = <10>;
378		ingenic,nemc-tAH = <5>;
379		ingenic,nemc-tBP = <10>;
380		ingenic,nemc-tAW = <15>;
381		ingenic,nemc-tSTRV = <100>;
382
383		/*
384		 * Only CLE/ALE are needed for the devices that are connected, rather
385		 * than the full address line set.
386		 */
387		pinctrl-names = "default";
388		pinctrl-0 = <&pins_nemc>;
389
390		nand@1 {
391			reg = <1>;
392
393			nand-ecc-step-size = <1024>;
394			nand-ecc-strength = <24>;
395			nand-ecc-mode = "hw";
396			nand-on-flash-bbt;
397
398			pinctrl-names = "default";
399			pinctrl-0 = <&pins_nemc_cs1>;
400
401			partitions {
402				compatible = "fixed-partitions";
403				#address-cells = <2>;
404				#size-cells = <2>;
405
406				partition@0 {
407					label = "u-boot-spl";
408					reg = <0x0 0x0 0x0 0x800000>;
409				};
410
411				partition@800000 {
412					label = "u-boot";
413					reg = <0x0 0x800000 0x0 0x200000>;
414				};
415
416				partition@a00000 {
417					label = "u-boot-env";
418					reg = <0x0 0xa00000 0x0 0x200000>;
419				};
420
421				partition@c00000 {
422					label = "boot";
423					reg = <0x0 0xc00000 0x0 0x4000000>;
424				};
425
426				partition@4c00000 {
427					label = "system";
428					reg = <0x0 0x4c00000 0x1 0xfb400000>;
429				};
430			};
431		};
432	};
433
434	dm9000@6 {
435		compatible = "davicom,dm9000";
436		davicom,no-eeprom;
437
438		pinctrl-names = "default";
439		pinctrl-0 = <&pins_nemc_cs6>;
440
441		reg = <6 0 1   /* addr */
442		       6 2 1>; /* data */
443
444		ingenic,nemc-tAS = <15>;
445		ingenic,nemc-tAH = <10>;
446		ingenic,nemc-tBP = <20>;
447		ingenic,nemc-tAW = <50>;
448		ingenic,nemc-tSTRV = <100>;
449
450		reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
451		vcc-supply = <&eth0_power>;
452
453		interrupt-parent = <&gpe>;
454		interrupts = <19 4>;
455
456		nvmem-cells = <&eth0_addr>;
457		nvmem-cell-names = "mac-address";
458	};
459};
460
461&bch {
462	status = "okay";
463};
464
465&otg_phy {
466	status = "okay";
467
468	vcc-supply = <&otg_power>;
469};
470
471&otg {
472	status = "okay";
473};
474
475&pinctrl {
476	pins_uart0: uart0 {
477		function = "uart0";
478		groups = "uart0-data";
479		bias-disable;
480	};
481
482	pins_uart1: uart1 {
483		function = "uart1";
484		groups = "uart1-data";
485		bias-disable;
486	};
487
488	pins_uart2: uart2 {
489		function = "uart2";
490		groups = "uart2-data", "uart2-hwflow";
491		bias-disable;
492	};
493
494	pins_uart3: uart3 {
495		function = "uart3";
496		groups = "uart3-data", "uart3-hwflow";
497		bias-disable;
498	};
499
500	pins_uart4: uart4 {
501		function = "uart4";
502		groups = "uart4-data";
503		bias-disable;
504	};
505
506	pins_i2c0: i2c0 {
507		function = "i2c0";
508		groups = "i2c0-data";
509		bias-disable;
510	};
511
512	pins_i2c1: i2c1 {
513		function = "i2c1";
514		groups = "i2c1-data";
515		bias-disable;
516	};
517
518	pins_i2c2: i2c2 {
519		function = "i2c2";
520		groups = "i2c2-data";
521		bias-disable;
522	};
523
524	pins_i2c3: i2c3 {
525		function = "i2c3";
526		groups = "i2c3-data";
527		bias-disable;
528	};
529
530	pins_i2c4: i2c4 {
531		function = "i2c4";
532		groups = "i2c4-data-e";
533		bias-disable;
534	};
535
536	pins_hdmi_ddc: hdmi_ddc {
537		function = "hdmi-ddc";
538		groups = "hdmi-ddc";
539		bias-disable;
540	};
541
542	pins_nemc: nemc {
543		function = "nemc";
544		groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
545		bias-disable;
546	};
547
548	pins_nemc_cs1: nemc-cs1 {
549		function = "nemc-cs1";
550		groups = "nemc-cs1";
551		bias-disable;
552	};
553
554	pins_nemc_cs6: nemc-cs6 {
555		function = "nemc-cs6";
556		groups = "nemc-cs6";
557		bias-disable;
558	};
559
560	pins_mmc0: mmc0 {
561		function = "mmc0";
562		groups = "mmc0-1bit-e", "mmc0-4bit-e";
563		bias-disable;
564	};
565
566	pins_mmc1: mmc1 {
567		function = "mmc1";
568		groups = "mmc1-1bit-d", "mmc1-4bit-d";
569		bias-disable;
570	};
571};
572
573&hdmi {
574	status = "okay";
575
576	pinctrl-names = "default";
577	pinctrl-0 = <&pins_hdmi_ddc>;
578
579	hdmi-5v-supply = <&hdmi_power>;
580
581	ports {
582		#address-cells = <1>;
583		#size-cells = <0>;
584
585		port@0 {
586			reg = <0>;
587			dw_hdmi_in: endpoint {
588				remote-endpoint = <&lcd_out>;
589			};
590		};
591
592		port@1 {
593			reg = <1>;
594			dw_hdmi_out: endpoint {
595				remote-endpoint = <&hdmi_con>;
596			};
597		};
598	};
599};
600
601&lcdc0 {
602	status = "okay";
603
604	port {
605		lcd_out: endpoint {
606			remote-endpoint = <&dw_hdmi_in>;
607		};
608	};
609};
610