1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include "jz4780.dtsi" 5#include <dt-bindings/clock/ingenic,tcu.h> 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/regulator/active-semi,8865-regulator.h> 10 11/ { 12 compatible = "img,ci20", "ingenic,jz4780"; 13 14 aliases { 15 serial0 = &uart0; 16 serial1 = &uart1; 17 serial3 = &uart3; 18 serial4 = &uart4; 19 }; 20 21 chosen { 22 stdout-path = &uart4; 23 }; 24 25 memory { 26 device_type = "memory"; 27 reg = <0x0 0x10000000 28 0x30000000 0x30000000>; 29 }; 30 31 gpio-keys { 32 compatible = "gpio-keys"; 33 34 sw1 { 35 label = "ci20:sw1"; 36 linux,code = <KEY_F13>; 37 gpios = <&gpd 17 GPIO_ACTIVE_HIGH>; 38 wakeup-source; 39 }; 40 }; 41 42 leds { 43 compatible = "gpio-leds"; 44 45 led0 { 46 label = "ci20:red:led0"; 47 gpios = <&gpc 3 GPIO_ACTIVE_HIGH>; 48 linux,default-trigger = "none"; 49 }; 50 51 led1 { 52 label = "ci20:red:led1"; 53 gpios = <&gpc 2 GPIO_ACTIVE_HIGH>; 54 linux,default-trigger = "nand-disk"; 55 }; 56 57 led2 { 58 label = "ci20:red:led2"; 59 gpios = <&gpc 1 GPIO_ACTIVE_HIGH>; 60 linux,default-trigger = "cpu1"; 61 }; 62 63 led3 { 64 label = "ci20:red:led3"; 65 gpios = <&gpc 0 GPIO_ACTIVE_HIGH>; 66 linux,default-trigger = "cpu0"; 67 }; 68 }; 69 70 eth0_power: fixedregulator@0 { 71 compatible = "regulator-fixed"; 72 regulator-name = "eth0_power"; 73 regulator-min-microvolt = <3300000>; 74 regulator-max-microvolt = <3300000>; 75 gpio = <&gpb 25 GPIO_ACTIVE_LOW>; 76 enable-active-high; 77 }; 78 79 ir: ir { 80 compatible = "gpio-ir-receiver"; 81 gpios = <&gpe 3 GPIO_ACTIVE_LOW>; 82 }; 83 84 wlan0_power: fixedregulator@1 { 85 compatible = "regulator-fixed"; 86 regulator-name = "wlan0_power"; 87 gpio = <&gpb 19 GPIO_ACTIVE_LOW>; 88 enable-active-high; 89 }; 90}; 91 92&ext { 93 clock-frequency = <48000000>; 94}; 95 96&mmc0 { 97 status = "okay"; 98 99 bus-width = <4>; 100 max-frequency = <50000000>; 101 102 pinctrl-names = "default"; 103 pinctrl-0 = <&pins_mmc0>; 104 105 cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>; 106}; 107 108&mmc1 { 109 status = "okay"; 110 111 bus-width = <4>; 112 max-frequency = <50000000>; 113 non-removable; 114 115 pinctrl-names = "default"; 116 pinctrl-0 = <&pins_mmc1>; 117 118 brcmf: wifi@1 { 119/* reg = <4>;*/ 120 compatible = "brcm,bcm4330-fmac"; 121 vcc-supply = <&wlan0_power>; 122 device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>; 123 shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>; 124 }; 125}; 126 127&uart0 { 128 status = "okay"; 129 130 pinctrl-names = "default"; 131 pinctrl-0 = <&pins_uart0>; 132}; 133 134&uart1 { 135 status = "okay"; 136 137 pinctrl-names = "default"; 138 pinctrl-0 = <&pins_uart1>; 139}; 140 141&uart2 { 142 status = "okay"; 143 144 pinctrl-names = "default"; 145 pinctrl-0 = <&pins_uart2>; 146 uart-has-rtscts; 147 148 bluetooth { 149 compatible = "brcm,bcm4330-bt"; 150 reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>; 151 vcc-supply = <&wlan0_power>; 152 device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>; 153 host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>; 154 shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>; 155 }; 156}; 157 158&uart3 { 159 status = "okay"; 160 161 pinctrl-names = "default"; 162 pinctrl-0 = <&pins_uart3>; 163}; 164 165&uart4 { 166 status = "okay"; 167 168 pinctrl-names = "default"; 169 pinctrl-0 = <&pins_uart4>; 170}; 171 172&i2c0 { 173 status = "okay"; 174 175 pinctrl-names = "default"; 176 pinctrl-0 = <&pins_i2c0>; 177 178 clock-frequency = <400000>; 179 180 act8600: act8600@5a { 181 compatible = "active-semi,act8600"; 182 reg = <0x5a>; 183 status = "okay"; 184 185 regulators { 186 vddcore: SUDCDC1 { 187 regulator-name = "DCDC_REG1"; 188 regulator-min-microvolt = <1100000>; 189 regulator-max-microvolt = <1100000>; 190 regulator-always-on; 191 }; 192 vddmem: SUDCDC2 { 193 regulator-name = "DCDC_REG2"; 194 regulator-min-microvolt = <1500000>; 195 regulator-max-microvolt = <1500000>; 196 regulator-always-on; 197 }; 198 vcc_33: SUDCDC3 { 199 regulator-name = "DCDC_REG3"; 200 regulator-min-microvolt = <3300000>; 201 regulator-max-microvolt = <3300000>; 202 regulator-always-on; 203 }; 204 vcc_50: SUDCDC4 { 205 regulator-name = "SUDCDC_REG4"; 206 regulator-min-microvolt = <5000000>; 207 regulator-max-microvolt = <5000000>; 208 regulator-always-on; 209 }; 210 vcc_25: LDO_REG5 { 211 regulator-name = "LDO_REG5"; 212 regulator-min-microvolt = <2500000>; 213 regulator-max-microvolt = <2500000>; 214 regulator-always-on; 215 }; 216 wifi_io: LDO_REG6 { 217 regulator-name = "LDO_REG6"; 218 regulator-min-microvolt = <2500000>; 219 regulator-max-microvolt = <2500000>; 220 regulator-always-on; 221 }; 222 vcc_28: LDO_REG7 { 223 regulator-name = "LDO_REG7"; 224 regulator-min-microvolt = <2800000>; 225 regulator-max-microvolt = <2800000>; 226 regulator-always-on; 227 }; 228 vcc_15: LDO_REG8 { 229 regulator-name = "LDO_REG8"; 230 regulator-min-microvolt = <1500000>; 231 regulator-max-microvolt = <1500000>; 232 regulator-always-on; 233 }; 234 vrtc_18: LDO_REG9 { 235 regulator-name = "LDO_REG9"; 236 /* Despite the datasheet stating 3.3V 237 * for REG9 and the driver expecting that, 238 * REG9 outputs 1.8V. 239 * Likely the CI20 uses a proprietary 240 * factory programmed chip variant. 241 * Since this is a simple on/off LDO the 242 * exact values do not matter. 243 */ 244 regulator-min-microvolt = <3300000>; 245 regulator-max-microvolt = <3300000>; 246 regulator-always-on; 247 }; 248 vcc_11: LDO_REG10 { 249 regulator-name = "LDO_REG10"; 250 regulator-min-microvolt = <1200000>; 251 regulator-max-microvolt = <1200000>; 252 regulator-always-on; 253 }; 254 }; 255 }; 256}; 257 258&i2c1 { 259 status = "okay"; 260 261 pinctrl-names = "default"; 262 pinctrl-0 = <&pins_i2c1>; 263 264}; 265 266&i2c2 { 267 status = "okay"; 268 269 pinctrl-names = "default"; 270 pinctrl-0 = <&pins_i2c2>; 271 272}; 273 274&i2c3 { 275 status = "okay"; 276 277 pinctrl-names = "default"; 278 pinctrl-0 = <&pins_i2c3>; 279 280}; 281 282&i2c4 { 283 status = "okay"; 284 285 pinctrl-names = "default"; 286 pinctrl-0 = <&pins_i2c4>; 287 288 clock-frequency = <400000>; 289 290 rtc@51 { 291 compatible = "nxp,pcf8563"; 292 reg = <0x51>; 293 294 interrupt-parent = <&gpf>; 295 interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 296 }; 297}; 298 299&nemc { 300 status = "okay"; 301 302 nandc: nand-controller@1 { 303 compatible = "ingenic,jz4780-nand"; 304 reg = <1 0 0x1000000>; 305 306 #address-cells = <1>; 307 #size-cells = <0>; 308 309 ingenic,bch-controller = <&bch>; 310 311 ingenic,nemc-tAS = <10>; 312 ingenic,nemc-tAH = <5>; 313 ingenic,nemc-tBP = <10>; 314 ingenic,nemc-tAW = <15>; 315 ingenic,nemc-tSTRV = <100>; 316 317 /* 318 * Only CLE/ALE are needed for the devices that are connected, rather 319 * than the full address line set. 320 */ 321 pinctrl-names = "default"; 322 pinctrl-0 = <&pins_nemc>; 323 324 nand@1 { 325 reg = <1>; 326 327 nand-ecc-step-size = <1024>; 328 nand-ecc-strength = <24>; 329 nand-ecc-mode = "hw"; 330 nand-on-flash-bbt; 331 332 pinctrl-names = "default"; 333 pinctrl-0 = <&pins_nemc_cs1>; 334 335 partitions { 336 compatible = "fixed-partitions"; 337 #address-cells = <2>; 338 #size-cells = <2>; 339 340 partition@0 { 341 label = "u-boot-spl"; 342 reg = <0x0 0x0 0x0 0x800000>; 343 }; 344 345 partition@800000 { 346 label = "u-boot"; 347 reg = <0x0 0x800000 0x0 0x200000>; 348 }; 349 350 partition@a00000 { 351 label = "u-boot-env"; 352 reg = <0x0 0xa00000 0x0 0x200000>; 353 }; 354 355 partition@c00000 { 356 label = "boot"; 357 reg = <0x0 0xc00000 0x0 0x4000000>; 358 }; 359 360 partition@4c00000 { 361 label = "system"; 362 reg = <0x0 0x4c00000 0x1 0xfb400000>; 363 }; 364 }; 365 }; 366 }; 367 368 dm9000@6 { 369 compatible = "davicom,dm9000"; 370 davicom,no-eeprom; 371 372 pinctrl-names = "default"; 373 pinctrl-0 = <&pins_nemc_cs6>; 374 375 reg = <6 0 1 /* addr */ 376 6 2 1>; /* data */ 377 378 ingenic,nemc-tAS = <15>; 379 ingenic,nemc-tAH = <10>; 380 ingenic,nemc-tBP = <20>; 381 ingenic,nemc-tAW = <50>; 382 ingenic,nemc-tSTRV = <100>; 383 384 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>; 385 vcc-supply = <ð0_power>; 386 387 interrupt-parent = <&gpe>; 388 interrupts = <19 4>; 389 390 nvmem-cells = <ð0_addr>; 391 nvmem-cell-names = "mac-address"; 392 }; 393}; 394 395&bch { 396 status = "okay"; 397}; 398 399&pinctrl { 400 pins_uart0: uart0 { 401 function = "uart0"; 402 groups = "uart0-data"; 403 bias-disable; 404 }; 405 406 pins_uart1: uart1 { 407 function = "uart1"; 408 groups = "uart1-data"; 409 bias-disable; 410 }; 411 412 pins_uart2: uart2 { 413 function = "uart2"; 414 groups = "uart2-data", "uart2-hwflow"; 415 bias-disable; 416 }; 417 418 pins_uart3: uart3 { 419 function = "uart3"; 420 groups = "uart3-data", "uart3-hwflow"; 421 bias-disable; 422 }; 423 424 pins_uart4: uart4 { 425 function = "uart4"; 426 groups = "uart4-data"; 427 bias-disable; 428 }; 429 430 pins_i2c0: i2c0 { 431 function = "i2c0"; 432 groups = "i2c0-data"; 433 bias-disable; 434 }; 435 436 pins_i2c1: i2c1 { 437 function = "i2c1"; 438 groups = "i2c1-data"; 439 bias-disable; 440 }; 441 442 pins_i2c2: i2c2 { 443 function = "i2c2"; 444 groups = "i2c2-data"; 445 bias-disable; 446 }; 447 448 pins_i2c3: i2c3 { 449 function = "i2c3"; 450 groups = "i2c3-data"; 451 bias-disable; 452 }; 453 454 pins_i2c4: i2c4 { 455 function = "i2c4"; 456 groups = "i2c4-data-e"; 457 bias-disable; 458 }; 459 460 pins_nemc: nemc { 461 function = "nemc"; 462 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; 463 bias-disable; 464 }; 465 466 pins_nemc_cs1: nemc-cs1 { 467 function = "nemc-cs1"; 468 groups = "nemc-cs1"; 469 bias-disable; 470 }; 471 472 pins_nemc_cs6: nemc-cs6 { 473 function = "nemc-cs6"; 474 groups = "nemc-cs6"; 475 bias-disable; 476 }; 477 478 pins_mmc0: mmc0 { 479 function = "mmc0"; 480 groups = "mmc0-1bit-e", "mmc0-4bit-e"; 481 bias-disable; 482 }; 483 484 pins_mmc1: mmc1 { 485 function = "mmc1"; 486 groups = "mmc1-1bit-d", "mmc1-4bit-d"; 487 bias-disable; 488 }; 489}; 490 491&tcu { 492 /* 3 MHz for the system timer and clocksource */ 493 assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>; 494 assigned-clock-rates = <3000000>, <3000000>; 495}; 496