xref: /openbmc/linux/arch/mips/boot/dts/ingenic/ci20.dts (revision 8f762fe5) 
1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include "jz4780.dtsi"
5#include <dt-bindings/gpio/gpio.h>
6
7/ {
8	compatible = "img,ci20", "ingenic,jz4780";
9
10	aliases {
11		serial0 = &uart0;
12		serial1 = &uart1;
13		serial3 = &uart3;
14		serial4 = &uart4;
15	};
16
17	chosen {
18		stdout-path = &uart4;
19	};
20
21	memory {
22		device_type = "memory";
23		reg = <0x0 0x10000000
24		       0x30000000 0x30000000>;
25	};
26
27	eth0_power: fixedregulator@0 {
28		compatible = "regulator-fixed";
29		regulator-name = "eth0_power";
30		gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
31		enable-active-high;
32	};
33};
34
35&ext {
36	clock-frequency = <48000000>;
37};
38
39&mmc0 {
40	status = "okay";
41
42	bus-width = <4>;
43	max-frequency = <50000000>;
44
45	pinctrl-names = "default";
46	pinctrl-0 = <&pins_mmc0>;
47
48	cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
49};
50
51&mmc1 {
52	status = "okay";
53
54	bus-width = <4>;
55	max-frequency = <50000000>;
56
57	pinctrl-names = "default";
58	pinctrl-0 = <&pins_mmc1>;
59};
60
61&uart0 {
62	status = "okay";
63
64	pinctrl-names = "default";
65	pinctrl-0 = <&pins_uart0>;
66};
67
68&uart1 {
69	status = "okay";
70
71	pinctrl-names = "default";
72	pinctrl-0 = <&pins_uart1>;
73};
74
75&uart3 {
76	status = "okay";
77
78	pinctrl-names = "default";
79	pinctrl-0 = <&pins_uart3>;
80};
81
82&uart4 {
83	status = "okay";
84
85	pinctrl-names = "default";
86	pinctrl-0 = <&pins_uart4>;
87};
88
89&nemc {
90	status = "okay";
91
92	nandc: nand-controller@1 {
93		compatible = "ingenic,jz4780-nand";
94		reg = <1 0 0x1000000>;
95
96		#address-cells = <1>;
97		#size-cells = <0>;
98
99		ingenic,bch-controller = <&bch>;
100
101		ingenic,nemc-tAS = <10>;
102		ingenic,nemc-tAH = <5>;
103		ingenic,nemc-tBP = <10>;
104		ingenic,nemc-tAW = <15>;
105		ingenic,nemc-tSTRV = <100>;
106
107		/*
108		 * Only CLE/ALE are needed for the devices that are connected, rather
109		 * than the full address line set.
110		 */
111		pinctrl-names = "default";
112		pinctrl-0 = <&pins_nemc>;
113
114		nand@1 {
115			reg = <1>;
116
117			nand-ecc-step-size = <1024>;
118			nand-ecc-strength = <24>;
119			nand-ecc-mode = "hw";
120			nand-on-flash-bbt;
121
122			pinctrl-names = "default";
123			pinctrl-0 = <&pins_nemc_cs1>;
124
125			partitions {
126				compatible = "fixed-partitions";
127				#address-cells = <2>;
128				#size-cells = <2>;
129
130				partition@0 {
131					label = "u-boot-spl";
132					reg = <0x0 0x0 0x0 0x800000>;
133				};
134
135				partition@800000 {
136					label = "u-boot";
137					reg = <0x0 0x800000 0x0 0x200000>;
138				};
139
140				partition@a00000 {
141					label = "u-boot-env";
142					reg = <0x0 0xa00000 0x0 0x200000>;
143				};
144
145				partition@c00000 {
146					label = "boot";
147					reg = <0x0 0xc00000 0x0 0x4000000>;
148				};
149
150				partition@4c00000 {
151					label = "system";
152					reg = <0x0 0x4c00000 0x1 0xfb400000>;
153				};
154			};
155		};
156	};
157
158	dm9000@6 {
159		compatible = "davicom,dm9000";
160		davicom,no-eeprom;
161
162		pinctrl-names = "default";
163		pinctrl-0 = <&pins_nemc_cs6>;
164
165		reg = <6 0 1   /* addr */
166		       6 2 1>; /* data */
167
168		ingenic,nemc-tAS = <15>;
169		ingenic,nemc-tAH = <10>;
170		ingenic,nemc-tBP = <20>;
171		ingenic,nemc-tAW = <50>;
172		ingenic,nemc-tSTRV = <100>;
173
174		reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
175		vcc-supply = <&eth0_power>;
176
177		interrupt-parent = <&gpe>;
178		interrupts = <19 4>;
179	};
180};
181
182&bch {
183	status = "okay";
184};
185
186&pinctrl {
187	pins_uart0: uart0 {
188		function = "uart0";
189		groups = "uart0-data";
190		bias-disable;
191	};
192
193	pins_uart1: uart1 {
194		function = "uart1";
195		groups = "uart1-data";
196		bias-disable;
197	};
198
199	pins_uart3: uart3 {
200		function = "uart3";
201		groups = "uart3-data", "uart3-hwflow";
202		bias-disable;
203	};
204
205	pins_uart4: uart4 {
206		function = "uart4";
207		groups = "uart4-data";
208		bias-disable;
209	};
210
211	pins_nemc: nemc {
212		function = "nemc";
213		groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
214		bias-disable;
215	};
216
217	pins_nemc_cs1: nemc-cs1 {
218		function = "nemc-cs1";
219		groups = "nemc-cs1";
220		bias-disable;
221	};
222
223	pins_nemc_cs6: nemc-cs6 {
224		function = "nemc-cs6";
225		groups = "nemc-cs6";
226		bias-disable;
227	};
228
229	pins_mmc0: mmc0 {
230		function = "mmc0";
231		groups = "mmc0-1bit-e", "mmc0-4bit-e";
232		bias-disable;
233	};
234
235	pins_mmc1: mmc1 {
236		function = "mmc1";
237		groups = "mmc1-1bit-d", "mmc1-4bit-d";
238		bias-disable;
239	};
240};
241