xref: /openbmc/linux/arch/mips/boot/dts/ingenic/ci20.dts (revision 8cb5d748)
1/dts-v1/;
2
3#include "jz4780.dtsi"
4#include <dt-bindings/gpio/gpio.h>
5
6/ {
7	compatible = "img,ci20", "ingenic,jz4780";
8
9	aliases {
10		serial0 = &uart0;
11		serial1 = &uart1;
12		serial3 = &uart3;
13		serial4 = &uart4;
14	};
15
16	chosen {
17		stdout-path = &uart4;
18	};
19
20	memory {
21		device_type = "memory";
22		reg = <0x0 0x10000000
23		       0x30000000 0x30000000>;
24	};
25
26	eth0_power: fixedregulator@0 {
27		compatible = "regulator-fixed";
28		regulator-name = "eth0_power";
29		gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
30		enable-active-high;
31	};
32};
33
34&ext {
35	clock-frequency = <48000000>;
36};
37
38&uart0 {
39	status = "okay";
40
41	pinctrl-names = "default";
42	pinctrl-0 = <&pins_uart0>;
43};
44
45&uart1 {
46	status = "okay";
47
48	pinctrl-names = "default";
49	pinctrl-0 = <&pins_uart1>;
50};
51
52&uart3 {
53	status = "okay";
54
55	pinctrl-names = "default";
56	pinctrl-0 = <&pins_uart2>;
57};
58
59&uart4 {
60	status = "okay";
61
62	pinctrl-names = "default";
63	pinctrl-0 = <&pins_uart4>;
64};
65
66&nemc {
67	status = "okay";
68
69	nandc: nand-controller@1 {
70		compatible = "ingenic,jz4780-nand";
71		reg = <1 0 0x1000000>;
72
73		#address-cells = <1>;
74		#size-cells = <0>;
75
76		ingenic,bch-controller = <&bch>;
77
78		ingenic,nemc-tAS = <10>;
79		ingenic,nemc-tAH = <5>;
80		ingenic,nemc-tBP = <10>;
81		ingenic,nemc-tAW = <15>;
82		ingenic,nemc-tSTRV = <100>;
83
84		/*
85		 * Only CLE/ALE are needed for the devices that are connected, rather
86		 * than the full address line set.
87		 */
88		pinctrl-names = "default";
89		pinctrl-0 = <&pins_nemc>;
90
91		nand@1 {
92			reg = <1>;
93
94			nand-ecc-step-size = <1024>;
95			nand-ecc-strength = <24>;
96			nand-ecc-mode = "hw";
97			nand-on-flash-bbt;
98
99			pinctrl-names = "default";
100			pinctrl-0 = <&pins_nemc_cs1>;
101
102			partitions {
103				compatible = "fixed-partitions";
104				#address-cells = <2>;
105				#size-cells = <2>;
106
107				partition@0 {
108					label = "u-boot-spl";
109					reg = <0x0 0x0 0x0 0x800000>;
110				};
111
112				partition@0x800000 {
113					label = "u-boot";
114					reg = <0x0 0x800000 0x0 0x200000>;
115				};
116
117				partition@0xa00000 {
118					label = "u-boot-env";
119					reg = <0x0 0xa00000 0x0 0x200000>;
120				};
121
122				partition@0xc00000 {
123					label = "boot";
124					reg = <0x0 0xc00000 0x0 0x4000000>;
125				};
126
127				partition@0x8c00000 {
128					label = "system";
129					reg = <0x0 0x4c00000 0x1 0xfb400000>;
130				};
131			};
132		};
133	};
134
135	dm9000@6 {
136		compatible = "davicom,dm9000";
137		davicom,no-eeprom;
138
139		pinctrl-names = "default";
140		pinctrl-0 = <&pins_nemc_cs6>;
141
142		reg = <6 0 1   /* addr */
143		       6 2 1>; /* data */
144
145		ingenic,nemc-tAS = <15>;
146		ingenic,nemc-tAH = <10>;
147		ingenic,nemc-tBP = <20>;
148		ingenic,nemc-tAW = <50>;
149		ingenic,nemc-tSTRV = <100>;
150
151		reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
152		vcc-supply = <&eth0_power>;
153
154		interrupt-parent = <&gpe>;
155		interrupts = <19 4>;
156	};
157};
158
159&bch {
160	status = "okay";
161};
162
163&pinctrl {
164	pins_uart0: uart0 {
165		function = "uart0";
166		groups = "uart0-data";
167		bias-disable;
168	};
169
170	pins_uart1: uart1 {
171		function = "uart1";
172		groups = "uart1-data";
173		bias-disable;
174	};
175
176	pins_uart2: uart2 {
177		function = "uart2";
178		groups = "uart2-data", "uart2-hwflow";
179		bias-disable;
180	};
181
182	pins_uart4: uart4 {
183		function = "uart4";
184		groups = "uart4-data";
185		bias-disable;
186	};
187
188	pins_nemc: nemc {
189		function = "nemc";
190		groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
191		bias-disable;
192	};
193
194	pins_nemc_cs1: nemc-cs1 {
195		function = "nemc-cs1";
196		groups = "nemc-cs1";
197		bias-disable;
198	};
199
200	pins_nemc_cs6: nemc-cs6 {
201		function = "nemc-cs6";
202		groups = "nemc-cs6";
203		bias-disable;
204	};
205};
206