1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include "jz4780.dtsi" 5#include <dt-bindings/clock/ingenic,tcu.h> 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/regulator/active-semi,8865-regulator.h> 10 11/ { 12 compatible = "img,ci20", "ingenic,jz4780"; 13 14 aliases { 15 serial0 = &uart0; 16 serial1 = &uart1; 17 serial3 = &uart3; 18 serial4 = &uart4; 19 }; 20 21 chosen { 22 stdout-path = &uart4; 23 }; 24 25 memory { 26 device_type = "memory"; 27 reg = <0x0 0x10000000 28 0x30000000 0x30000000>; 29 }; 30 31 gpio-keys { 32 compatible = "gpio-keys"; 33 34 sw1 { 35 label = "ci20:sw1"; 36 linux,code = <KEY_F13>; 37 gpios = <&gpd 17 GPIO_ACTIVE_HIGH>; 38 wakeup-source; 39 }; 40 }; 41 42 leds { 43 compatible = "gpio-leds"; 44 45 led0 { 46 label = "ci20:red:led0"; 47 gpios = <&gpc 3 GPIO_ACTIVE_HIGH>; 48 linux,default-trigger = "none"; 49 }; 50 51 led1 { 52 label = "ci20:red:led1"; 53 gpios = <&gpc 2 GPIO_ACTIVE_HIGH>; 54 linux,default-trigger = "nand-disk"; 55 }; 56 57 led2 { 58 label = "ci20:red:led2"; 59 gpios = <&gpc 1 GPIO_ACTIVE_HIGH>; 60 linux,default-trigger = "cpu1"; 61 }; 62 63 led3 { 64 label = "ci20:red:led3"; 65 gpios = <&gpc 0 GPIO_ACTIVE_HIGH>; 66 linux,default-trigger = "cpu0"; 67 }; 68 }; 69 70 eth0_power: fixedregulator@0 { 71 compatible = "regulator-fixed"; 72 73 regulator-name = "eth0_power"; 74 regulator-min-microvolt = <3300000>; 75 regulator-max-microvolt = <3300000>; 76 77 gpio = <&gpb 25 GPIO_ACTIVE_LOW>; 78 enable-active-high; 79 }; 80 81 ir: ir { 82 compatible = "gpio-ir-receiver"; 83 gpios = <&gpe 3 GPIO_ACTIVE_LOW>; 84 }; 85 86 wlan0_power: fixedregulator@1 { 87 compatible = "regulator-fixed"; 88 89 regulator-name = "wlan0_power"; 90 91 gpio = <&gpb 19 GPIO_ACTIVE_LOW>; 92 enable-active-high; 93 }; 94 95 otg_power: fixedregulator@2 { 96 compatible = "regulator-fixed"; 97 98 regulator-name = "otg_power"; 99 regulator-min-microvolt = <5000000>; 100 regulator-max-microvolt = <5000000>; 101 102 gpio = <&gpf 14 GPIO_ACTIVE_LOW>; 103 enable-active-high; 104 }; 105}; 106 107&ext { 108 clock-frequency = <48000000>; 109}; 110 111&cgu { 112 /* 113 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher 114 * precision. 115 */ 116 assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>, 117 <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>; 118 assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>, 119 <&cgu JZ4780_CLK_MPLL>, 120 <&cgu JZ4780_CLK_SSIPLL>; 121 assigned-clock-rates = <48000000>, <0>, <54000000>; 122}; 123 124&tcu { 125 /* 126 * 750 kHz for the system timers and clocksource, 127 * use channel #0 and #1 for the per cpu system timers, 128 * and use channel #2 for the clocksource. 129 * 130 * 3000 kHz for the OST timer to provide a higher 131 * precision clocksource. 132 */ 133 assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, 134 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>; 135 assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>; 136}; 137 138&mmc0 { 139 status = "okay"; 140 141 bus-width = <4>; 142 max-frequency = <50000000>; 143 144 pinctrl-names = "default"; 145 pinctrl-0 = <&pins_mmc0>; 146 147 cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>; 148}; 149 150&mmc1 { 151 status = "okay"; 152 153 bus-width = <4>; 154 max-frequency = <50000000>; 155 non-removable; 156 157 pinctrl-names = "default"; 158 pinctrl-0 = <&pins_mmc1>; 159 160 brcmf: wifi@1 { 161/* reg = <4>;*/ 162 compatible = "brcm,bcm4330-fmac"; 163 vcc-supply = <&wlan0_power>; 164 device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>; 165 shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>; 166 }; 167}; 168 169&uart0 { 170 status = "okay"; 171 172 pinctrl-names = "default"; 173 pinctrl-0 = <&pins_uart0>; 174}; 175 176&uart1 { 177 status = "okay"; 178 179 pinctrl-names = "default"; 180 pinctrl-0 = <&pins_uart1>; 181}; 182 183&uart2 { 184 status = "okay"; 185 186 pinctrl-names = "default"; 187 pinctrl-0 = <&pins_uart2>; 188 uart-has-rtscts; 189 190 bluetooth { 191 compatible = "brcm,bcm4330-bt"; 192 reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>; 193 vcc-supply = <&wlan0_power>; 194 device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>; 195 host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>; 196 shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>; 197 }; 198}; 199 200&uart3 { 201 status = "okay"; 202 203 pinctrl-names = "default"; 204 pinctrl-0 = <&pins_uart3>; 205}; 206 207&uart4 { 208 status = "okay"; 209 210 pinctrl-names = "default"; 211 pinctrl-0 = <&pins_uart4>; 212}; 213 214&i2c0 { 215 status = "okay"; 216 217 pinctrl-names = "default"; 218 pinctrl-0 = <&pins_i2c0>; 219 220 clock-frequency = <400000>; 221 222 act8600: act8600@5a { 223 compatible = "active-semi,act8600"; 224 reg = <0x5a>; 225 status = "okay"; 226 227 regulators { 228 vddcore: SUDCDC1 { 229 regulator-name = "DCDC_REG1"; 230 regulator-min-microvolt = <1100000>; 231 regulator-max-microvolt = <1100000>; 232 regulator-always-on; 233 }; 234 vddmem: SUDCDC2 { 235 regulator-name = "DCDC_REG2"; 236 regulator-min-microvolt = <1500000>; 237 regulator-max-microvolt = <1500000>; 238 regulator-always-on; 239 }; 240 vcc_33: SUDCDC3 { 241 regulator-name = "DCDC_REG3"; 242 regulator-min-microvolt = <3300000>; 243 regulator-max-microvolt = <3300000>; 244 regulator-always-on; 245 }; 246 vcc_50: SUDCDC4 { 247 regulator-name = "SUDCDC_REG4"; 248 regulator-min-microvolt = <5000000>; 249 regulator-max-microvolt = <5000000>; 250 regulator-always-on; 251 }; 252 vcc_25: LDO_REG5 { 253 regulator-name = "LDO_REG5"; 254 regulator-min-microvolt = <2500000>; 255 regulator-max-microvolt = <2500000>; 256 regulator-always-on; 257 }; 258 wifi_io: LDO_REG6 { 259 regulator-name = "LDO_REG6"; 260 regulator-min-microvolt = <2500000>; 261 regulator-max-microvolt = <2500000>; 262 regulator-always-on; 263 }; 264 vcc_28: LDO_REG7 { 265 regulator-name = "LDO_REG7"; 266 regulator-min-microvolt = <2800000>; 267 regulator-max-microvolt = <2800000>; 268 regulator-always-on; 269 }; 270 vcc_15: LDO_REG8 { 271 regulator-name = "LDO_REG8"; 272 regulator-min-microvolt = <1500000>; 273 regulator-max-microvolt = <1500000>; 274 regulator-always-on; 275 }; 276 vrtc_18: LDO_REG9 { 277 regulator-name = "LDO_REG9"; 278 /* Despite the datasheet stating 3.3V 279 * for REG9 and the driver expecting that, 280 * REG9 outputs 1.8V. 281 * Likely the CI20 uses a proprietary 282 * factory programmed chip variant. 283 * Since this is a simple on/off LDO the 284 * exact values do not matter. 285 */ 286 regulator-min-microvolt = <3300000>; 287 regulator-max-microvolt = <3300000>; 288 regulator-always-on; 289 }; 290 vcc_11: LDO_REG10 { 291 regulator-name = "LDO_REG10"; 292 regulator-min-microvolt = <1200000>; 293 regulator-max-microvolt = <1200000>; 294 regulator-always-on; 295 }; 296 }; 297 }; 298}; 299 300&i2c1 { 301 status = "okay"; 302 303 pinctrl-names = "default"; 304 pinctrl-0 = <&pins_i2c1>; 305 306}; 307 308&i2c2 { 309 status = "okay"; 310 311 pinctrl-names = "default"; 312 pinctrl-0 = <&pins_i2c2>; 313 314}; 315 316&i2c3 { 317 status = "okay"; 318 319 pinctrl-names = "default"; 320 pinctrl-0 = <&pins_i2c3>; 321 322}; 323 324&i2c4 { 325 status = "okay"; 326 327 pinctrl-names = "default"; 328 pinctrl-0 = <&pins_i2c4>; 329 330 clock-frequency = <400000>; 331 332 rtc@51 { 333 compatible = "nxp,pcf8563"; 334 reg = <0x51>; 335 336 interrupt-parent = <&gpf>; 337 interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 338 }; 339}; 340 341&nemc { 342 status = "okay"; 343 344 nandc: nand-controller@1 { 345 compatible = "ingenic,jz4780-nand"; 346 reg = <1 0 0x1000000>; 347 348 #address-cells = <1>; 349 #size-cells = <0>; 350 351 ingenic,bch-controller = <&bch>; 352 353 ingenic,nemc-tAS = <10>; 354 ingenic,nemc-tAH = <5>; 355 ingenic,nemc-tBP = <10>; 356 ingenic,nemc-tAW = <15>; 357 ingenic,nemc-tSTRV = <100>; 358 359 /* 360 * Only CLE/ALE are needed for the devices that are connected, rather 361 * than the full address line set. 362 */ 363 pinctrl-names = "default"; 364 pinctrl-0 = <&pins_nemc>; 365 366 nand@1 { 367 reg = <1>; 368 369 nand-ecc-step-size = <1024>; 370 nand-ecc-strength = <24>; 371 nand-ecc-mode = "hw"; 372 nand-on-flash-bbt; 373 374 pinctrl-names = "default"; 375 pinctrl-0 = <&pins_nemc_cs1>; 376 377 partitions { 378 compatible = "fixed-partitions"; 379 #address-cells = <2>; 380 #size-cells = <2>; 381 382 partition@0 { 383 label = "u-boot-spl"; 384 reg = <0x0 0x0 0x0 0x800000>; 385 }; 386 387 partition@800000 { 388 label = "u-boot"; 389 reg = <0x0 0x800000 0x0 0x200000>; 390 }; 391 392 partition@a00000 { 393 label = "u-boot-env"; 394 reg = <0x0 0xa00000 0x0 0x200000>; 395 }; 396 397 partition@c00000 { 398 label = "boot"; 399 reg = <0x0 0xc00000 0x0 0x4000000>; 400 }; 401 402 partition@4c00000 { 403 label = "system"; 404 reg = <0x0 0x4c00000 0x1 0xfb400000>; 405 }; 406 }; 407 }; 408 }; 409 410 dm9000@6 { 411 compatible = "davicom,dm9000"; 412 davicom,no-eeprom; 413 414 pinctrl-names = "default"; 415 pinctrl-0 = <&pins_nemc_cs6>; 416 417 reg = <6 0 1 /* addr */ 418 6 2 1>; /* data */ 419 420 ingenic,nemc-tAS = <15>; 421 ingenic,nemc-tAH = <10>; 422 ingenic,nemc-tBP = <20>; 423 ingenic,nemc-tAW = <50>; 424 ingenic,nemc-tSTRV = <100>; 425 426 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>; 427 vcc-supply = <ð0_power>; 428 429 interrupt-parent = <&gpe>; 430 interrupts = <19 4>; 431 432 nvmem-cells = <ð0_addr>; 433 nvmem-cell-names = "mac-address"; 434 }; 435}; 436 437&bch { 438 status = "okay"; 439}; 440 441&otg_phy { 442 status = "okay"; 443 444 vcc-supply = <&otg_power>; 445}; 446 447&otg { 448 status = "okay"; 449}; 450 451&pinctrl { 452 pins_uart0: uart0 { 453 function = "uart0"; 454 groups = "uart0-data"; 455 bias-disable; 456 }; 457 458 pins_uart1: uart1 { 459 function = "uart1"; 460 groups = "uart1-data"; 461 bias-disable; 462 }; 463 464 pins_uart2: uart2 { 465 function = "uart2"; 466 groups = "uart2-data", "uart2-hwflow"; 467 bias-disable; 468 }; 469 470 pins_uart3: uart3 { 471 function = "uart3"; 472 groups = "uart3-data", "uart3-hwflow"; 473 bias-disable; 474 }; 475 476 pins_uart4: uart4 { 477 function = "uart4"; 478 groups = "uart4-data"; 479 bias-disable; 480 }; 481 482 pins_i2c0: i2c0 { 483 function = "i2c0"; 484 groups = "i2c0-data"; 485 bias-disable; 486 }; 487 488 pins_i2c1: i2c1 { 489 function = "i2c1"; 490 groups = "i2c1-data"; 491 bias-disable; 492 }; 493 494 pins_i2c2: i2c2 { 495 function = "i2c2"; 496 groups = "i2c2-data"; 497 bias-disable; 498 }; 499 500 pins_i2c3: i2c3 { 501 function = "i2c3"; 502 groups = "i2c3-data"; 503 bias-disable; 504 }; 505 506 pins_i2c4: i2c4 { 507 function = "i2c4"; 508 groups = "i2c4-data-e"; 509 bias-disable; 510 }; 511 512 pins_nemc: nemc { 513 function = "nemc"; 514 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; 515 bias-disable; 516 }; 517 518 pins_nemc_cs1: nemc-cs1 { 519 function = "nemc-cs1"; 520 groups = "nemc-cs1"; 521 bias-disable; 522 }; 523 524 pins_nemc_cs6: nemc-cs6 { 525 function = "nemc-cs6"; 526 groups = "nemc-cs6"; 527 bias-disable; 528 }; 529 530 pins_mmc0: mmc0 { 531 function = "mmc0"; 532 groups = "mmc0-1bit-e", "mmc0-4bit-e"; 533 bias-disable; 534 }; 535 536 pins_mmc1: mmc1 { 537 function = "mmc1"; 538 groups = "mmc1-1bit-d", "mmc1-4bit-d"; 539 bias-disable; 540 }; 541}; 542