1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include "jz4780.dtsi" 5#include <dt-bindings/clock/ingenic,tcu.h> 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/regulator/active-semi,8865-regulator.h> 10 11/ { 12 compatible = "img,ci20", "ingenic,jz4780"; 13 14 aliases { 15 serial0 = &uart0; 16 serial1 = &uart1; 17 serial3 = &uart3; 18 serial4 = &uart4; 19 }; 20 21 chosen { 22 stdout-path = &uart4; 23 }; 24 25 memory { 26 device_type = "memory"; 27 reg = <0x0 0x10000000 28 0x30000000 0x30000000>; 29 }; 30 31 gpio-keys { 32 compatible = "gpio-keys"; 33 34 switch { 35 label = "ci20:sw1"; 36 linux,code = <KEY_F13>; 37 gpios = <&gpd 17 GPIO_ACTIVE_HIGH>; 38 wakeup-source; 39 }; 40 }; 41 42 leds { 43 compatible = "gpio-leds"; 44 45 led-0 { 46 label = "ci20:red:led0"; 47 gpios = <&gpc 3 GPIO_ACTIVE_HIGH>; 48 linux,default-trigger = "none"; 49 }; 50 51 led-1 { 52 label = "ci20:red:led1"; 53 gpios = <&gpc 2 GPIO_ACTIVE_HIGH>; 54 linux,default-trigger = "nand-disk"; 55 }; 56 57 led-2 { 58 label = "ci20:red:led2"; 59 gpios = <&gpc 1 GPIO_ACTIVE_HIGH>; 60 linux,default-trigger = "cpu1"; 61 }; 62 63 led-3 { 64 label = "ci20:red:led3"; 65 gpios = <&gpc 0 GPIO_ACTIVE_HIGH>; 66 linux,default-trigger = "cpu0"; 67 }; 68 }; 69 70 eth0_power: fixedregulator-0 { 71 compatible = "regulator-fixed"; 72 73 regulator-name = "eth0_power"; 74 regulator-min-microvolt = <3300000>; 75 regulator-max-microvolt = <3300000>; 76 77 gpio = <&gpb 25 0>; 78 enable-active-high; 79 }; 80 81 hdmi_out: connector { 82 compatible = "hdmi-connector"; 83 label = "HDMI OUT"; 84 type = "a"; 85 86 ddc-en-gpios = <&gpa 25 GPIO_ACTIVE_HIGH>; 87 88 port { 89 hdmi_con: endpoint { 90 remote-endpoint = <&dw_hdmi_out>; 91 }; 92 }; 93 }; 94 95 ir: ir { 96 compatible = "gpio-ir-receiver"; 97 gpios = <&gpe 3 GPIO_ACTIVE_LOW>; 98 }; 99 100 wlan0_power: fixedregulator-1 { 101 compatible = "regulator-fixed"; 102 103 regulator-name = "wlan0_power"; 104 105 gpio = <&gpb 19 0>; 106 enable-active-high; 107 }; 108 109 otg_power: fixedregulator-2 { 110 compatible = "regulator-fixed"; 111 112 regulator-name = "otg_power"; 113 regulator-min-microvolt = <5000000>; 114 regulator-max-microvolt = <5000000>; 115 116 gpio = <&gpf 15 0>; 117 enable-active-high; 118 }; 119}; 120 121&ext { 122 clock-frequency = <48000000>; 123}; 124 125&cgu { 126 /* 127 * Use the 32.768 kHz oscillator as the parent of the RTC for a higher 128 * precision. 129 */ 130 assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>, 131 <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>, 132 <&cgu JZ4780_CLK_HDMI>; 133 assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>, 134 <&cgu JZ4780_CLK_MPLL>, 135 <&cgu JZ4780_CLK_SSIPLL>; 136 assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>; 137}; 138 139&tcu { 140 /* 141 * 750 kHz for the system timers and clocksource, 142 * use channel #0 and #1 for the per cpu system timers, 143 * and use channel #2 for the clocksource. 144 * 145 * 3000 kHz for the OST timer to provide a higher 146 * precision clocksource. 147 */ 148 assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, 149 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>; 150 assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>; 151}; 152 153&mmc0 { 154 status = "okay"; 155 156 bus-width = <4>; 157 max-frequency = <50000000>; 158 159 pinctrl-names = "default"; 160 pinctrl-0 = <&pins_mmc0>; 161 162 cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>; 163}; 164 165&mmc1 { 166 status = "okay"; 167 168 bus-width = <4>; 169 max-frequency = <50000000>; 170 non-removable; 171 172 pinctrl-names = "default"; 173 pinctrl-0 = <&pins_mmc1>; 174 175 brcmf: wifi@1 { 176/* reg = <4>;*/ 177 compatible = "brcm,bcm4330-fmac"; 178 vcc-supply = <&wlan0_power>; 179 device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>; 180 shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>; 181 }; 182}; 183 184&uart0 { 185 status = "okay"; 186 187 pinctrl-names = "default"; 188 pinctrl-0 = <&pins_uart0>; 189}; 190 191&uart1 { 192 status = "okay"; 193 194 pinctrl-names = "default"; 195 pinctrl-0 = <&pins_uart1>; 196}; 197 198&uart2 { 199 status = "okay"; 200 201 pinctrl-names = "default"; 202 pinctrl-0 = <&pins_uart2>; 203 uart-has-rtscts; 204 205 bluetooth { 206 compatible = "brcm,bcm4330-bt"; 207 reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>; 208 vcc-supply = <&wlan0_power>; 209 device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>; 210 host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>; 211 shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>; 212 }; 213}; 214 215&uart3 { 216 status = "okay"; 217 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pins_uart3>; 220}; 221 222&uart4 { 223 status = "okay"; 224 225 pinctrl-names = "default"; 226 pinctrl-0 = <&pins_uart4>; 227}; 228 229&i2c0 { 230 status = "okay"; 231 232 pinctrl-names = "default"; 233 pinctrl-0 = <&pins_i2c0>; 234 235 clock-frequency = <400000>; 236 237 act8600: act8600@5a { 238 compatible = "active-semi,act8600"; 239 reg = <0x5a>; 240 241 regulators { 242 vddcore: DCDC1 { 243 regulator-min-microvolt = <1100000>; 244 regulator-max-microvolt = <1100000>; 245 regulator-always-on; 246 }; 247 vddmem: DCDC2 { 248 regulator-min-microvolt = <1500000>; 249 regulator-max-microvolt = <1500000>; 250 regulator-always-on; 251 }; 252 vcc_33: DCDC3 { 253 regulator-min-microvolt = <3300000>; 254 regulator-max-microvolt = <3300000>; 255 regulator-always-on; 256 }; 257 vcc_50: SUDCDC_REG4 { 258 regulator-min-microvolt = <5000000>; 259 regulator-max-microvolt = <5000000>; 260 regulator-always-on; 261 }; 262 vcc_25: LDO5 { 263 regulator-min-microvolt = <2500000>; 264 regulator-max-microvolt = <2500000>; 265 regulator-always-on; 266 }; 267 wifi_io: LDO6 { 268 regulator-min-microvolt = <2500000>; 269 regulator-max-microvolt = <2500000>; 270 regulator-always-on; 271 }; 272 cim_io_28: LDO7 { 273 regulator-min-microvolt = <2800000>; 274 regulator-max-microvolt = <2800000>; 275 regulator-always-on; 276 }; 277 cim_io_15: LDO8 { 278 regulator-min-microvolt = <1500000>; 279 regulator-max-microvolt = <1500000>; 280 regulator-always-on; 281 }; 282 vrtc_18: LDO_REG9 { 283 /* Despite the datasheet stating 3.3V 284 * for REG9 and the driver expecting that, 285 * REG9 outputs 1.8V. 286 * Likely the CI20 uses a proprietary 287 * factory programmed chip variant. 288 * Since this is a simple on/off LDO the 289 * exact values do not matter. 290 */ 291 regulator-min-microvolt = <3300000>; 292 regulator-max-microvolt = <3300000>; 293 regulator-always-on; 294 }; 295 vcc_11: LDO_REG10 { 296 regulator-min-microvolt = <1200000>; 297 regulator-max-microvolt = <1200000>; 298 regulator-always-on; 299 }; 300 }; 301 }; 302}; 303 304&i2c1 { 305 status = "okay"; 306 307 pinctrl-names = "default"; 308 pinctrl-0 = <&pins_i2c1>; 309 310}; 311 312&i2c2 { 313 status = "okay"; 314 315 pinctrl-names = "default"; 316 pinctrl-0 = <&pins_i2c2>; 317 318}; 319 320&i2c3 { 321 status = "okay"; 322 323 pinctrl-names = "default"; 324 pinctrl-0 = <&pins_i2c3>; 325 326}; 327 328&i2c4 { 329 status = "okay"; 330 331 pinctrl-names = "default"; 332 pinctrl-0 = <&pins_i2c4>; 333 334 clock-frequency = <400000>; 335 336 rtc@51 { 337 compatible = "nxp,pcf8563"; 338 reg = <0x51>; 339 340 interrupt-parent = <&gpf>; 341 interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 342 }; 343}; 344 345&nemc { 346 status = "okay"; 347 348 nandc: nand-controller@1 { 349 compatible = "ingenic,jz4780-nand"; 350 reg = <1 0 0x1000000>; 351 352 #address-cells = <1>; 353 #size-cells = <0>; 354 355 ingenic,bch-controller = <&bch>; 356 357 ingenic,nemc-tAS = <10>; 358 ingenic,nemc-tAH = <5>; 359 ingenic,nemc-tBP = <10>; 360 ingenic,nemc-tAW = <15>; 361 ingenic,nemc-tSTRV = <100>; 362 363 /* 364 * Only CLE/ALE are needed for the devices that are connected, rather 365 * than the full address line set. 366 */ 367 pinctrl-names = "default"; 368 pinctrl-0 = <&pins_nemc>; 369 370 nand@1 { 371 reg = <1>; 372 373 nand-ecc-step-size = <1024>; 374 nand-ecc-strength = <24>; 375 nand-ecc-mode = "hw"; 376 nand-on-flash-bbt; 377 378 pinctrl-names = "default"; 379 pinctrl-0 = <&pins_nemc_cs1>; 380 381 partitions { 382 compatible = "fixed-partitions"; 383 #address-cells = <2>; 384 #size-cells = <2>; 385 386 partition@0 { 387 label = "u-boot-spl"; 388 reg = <0x0 0x0 0x0 0x800000>; 389 }; 390 391 partition@800000 { 392 label = "u-boot"; 393 reg = <0x0 0x800000 0x0 0x200000>; 394 }; 395 396 partition@a00000 { 397 label = "u-boot-env"; 398 reg = <0x0 0xa00000 0x0 0x200000>; 399 }; 400 401 partition@c00000 { 402 label = "boot"; 403 reg = <0x0 0xc00000 0x0 0x4000000>; 404 }; 405 406 partition@4c00000 { 407 label = "system"; 408 reg = <0x0 0x4c00000 0x1 0xfb400000>; 409 }; 410 }; 411 }; 412 }; 413 414 dm9000@6 { 415 compatible = "davicom,dm9000"; 416 davicom,no-eeprom; 417 418 pinctrl-names = "default"; 419 pinctrl-0 = <&pins_nemc_cs6>; 420 421 reg = <6 0 1 /* addr */ 422 6 2 1>; /* data */ 423 424 ingenic,nemc-tAS = <15>; 425 ingenic,nemc-tAH = <10>; 426 ingenic,nemc-tBP = <20>; 427 ingenic,nemc-tAW = <50>; 428 ingenic,nemc-tSTRV = <100>; 429 430 reset-gpios = <&gpf 12 GPIO_ACTIVE_LOW>; 431 vcc-supply = <ð0_power>; 432 433 interrupt-parent = <&gpe>; 434 interrupts = <19 4>; 435 436 nvmem-cells = <ð0_addr>; 437 nvmem-cell-names = "mac-address"; 438 }; 439}; 440 441&bch { 442 status = "okay"; 443}; 444 445&otg_phy { 446 status = "okay"; 447 448 vcc-supply = <&otg_power>; 449}; 450 451&otg { 452 status = "okay"; 453}; 454 455&pinctrl { 456 pins_uart0: uart0 { 457 function = "uart0"; 458 groups = "uart0-data"; 459 bias-disable; 460 }; 461 462 pins_uart1: uart1 { 463 function = "uart1"; 464 groups = "uart1-data"; 465 bias-disable; 466 }; 467 468 pins_uart2: uart2 { 469 function = "uart2"; 470 groups = "uart2-data", "uart2-hwflow"; 471 bias-disable; 472 }; 473 474 pins_uart3: uart3 { 475 function = "uart3"; 476 groups = "uart3-data", "uart3-hwflow"; 477 bias-disable; 478 }; 479 480 pins_uart4: uart4 { 481 function = "uart4"; 482 groups = "uart4-data"; 483 bias-disable; 484 }; 485 486 pins_i2c0: i2c0 { 487 function = "i2c0"; 488 groups = "i2c0-data"; 489 bias-disable; 490 }; 491 492 pins_i2c1: i2c1 { 493 function = "i2c1"; 494 groups = "i2c1-data"; 495 bias-disable; 496 }; 497 498 pins_i2c2: i2c2 { 499 function = "i2c2"; 500 groups = "i2c2-data"; 501 bias-disable; 502 }; 503 504 pins_i2c3: i2c3 { 505 function = "i2c3"; 506 groups = "i2c3-data"; 507 bias-disable; 508 }; 509 510 pins_i2c4: i2c4 { 511 function = "i2c4"; 512 groups = "i2c4-data-e"; 513 bias-disable; 514 }; 515 516 pins_hdmi_ddc: hdmi_ddc { 517 function = "hdmi-ddc"; 518 groups = "hdmi-ddc"; 519 bias-disable; 520 }; 521 522 pins_nemc: nemc { 523 function = "nemc"; 524 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe"; 525 bias-disable; 526 }; 527 528 pins_nemc_cs1: nemc-cs1 { 529 function = "nemc-cs1"; 530 groups = "nemc-cs1"; 531 bias-disable; 532 }; 533 534 pins_nemc_cs6: nemc-cs6 { 535 function = "nemc-cs6"; 536 groups = "nemc-cs6"; 537 bias-disable; 538 }; 539 540 pins_mmc0: mmc0 { 541 function = "mmc0"; 542 groups = "mmc0-1bit-e", "mmc0-4bit-e"; 543 bias-disable; 544 }; 545 546 pins_mmc1: mmc1 { 547 function = "mmc1"; 548 groups = "mmc1-1bit-d", "mmc1-4bit-d"; 549 bias-disable; 550 }; 551}; 552 553&hdmi { 554 status = "okay"; 555 556 pinctrl-names = "default"; 557 pinctrl-0 = <&pins_hdmi_ddc>; 558 559 ports { 560 #address-cells = <1>; 561 #size-cells = <0>; 562 563 port@0 { 564 reg = <0>; 565 dw_hdmi_in: endpoint { 566 remote-endpoint = <&lcd_out>; 567 }; 568 }; 569 570 port@1 { 571 reg = <1>; 572 dw_hdmi_out: endpoint { 573 remote-endpoint = <&hdmi_con>; 574 }; 575 }; 576 }; 577}; 578 579&lcdc0 { 580 status = "okay"; 581 582 port { 583 lcd_out: endpoint { 584 remote-endpoint = <&dw_hdmi_in>; 585 }; 586 }; 587}; 588