1/ { 2 #address-cells = <1>; 3 #size-cells = <1>; 4 compatible = "brcm,bcm7425"; 5 6 cpus { 7 #address-cells = <1>; 8 #size-cells = <0>; 9 10 mips-hpt-frequency = <163125000>; 11 12 cpu@0 { 13 compatible = "brcm,bmips5000"; 14 device_type = "cpu"; 15 reg = <0>; 16 }; 17 18 cpu@1 { 19 compatible = "brcm,bmips5000"; 20 device_type = "cpu"; 21 reg = <1>; 22 }; 23 }; 24 25 aliases { 26 uart0 = &uart0; 27 }; 28 29 cpu_intc: cpu_intc { 30 #address-cells = <0>; 31 compatible = "mti,cpu-interrupt-controller"; 32 33 interrupt-controller; 34 #interrupt-cells = <1>; 35 }; 36 37 clocks { 38 uart_clk: uart_clk { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <81000000>; 42 }; 43 }; 44 45 rdb { 46 #address-cells = <1>; 47 #size-cells = <1>; 48 49 compatible = "simple-bus"; 50 ranges = <0 0x10000000 0x01000000>; 51 52 periph_intc: periph_intc@41a400 { 53 compatible = "brcm,bcm7038-l1-intc"; 54 reg = <0x41a400 0x30>, <0x41a600 0x30>; 55 56 interrupt-controller; 57 #interrupt-cells = <1>; 58 59 interrupt-parent = <&cpu_intc>; 60 interrupts = <2>, <3>; 61 }; 62 63 sun_l2_intc: sun_l2_intc@403000 { 64 compatible = "brcm,l2-intc"; 65 reg = <0x403000 0x30>; 66 interrupt-controller; 67 #interrupt-cells = <1>; 68 interrupt-parent = <&periph_intc>; 69 interrupts = <47>; 70 }; 71 72 gisb-arb@400000 { 73 compatible = "brcm,bcm7400-gisb-arb"; 74 reg = <0x400000 0xdc>; 75 native-endian; 76 interrupt-parent = <&sun_l2_intc>; 77 interrupts = <0>, <2>; 78 brcm,gisb-arb-master-mask = <0x177b>; 79 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pcie_0", 80 "bsp_0", "rdc_0", 81 "raaga_0", "avd_1", 82 "jtag_0", "svd_0", 83 "vice_0"; 84 }; 85 86 upg_irq0_intc: upg_irq0_intc@406780 { 87 compatible = "brcm,bcm7120-l2-intc"; 88 reg = <0x406780 0x8>; 89 90 brcm,int-map-mask = <0x44>; 91 brcm,int-fwd-mask = <0x70000>; 92 93 interrupt-controller; 94 #interrupt-cells = <1>; 95 96 interrupt-parent = <&periph_intc>; 97 interrupts = <55>; 98 }; 99 100 sun_top_ctrl: syscon@404000 { 101 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon"; 102 reg = <0x404000 0x51c>; 103 little-endian; 104 }; 105 106 reboot { 107 compatible = "brcm,brcmstb-reboot"; 108 syscon = <&sun_top_ctrl 0x304 0x308>; 109 }; 110 111 uart0: serial@406b00 { 112 compatible = "ns16550a"; 113 reg = <0x406b00 0x20>; 114 reg-io-width = <0x4>; 115 reg-shift = <0x2>; 116 interrupt-parent = <&periph_intc>; 117 interrupts = <61>; 118 clocks = <&uart_clk>; 119 status = "disabled"; 120 }; 121 122 enet0: ethernet@b80000 { 123 phy-mode = "internal"; 124 phy-handle = <&phy1>; 125 mac-address = [ 00 10 18 36 23 1a ]; 126 compatible = "brcm,genet-v3"; 127 #address-cells = <0x1>; 128 #size-cells = <0x1>; 129 reg = <0xb80000 0x11c88>; 130 interrupts = <17>, <18>; 131 interrupt-parent = <&periph_intc>; 132 status = "disabled"; 133 134 mdio@e14 { 135 compatible = "brcm,genet-mdio-v3"; 136 #address-cells = <0x1>; 137 #size-cells = <0x0>; 138 reg = <0xe14 0x8>; 139 140 phy1: ethernet-phy@1 { 141 max-speed = <100>; 142 reg = <0x1>; 143 compatible = "brcm,40nm-ephy", 144 "ethernet-phy-ieee802.3-c22"; 145 }; 146 }; 147 }; 148 149 ehci0: usb@480300 { 150 compatible = "brcm,bcm7425-ehci", "generic-ehci"; 151 reg = <0x480300 0x100>; 152 native-endian; 153 interrupt-parent = <&periph_intc>; 154 interrupts = <65>; 155 status = "disabled"; 156 }; 157 158 ohci0: usb@480400 { 159 compatible = "brcm,bcm7425-ohci", "generic-ohci"; 160 reg = <0x480400 0x100>; 161 native-endian; 162 no-big-frame-no; 163 interrupt-parent = <&periph_intc>; 164 interrupts = <67>; 165 status = "disabled"; 166 }; 167 168 ehci1: usb@480500 { 169 compatible = "brcm,bcm7425-ehci", "generic-ehci"; 170 reg = <0x480500 0x100>; 171 native-endian; 172 interrupt-parent = <&periph_intc>; 173 interrupts = <66>; 174 status = "disabled"; 175 }; 176 177 ohci1: usb@480600 { 178 compatible = "brcm,bcm7425-ohci", "generic-ohci"; 179 reg = <0x480600 0x100>; 180 native-endian; 181 no-big-frame-no; 182 interrupt-parent = <&periph_intc>; 183 interrupts = <68>; 184 status = "disabled"; 185 }; 186 187 ehci2: usb@490300 { 188 compatible = "brcm,bcm7425-ehci", "generic-ehci"; 189 reg = <0x490300 0x100>; 190 native-endian; 191 interrupt-parent = <&periph_intc>; 192 interrupts = <70>; 193 status = "disabled"; 194 }; 195 196 ohci2: usb@490400 { 197 compatible = "brcm,bcm7425-ohci", "generic-ohci"; 198 reg = <0x490400 0x100>; 199 native-endian; 200 no-big-frame-no; 201 interrupt-parent = <&periph_intc>; 202 interrupts = <72>; 203 status = "disabled"; 204 }; 205 206 ehci3: usb@490500 { 207 compatible = "brcm,bcm7425-ehci", "generic-ehci"; 208 reg = <0x490500 0x100>; 209 native-endian; 210 interrupt-parent = <&periph_intc>; 211 interrupts = <71>; 212 status = "disabled"; 213 }; 214 215 ohci3: usb@490600 { 216 compatible = "brcm,bcm7425-ohci", "generic-ohci"; 217 reg = <0x490600 0x100>; 218 native-endian; 219 no-big-frame-no; 220 interrupt-parent = <&periph_intc>; 221 interrupts = <73>; 222 status = "disabled"; 223 }; 224 225 sata: sata@181000 { 226 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci"; 227 reg-names = "ahci", "top-ctrl"; 228 reg = <0x181000 0xa9c>, <0x180020 0x1c>; 229 interrupt-parent = <&periph_intc>; 230 interrupts = <40>; 231 #address-cells = <1>; 232 #size-cells = <0>; 233 brcm,broken-ncq; 234 brcm,broken-phy; 235 status = "disabled"; 236 237 sata0: sata-port@0 { 238 reg = <0>; 239 phys = <&sata_phy0>; 240 }; 241 242 sata1: sata-port@1 { 243 reg = <1>; 244 phys = <&sata_phy1>; 245 }; 246 }; 247 248 sata_phy: sata-phy@1800000 { 249 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3"; 250 reg = <0x180100 0x0eff>; 251 reg-names = "phy"; 252 #address-cells = <1>; 253 #size-cells = <0>; 254 status = "disabled"; 255 256 sata_phy0: sata-phy@0 { 257 reg = <0>; 258 #phy-cells = <0>; 259 }; 260 261 sata_phy1: sata-phy@1 { 262 reg = <1>; 263 #phy-cells = <0>; 264 }; 265 }; 266 }; 267}; 268