1/ { 2 #address-cells = <1>; 3 #size-cells = <1>; 4 compatible = "brcm,bcm7425"; 5 6 cpus { 7 #address-cells = <1>; 8 #size-cells = <0>; 9 10 mips-hpt-frequency = <163125000>; 11 12 cpu@0 { 13 compatible = "brcm,bmips5000"; 14 device_type = "cpu"; 15 reg = <0>; 16 }; 17 18 cpu@1 { 19 compatible = "brcm,bmips5000"; 20 device_type = "cpu"; 21 reg = <1>; 22 }; 23 }; 24 25 aliases { 26 uart0 = &uart0; 27 }; 28 29 cpu_intc: cpu_intc { 30 #address-cells = <0>; 31 compatible = "mti,cpu-interrupt-controller"; 32 33 interrupt-controller; 34 #interrupt-cells = <1>; 35 }; 36 37 clocks { 38 uart_clk: uart_clk { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <81000000>; 42 }; 43 }; 44 45 rdb { 46 #address-cells = <1>; 47 #size-cells = <1>; 48 49 compatible = "simple-bus"; 50 ranges = <0 0x10000000 0x01000000>; 51 52 periph_intc: periph_intc@41a400 { 53 compatible = "brcm,bcm7038-l1-intc"; 54 reg = <0x41a400 0x30>, <0x41a600 0x30>; 55 56 interrupt-controller; 57 #interrupt-cells = <1>; 58 59 interrupt-parent = <&cpu_intc>; 60 interrupts = <2>, <3>; 61 }; 62 63 sun_l2_intc: sun_l2_intc@403000 { 64 compatible = "brcm,l2-intc"; 65 reg = <0x403000 0x30>; 66 interrupt-controller; 67 #interrupt-cells = <1>; 68 interrupt-parent = <&periph_intc>; 69 interrupts = <47>; 70 }; 71 72 gisb-arb@400000 { 73 compatible = "brcm,bcm7400-gisb-arb"; 74 reg = <0x400000 0xdc>; 75 native-endian; 76 interrupt-parent = <&sun_l2_intc>; 77 interrupts = <0>, <2>; 78 brcm,gisb-arb-master-mask = <0x177b>; 79 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pcie_0", 80 "bsp_0", "rdc_0", 81 "raaga_0", "avd_1", 82 "jtag_0", "svd_0", 83 "vice_0"; 84 }; 85 86 upg_irq0_intc: upg_irq0_intc@406780 { 87 compatible = "brcm,bcm7120-l2-intc"; 88 reg = <0x406780 0x8>; 89 90 brcm,int-map-mask = <0x44>; 91 brcm,int-fwd-mask = <0x70000>; 92 93 interrupt-controller; 94 #interrupt-cells = <1>; 95 96 interrupt-parent = <&periph_intc>; 97 interrupts = <55>; 98 }; 99 100 sun_top_ctrl: syscon@404000 { 101 compatible = "brcm,bcm7425-sun-top-ctrl", "syscon"; 102 reg = <0x404000 0x51c>; 103 }; 104 105 reboot { 106 compatible = "brcm,brcmstb-reboot"; 107 syscon = <&sun_top_ctrl 0x304 0x308>; 108 }; 109 110 uart0: serial@406b00 { 111 compatible = "ns16550a"; 112 reg = <0x406b00 0x20>; 113 reg-io-width = <0x4>; 114 reg-shift = <0x2>; 115 interrupt-parent = <&periph_intc>; 116 interrupts = <61>; 117 clocks = <&uart_clk>; 118 status = "disabled"; 119 }; 120 121 enet0: ethernet@b80000 { 122 phy-mode = "internal"; 123 phy-handle = <&phy1>; 124 mac-address = [ 00 10 18 36 23 1a ]; 125 compatible = "brcm,genet-v3"; 126 #address-cells = <0x1>; 127 #size-cells = <0x1>; 128 reg = <0xb80000 0x11c88>; 129 interrupts = <17>, <18>; 130 interrupt-parent = <&periph_intc>; 131 status = "disabled"; 132 133 mdio@e14 { 134 compatible = "brcm,genet-mdio-v3"; 135 #address-cells = <0x1>; 136 #size-cells = <0x0>; 137 reg = <0xe14 0x8>; 138 139 phy1: ethernet-phy@1 { 140 max-speed = <100>; 141 reg = <0x1>; 142 compatible = "brcm,40nm-ephy", 143 "ethernet-phy-ieee802.3-c22"; 144 }; 145 }; 146 }; 147 148 ehci0: usb@480300 { 149 compatible = "brcm,bcm7425-ehci", "generic-ehci"; 150 reg = <0x480300 0x100>; 151 native-endian; 152 interrupt-parent = <&periph_intc>; 153 interrupts = <65>; 154 status = "disabled"; 155 }; 156 157 ohci0: usb@480400 { 158 compatible = "brcm,bcm7425-ohci", "generic-ohci"; 159 reg = <0x480400 0x100>; 160 native-endian; 161 no-big-frame-no; 162 interrupt-parent = <&periph_intc>; 163 interrupts = <67>; 164 status = "disabled"; 165 }; 166 167 ehci1: usb@480500 { 168 compatible = "brcm,bcm7425-ehci", "generic-ehci"; 169 reg = <0x480500 0x100>; 170 native-endian; 171 interrupt-parent = <&periph_intc>; 172 interrupts = <66>; 173 status = "disabled"; 174 }; 175 176 ohci1: usb@480600 { 177 compatible = "brcm,bcm7425-ohci", "generic-ohci"; 178 reg = <0x480600 0x100>; 179 native-endian; 180 no-big-frame-no; 181 interrupt-parent = <&periph_intc>; 182 interrupts = <68>; 183 status = "disabled"; 184 }; 185 186 ehci2: usb@490300 { 187 compatible = "brcm,bcm7425-ehci", "generic-ehci"; 188 reg = <0x490300 0x100>; 189 native-endian; 190 interrupt-parent = <&periph_intc>; 191 interrupts = <70>; 192 status = "disabled"; 193 }; 194 195 ohci2: usb@490400 { 196 compatible = "brcm,bcm7425-ohci", "generic-ohci"; 197 reg = <0x490400 0x100>; 198 native-endian; 199 no-big-frame-no; 200 interrupt-parent = <&periph_intc>; 201 interrupts = <72>; 202 status = "disabled"; 203 }; 204 205 ehci3: usb@490500 { 206 compatible = "brcm,bcm7425-ehci", "generic-ehci"; 207 reg = <0x490500 0x100>; 208 native-endian; 209 interrupt-parent = <&periph_intc>; 210 interrupts = <71>; 211 status = "disabled"; 212 }; 213 214 ohci3: usb@490600 { 215 compatible = "brcm,bcm7425-ohci", "generic-ohci"; 216 reg = <0x490600 0x100>; 217 native-endian; 218 no-big-frame-no; 219 interrupt-parent = <&periph_intc>; 220 interrupts = <73>; 221 status = "disabled"; 222 }; 223 224 sata: sata@181000 { 225 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci"; 226 reg-names = "ahci", "top-ctrl"; 227 reg = <0x181000 0xa9c>, <0x180020 0x1c>; 228 interrupt-parent = <&periph_intc>; 229 interrupts = <40>; 230 #address-cells = <1>; 231 #size-cells = <0>; 232 brcm,broken-ncq; 233 brcm,broken-phy; 234 status = "disabled"; 235 236 sata0: sata-port@0 { 237 reg = <0>; 238 phys = <&sata_phy0>; 239 }; 240 241 sata1: sata-port@1 { 242 reg = <1>; 243 phys = <&sata_phy1>; 244 }; 245 }; 246 247 sata_phy: sata-phy@1800000 { 248 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3"; 249 reg = <0x180100 0x0eff>; 250 reg-names = "phy"; 251 #address-cells = <1>; 252 #size-cells = <0>; 253 status = "disabled"; 254 255 sata_phy0: sata-phy@0 { 256 reg = <0>; 257 #phy-cells = <0>; 258 }; 259 260 sata_phy1: sata-phy@1 { 261 reg = <1>; 262 #phy-cells = <0>; 263 }; 264 }; 265 }; 266}; 267