1/ { 2 #address-cells = <1>; 3 #size-cells = <1>; 4 compatible = "brcm,bcm7420"; 5 6 cpus { 7 #address-cells = <1>; 8 #size-cells = <0>; 9 10 mips-hpt-frequency = <93750000>; 11 12 cpu@0 { 13 compatible = "brcm,bmips5000"; 14 device_type = "cpu"; 15 reg = <0>; 16 }; 17 18 cpu@1 { 19 compatible = "brcm,bmips5000"; 20 device_type = "cpu"; 21 reg = <1>; 22 }; 23 }; 24 25 aliases { 26 uart0 = &uart0; 27 }; 28 29 cpu_intc: cpu_intc { 30 #address-cells = <0>; 31 compatible = "mti,cpu-interrupt-controller"; 32 33 interrupt-controller; 34 #interrupt-cells = <1>; 35 }; 36 37 clocks { 38 uart_clk: uart_clk { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <81000000>; 42 }; 43 }; 44 45 rdb { 46 #address-cells = <1>; 47 #size-cells = <1>; 48 49 compatible = "simple-bus"; 50 ranges = <0 0x10000000 0x01000000>; 51 52 periph_intc: periph_intc@441400 { 53 compatible = "brcm,bcm7038-l1-intc"; 54 reg = <0x441400 0x30>, <0x441600 0x30>; 55 56 interrupt-controller; 57 #interrupt-cells = <1>; 58 59 interrupt-parent = <&cpu_intc>; 60 interrupts = <2>, <3>; 61 }; 62 63 sun_l2_intc: sun_l2_intc@401800 { 64 compatible = "brcm,l2-intc"; 65 reg = <0x401800 0x30>; 66 interrupt-controller; 67 #interrupt-cells = <1>; 68 interrupt-parent = <&periph_intc>; 69 interrupts = <23>; 70 }; 71 72 gisb-arb@400000 { 73 compatible = "brcm,bcm7400-gisb-arb"; 74 reg = <0x400000 0xdc>; 75 native-endian; 76 interrupt-parent = <&sun_l2_intc>; 77 interrupts = <0>, <2>; 78 brcm,gisb-arb-master-mask = <0x3ff>; 79 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0", 80 "pcie_0", "bsp_0", "rdc_0", 81 "rptd_0", "avd_0", "avd_1", 82 "jtag_0"; 83 }; 84 85 upg_irq0_intc: upg_irq0_intc@406780 { 86 compatible = "brcm,bcm7120-l2-intc"; 87 reg = <0x406780 0x8>; 88 89 brcm,int-map-mask = <0x44>; 90 brcm,int-fwd-mask = <0x70000>; 91 92 interrupt-controller; 93 #interrupt-cells = <1>; 94 95 interrupt-parent = <&periph_intc>; 96 interrupts = <18>; 97 }; 98 99 sun_top_ctrl: syscon@404000 { 100 compatible = "brcm,bcm7420-sun-top-ctrl", "syscon"; 101 reg = <0x404000 0x60c>; 102 little-endian; 103 }; 104 105 reboot { 106 compatible = "brcm,bcm7038-reboot"; 107 syscon = <&sun_top_ctrl 0x8 0x14>; 108 }; 109 110 uart0: serial@406b00 { 111 compatible = "ns16550a"; 112 reg = <0x406b00 0x20>; 113 reg-io-width = <0x4>; 114 reg-shift = <0x2>; 115 interrupt-parent = <&periph_intc>; 116 interrupts = <21>; 117 clocks = <&uart_clk>; 118 status = "disabled"; 119 }; 120 121 enet0: ethernet@468000 { 122 phy-mode = "internal"; 123 phy-handle = <&phy1>; 124 mac-address = [ 00 10 18 36 23 1a ]; 125 compatible = "brcm,genet-v1"; 126 #address-cells = <0x1>; 127 #size-cells = <0x1>; 128 reg = <0x468000 0x3c8c>; 129 interrupts = <69>, <79>; 130 interrupt-parent = <&periph_intc>; 131 status = "disabled"; 132 133 mdio@e14 { 134 compatible = "brcm,genet-mdio-v1"; 135 #address-cells = <0x1>; 136 #size-cells = <0x0>; 137 reg = <0xe14 0x8>; 138 139 phy1: ethernet-phy@1 { 140 max-speed = <100>; 141 reg = <0x1>; 142 compatible = "brcm,65nm-ephy", 143 "ethernet-phy-ieee802.3-c22"; 144 }; 145 }; 146 }; 147 148 ehci0: usb@488300 { 149 compatible = "brcm,bcm7420-ehci", "generic-ehci"; 150 reg = <0x488300 0x100>; 151 interrupt-parent = <&periph_intc>; 152 interrupts = <60>; 153 status = "disabled"; 154 }; 155 156 ohci0: usb@488400 { 157 compatible = "brcm,bcm7420-ohci", "generic-ohci"; 158 reg = <0x488400 0x100>; 159 native-endian; 160 no-big-frame-no; 161 interrupt-parent = <&periph_intc>; 162 interrupts = <61>; 163 status = "disabled"; 164 }; 165 166 ehci1: usb@488500 { 167 compatible = "brcm,bcm7420-ehci", "generic-ehci"; 168 reg = <0x488500 0x100>; 169 interrupt-parent = <&periph_intc>; 170 interrupts = <55>; 171 status = "disabled"; 172 }; 173 174 ohci1: usb@488600 { 175 compatible = "brcm,bcm7420-ohci", "generic-ohci"; 176 reg = <0x488600 0x100>; 177 native-endian; 178 no-big-frame-no; 179 interrupt-parent = <&periph_intc>; 180 interrupts = <62>; 181 status = "disabled"; 182 }; 183 }; 184}; 185