18945e37eSKevin Cernekee/ { 28945e37eSKevin Cernekee #address-cells = <1>; 38945e37eSKevin Cernekee #size-cells = <1>; 48945e37eSKevin Cernekee compatible = "brcm,bcm7346"; 58945e37eSKevin Cernekee 68945e37eSKevin Cernekee cpus { 78945e37eSKevin Cernekee #address-cells = <1>; 88945e37eSKevin Cernekee #size-cells = <0>; 98945e37eSKevin Cernekee 108945e37eSKevin Cernekee mips-hpt-frequency = <163125000>; 118945e37eSKevin Cernekee 128945e37eSKevin Cernekee cpu@0 { 138945e37eSKevin Cernekee compatible = "brcm,bmips5000"; 148945e37eSKevin Cernekee device_type = "cpu"; 158945e37eSKevin Cernekee reg = <0>; 168945e37eSKevin Cernekee }; 178945e37eSKevin Cernekee 188945e37eSKevin Cernekee cpu@1 { 198945e37eSKevin Cernekee compatible = "brcm,bmips5000"; 208945e37eSKevin Cernekee device_type = "cpu"; 218945e37eSKevin Cernekee reg = <1>; 228945e37eSKevin Cernekee }; 238945e37eSKevin Cernekee }; 248945e37eSKevin Cernekee 258945e37eSKevin Cernekee aliases { 268945e37eSKevin Cernekee uart0 = &uart0; 278bac078cSJaedon Shin uart1 = &uart1; 288bac078cSJaedon Shin uart2 = &uart2; 298945e37eSKevin Cernekee }; 308945e37eSKevin Cernekee 318945e37eSKevin Cernekee cpu_intc: cpu_intc { 328945e37eSKevin Cernekee #address-cells = <0>; 338945e37eSKevin Cernekee compatible = "mti,cpu-interrupt-controller"; 348945e37eSKevin Cernekee 358945e37eSKevin Cernekee interrupt-controller; 368945e37eSKevin Cernekee #interrupt-cells = <1>; 378945e37eSKevin Cernekee }; 388945e37eSKevin Cernekee 398945e37eSKevin Cernekee clocks { 408945e37eSKevin Cernekee uart_clk: uart_clk { 418945e37eSKevin Cernekee compatible = "fixed-clock"; 428945e37eSKevin Cernekee #clock-cells = <0>; 438945e37eSKevin Cernekee clock-frequency = <81000000>; 448945e37eSKevin Cernekee }; 458945e37eSKevin Cernekee }; 468945e37eSKevin Cernekee 478945e37eSKevin Cernekee rdb { 488945e37eSKevin Cernekee #address-cells = <1>; 498945e37eSKevin Cernekee #size-cells = <1>; 508945e37eSKevin Cernekee 518945e37eSKevin Cernekee compatible = "simple-bus"; 528945e37eSKevin Cernekee ranges = <0 0x10000000 0x01000000>; 538945e37eSKevin Cernekee 548945e37eSKevin Cernekee periph_intc: periph_intc@411400 { 558945e37eSKevin Cernekee compatible = "brcm,bcm7038-l1-intc"; 568945e37eSKevin Cernekee reg = <0x411400 0x30>, <0x411600 0x30>; 578945e37eSKevin Cernekee 588945e37eSKevin Cernekee interrupt-controller; 598945e37eSKevin Cernekee #interrupt-cells = <1>; 608945e37eSKevin Cernekee 618945e37eSKevin Cernekee interrupt-parent = <&cpu_intc>; 628945e37eSKevin Cernekee interrupts = <2>, <3>; 638945e37eSKevin Cernekee }; 648945e37eSKevin Cernekee 658945e37eSKevin Cernekee sun_l2_intc: sun_l2_intc@403000 { 668945e37eSKevin Cernekee compatible = "brcm,l2-intc"; 678945e37eSKevin Cernekee reg = <0x403000 0x30>; 688945e37eSKevin Cernekee interrupt-controller; 698945e37eSKevin Cernekee #interrupt-cells = <1>; 708945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 718945e37eSKevin Cernekee interrupts = <51>; 728945e37eSKevin Cernekee }; 738945e37eSKevin Cernekee 748945e37eSKevin Cernekee gisb-arb@400000 { 758945e37eSKevin Cernekee compatible = "brcm,bcm7400-gisb-arb"; 768945e37eSKevin Cernekee reg = <0x400000 0xdc>; 778945e37eSKevin Cernekee native-endian; 788945e37eSKevin Cernekee interrupt-parent = <&sun_l2_intc>; 798945e37eSKevin Cernekee interrupts = <0>, <2>; 808945e37eSKevin Cernekee brcm,gisb-arb-master-mask = <0x673>; 818945e37eSKevin Cernekee brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0", 828945e37eSKevin Cernekee "rdc_0", "raaga_0", 838945e37eSKevin Cernekee "jtag_0", "svd_0"; 848945e37eSKevin Cernekee }; 858945e37eSKevin Cernekee 868945e37eSKevin Cernekee upg_irq0_intc: upg_irq0_intc@406780 { 878945e37eSKevin Cernekee compatible = "brcm,bcm7120-l2-intc"; 888945e37eSKevin Cernekee reg = <0x406780 0x8>; 898945e37eSKevin Cernekee 9039d9b6b2SJaedon Shin brcm,int-map-mask = <0x44>, <0xf000000>; 918945e37eSKevin Cernekee brcm,int-fwd-mask = <0x70000>; 928945e37eSKevin Cernekee 938945e37eSKevin Cernekee interrupt-controller; 948945e37eSKevin Cernekee #interrupt-cells = <1>; 958945e37eSKevin Cernekee 968945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 9739d9b6b2SJaedon Shin interrupts = <59>, <57>; 9839d9b6b2SJaedon Shin interrupt-names = "upg_main", "upg_bsc"; 9939d9b6b2SJaedon Shin }; 10039d9b6b2SJaedon Shin 10139d9b6b2SJaedon Shin upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 { 10239d9b6b2SJaedon Shin compatible = "brcm,bcm7120-l2-intc"; 10339d9b6b2SJaedon Shin reg = <0x408b80 0x8>; 10439d9b6b2SJaedon Shin 10539d9b6b2SJaedon Shin brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>; 10639d9b6b2SJaedon Shin brcm,int-fwd-mask = <0>; 10739d9b6b2SJaedon Shin brcm,irq-can-wake; 10839d9b6b2SJaedon Shin 10939d9b6b2SJaedon Shin interrupt-controller; 11039d9b6b2SJaedon Shin #interrupt-cells = <1>; 11139d9b6b2SJaedon Shin 11239d9b6b2SJaedon Shin interrupt-parent = <&periph_intc>; 11339d9b6b2SJaedon Shin interrupts = <60>, <58>, <62>; 11439d9b6b2SJaedon Shin interrupt-names = "upg_main_aon", "upg_bsc_aon", 11539d9b6b2SJaedon Shin "upg_spi"; 1168945e37eSKevin Cernekee }; 1178945e37eSKevin Cernekee 1188945e37eSKevin Cernekee sun_top_ctrl: syscon@404000 { 1198945e37eSKevin Cernekee compatible = "brcm,bcm7346-sun-top-ctrl", "syscon"; 1208945e37eSKevin Cernekee reg = <0x404000 0x51c>; 1218945e37eSKevin Cernekee little-endian; 1228945e37eSKevin Cernekee }; 1238945e37eSKevin Cernekee 1248945e37eSKevin Cernekee reboot { 1258945e37eSKevin Cernekee compatible = "brcm,brcmstb-reboot"; 1268945e37eSKevin Cernekee syscon = <&sun_top_ctrl 0x304 0x308>; 1278945e37eSKevin Cernekee }; 1288945e37eSKevin Cernekee 1298945e37eSKevin Cernekee uart0: serial@406900 { 1308945e37eSKevin Cernekee compatible = "ns16550a"; 1318945e37eSKevin Cernekee reg = <0x406900 0x20>; 1328945e37eSKevin Cernekee reg-io-width = <0x4>; 1338945e37eSKevin Cernekee reg-shift = <0x2>; 1348945e37eSKevin Cernekee native-endian; 1358945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 1368945e37eSKevin Cernekee interrupts = <64>; 1378945e37eSKevin Cernekee clocks = <&uart_clk>; 1388945e37eSKevin Cernekee status = "disabled"; 1398945e37eSKevin Cernekee }; 1408945e37eSKevin Cernekee 1418bac078cSJaedon Shin uart1: serial@406940 { 1428bac078cSJaedon Shin compatible = "ns16550a"; 1438bac078cSJaedon Shin reg = <0x406940 0x20>; 1448bac078cSJaedon Shin reg-io-width = <0x4>; 1458bac078cSJaedon Shin reg-shift = <0x2>; 1468bac078cSJaedon Shin native-endian; 1478bac078cSJaedon Shin interrupt-parent = <&periph_intc>; 1488bac078cSJaedon Shin interrupts = <65>; 1498bac078cSJaedon Shin clocks = <&uart_clk>; 1508bac078cSJaedon Shin status = "disabled"; 1518bac078cSJaedon Shin }; 1528bac078cSJaedon Shin 1538bac078cSJaedon Shin uart2: serial@406980 { 1548bac078cSJaedon Shin compatible = "ns16550a"; 1558bac078cSJaedon Shin reg = <0x406980 0x20>; 1568bac078cSJaedon Shin reg-io-width = <0x4>; 1578bac078cSJaedon Shin reg-shift = <0x2>; 1588bac078cSJaedon Shin native-endian; 1598bac078cSJaedon Shin interrupt-parent = <&periph_intc>; 1608bac078cSJaedon Shin interrupts = <66>; 1618bac078cSJaedon Shin clocks = <&uart_clk>; 1628bac078cSJaedon Shin status = "disabled"; 1638bac078cSJaedon Shin }; 1648bac078cSJaedon Shin 16539d9b6b2SJaedon Shin bsca: i2c@406200 { 16639d9b6b2SJaedon Shin clock-frequency = <390000>; 16739d9b6b2SJaedon Shin compatible = "brcm,brcmstb-i2c"; 16839d9b6b2SJaedon Shin interrupt-parent = <&upg_irq0_intc>; 16939d9b6b2SJaedon Shin reg = <0x406200 0x58>; 17039d9b6b2SJaedon Shin interrupts = <24>; 17139d9b6b2SJaedon Shin interrupt-names = "upg_bsca"; 17239d9b6b2SJaedon Shin status = "disabled"; 17339d9b6b2SJaedon Shin }; 17439d9b6b2SJaedon Shin 17539d9b6b2SJaedon Shin bscb: i2c@406280 { 17639d9b6b2SJaedon Shin clock-frequency = <390000>; 17739d9b6b2SJaedon Shin compatible = "brcm,brcmstb-i2c"; 17839d9b6b2SJaedon Shin interrupt-parent = <&upg_irq0_intc>; 17939d9b6b2SJaedon Shin reg = <0x406280 0x58>; 18039d9b6b2SJaedon Shin interrupts = <25>; 18139d9b6b2SJaedon Shin interrupt-names = "upg_bscb"; 18239d9b6b2SJaedon Shin status = "disabled"; 18339d9b6b2SJaedon Shin }; 18439d9b6b2SJaedon Shin 18539d9b6b2SJaedon Shin bscc: i2c@406300 { 18639d9b6b2SJaedon Shin clock-frequency = <390000>; 18739d9b6b2SJaedon Shin compatible = "brcm,brcmstb-i2c"; 18839d9b6b2SJaedon Shin interrupt-parent = <&upg_irq0_intc>; 18939d9b6b2SJaedon Shin reg = <0x406300 0x58>; 19039d9b6b2SJaedon Shin interrupts = <26>; 19139d9b6b2SJaedon Shin interrupt-names = "upg_bscc"; 19239d9b6b2SJaedon Shin status = "disabled"; 19339d9b6b2SJaedon Shin }; 19439d9b6b2SJaedon Shin 19539d9b6b2SJaedon Shin bscd: i2c@406380 { 19639d9b6b2SJaedon Shin clock-frequency = <390000>; 19739d9b6b2SJaedon Shin compatible = "brcm,brcmstb-i2c"; 19839d9b6b2SJaedon Shin interrupt-parent = <&upg_irq0_intc>; 19939d9b6b2SJaedon Shin reg = <0x406380 0x58>; 20039d9b6b2SJaedon Shin interrupts = <27>; 20139d9b6b2SJaedon Shin interrupt-names = "upg_bscd"; 20239d9b6b2SJaedon Shin status = "disabled"; 20339d9b6b2SJaedon Shin }; 20439d9b6b2SJaedon Shin 20539d9b6b2SJaedon Shin bsce: i2c@408980 { 20639d9b6b2SJaedon Shin clock-frequency = <390000>; 20739d9b6b2SJaedon Shin compatible = "brcm,brcmstb-i2c"; 20839d9b6b2SJaedon Shin interrupt-parent = <&upg_aon_irq0_intc>; 20939d9b6b2SJaedon Shin reg = <0x408980 0x58>; 21039d9b6b2SJaedon Shin interrupts = <27>; 21139d9b6b2SJaedon Shin interrupt-names = "upg_bsce"; 21239d9b6b2SJaedon Shin status = "disabled"; 21339d9b6b2SJaedon Shin }; 21439d9b6b2SJaedon Shin 2158945e37eSKevin Cernekee enet0: ethernet@430000 { 2168945e37eSKevin Cernekee phy-mode = "internal"; 2178945e37eSKevin Cernekee phy-handle = <&phy1>; 2188945e37eSKevin Cernekee mac-address = [ 00 10 18 36 23 1a ]; 2198945e37eSKevin Cernekee compatible = "brcm,genet-v2"; 2208945e37eSKevin Cernekee #address-cells = <0x1>; 2218945e37eSKevin Cernekee #size-cells = <0x1>; 2228945e37eSKevin Cernekee reg = <0x430000 0x4c8c>; 2238945e37eSKevin Cernekee interrupts = <24>, <25>; 2248945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 2258945e37eSKevin Cernekee status = "disabled"; 2268945e37eSKevin Cernekee 2278945e37eSKevin Cernekee mdio@e14 { 2288945e37eSKevin Cernekee compatible = "brcm,genet-mdio-v2"; 2298945e37eSKevin Cernekee #address-cells = <0x1>; 2308945e37eSKevin Cernekee #size-cells = <0x0>; 2318945e37eSKevin Cernekee reg = <0xe14 0x8>; 2328945e37eSKevin Cernekee 2338945e37eSKevin Cernekee phy1: ethernet-phy@1 { 2348945e37eSKevin Cernekee max-speed = <100>; 2358945e37eSKevin Cernekee reg = <0x1>; 2368945e37eSKevin Cernekee compatible = "brcm,40nm-ephy", 2378945e37eSKevin Cernekee "ethernet-phy-ieee802.3-c22"; 2388945e37eSKevin Cernekee }; 2398945e37eSKevin Cernekee }; 2408945e37eSKevin Cernekee }; 2418945e37eSKevin Cernekee 2428945e37eSKevin Cernekee ehci0: usb@480300 { 2438945e37eSKevin Cernekee compatible = "brcm,bcm7346-ehci", "generic-ehci"; 2448945e37eSKevin Cernekee reg = <0x480300 0x100>; 2458945e37eSKevin Cernekee native-endian; 2468945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 2478945e37eSKevin Cernekee interrupts = <68>; 2488945e37eSKevin Cernekee status = "disabled"; 2498945e37eSKevin Cernekee }; 2508945e37eSKevin Cernekee 2518945e37eSKevin Cernekee ohci0: usb@480400 { 2528945e37eSKevin Cernekee compatible = "brcm,bcm7346-ohci", "generic-ohci"; 2538945e37eSKevin Cernekee reg = <0x480400 0x100>; 2548945e37eSKevin Cernekee native-endian; 2558945e37eSKevin Cernekee no-big-frame-no; 2568945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 2578945e37eSKevin Cernekee interrupts = <70>; 2588945e37eSKevin Cernekee status = "disabled"; 2598945e37eSKevin Cernekee }; 2608945e37eSKevin Cernekee 2618945e37eSKevin Cernekee ehci1: usb@480500 { 2628945e37eSKevin Cernekee compatible = "brcm,bcm7346-ehci", "generic-ehci"; 2638945e37eSKevin Cernekee reg = <0x480500 0x100>; 2648945e37eSKevin Cernekee native-endian; 2658945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 2668945e37eSKevin Cernekee interrupts = <69>; 2678945e37eSKevin Cernekee status = "disabled"; 2688945e37eSKevin Cernekee }; 2698945e37eSKevin Cernekee 2708945e37eSKevin Cernekee ohci1: usb@480600 { 2718945e37eSKevin Cernekee compatible = "brcm,bcm7346-ohci", "generic-ohci"; 2728945e37eSKevin Cernekee reg = <0x480600 0x100>; 2738945e37eSKevin Cernekee native-endian; 2748945e37eSKevin Cernekee no-big-frame-no; 2758945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 2768945e37eSKevin Cernekee interrupts = <71>; 2778945e37eSKevin Cernekee status = "disabled"; 2788945e37eSKevin Cernekee }; 2798945e37eSKevin Cernekee 2808945e37eSKevin Cernekee ehci2: usb@490300 { 2818945e37eSKevin Cernekee compatible = "brcm,bcm7346-ehci", "generic-ehci"; 2828945e37eSKevin Cernekee reg = <0x490300 0x100>; 2838945e37eSKevin Cernekee native-endian; 2848945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 2858945e37eSKevin Cernekee interrupts = <73>; 2868945e37eSKevin Cernekee status = "disabled"; 2878945e37eSKevin Cernekee }; 2888945e37eSKevin Cernekee 2898945e37eSKevin Cernekee ohci2: usb@490400 { 2908945e37eSKevin Cernekee compatible = "brcm,bcm7346-ohci", "generic-ohci"; 2918945e37eSKevin Cernekee reg = <0x490400 0x100>; 2928945e37eSKevin Cernekee native-endian; 2938945e37eSKevin Cernekee no-big-frame-no; 2948945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 2958945e37eSKevin Cernekee interrupts = <75>; 2968945e37eSKevin Cernekee status = "disabled"; 2978945e37eSKevin Cernekee }; 2988945e37eSKevin Cernekee 2998945e37eSKevin Cernekee ehci3: usb@490500 { 3008945e37eSKevin Cernekee compatible = "brcm,bcm7346-ehci", "generic-ehci"; 3018945e37eSKevin Cernekee reg = <0x490500 0x100>; 3028945e37eSKevin Cernekee native-endian; 3038945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 3048945e37eSKevin Cernekee interrupts = <74>; 3058945e37eSKevin Cernekee status = "disabled"; 3068945e37eSKevin Cernekee }; 3078945e37eSKevin Cernekee 3088945e37eSKevin Cernekee ohci3: usb@490600 { 3098945e37eSKevin Cernekee compatible = "brcm,bcm7346-ohci", "generic-ohci"; 3108945e37eSKevin Cernekee reg = <0x490600 0x100>; 3118945e37eSKevin Cernekee native-endian; 3128945e37eSKevin Cernekee no-big-frame-no; 3138945e37eSKevin Cernekee interrupt-parent = <&periph_intc>; 3148945e37eSKevin Cernekee interrupts = <76>; 3158945e37eSKevin Cernekee status = "disabled"; 3168945e37eSKevin Cernekee }; 31719e88101SJaedon Shin 31819e88101SJaedon Shin sata: sata@181000 { 31919e88101SJaedon Shin compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci"; 32019e88101SJaedon Shin reg-names = "ahci", "top-ctrl"; 32119e88101SJaedon Shin reg = <0x181000 0xa9c>, <0x180020 0x1c>; 32219e88101SJaedon Shin interrupt-parent = <&periph_intc>; 32319e88101SJaedon Shin interrupts = <40>; 32419e88101SJaedon Shin #address-cells = <1>; 32519e88101SJaedon Shin #size-cells = <0>; 32619e88101SJaedon Shin brcm,broken-ncq; 32719e88101SJaedon Shin brcm,broken-phy; 32819e88101SJaedon Shin status = "disabled"; 32919e88101SJaedon Shin 33019e88101SJaedon Shin sata0: sata-port@0 { 33119e88101SJaedon Shin reg = <0>; 33219e88101SJaedon Shin phys = <&sata_phy0>; 33319e88101SJaedon Shin }; 33419e88101SJaedon Shin 33519e88101SJaedon Shin sata1: sata-port@1 { 33619e88101SJaedon Shin reg = <1>; 33719e88101SJaedon Shin phys = <&sata_phy1>; 33819e88101SJaedon Shin }; 33919e88101SJaedon Shin }; 34019e88101SJaedon Shin 34119e88101SJaedon Shin sata_phy: sata-phy@1800000 { 34219e88101SJaedon Shin compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3"; 34319e88101SJaedon Shin reg = <0x180100 0x0eff>; 34419e88101SJaedon Shin reg-names = "phy"; 34519e88101SJaedon Shin #address-cells = <1>; 34619e88101SJaedon Shin #size-cells = <0>; 34719e88101SJaedon Shin status = "disabled"; 34819e88101SJaedon Shin 34919e88101SJaedon Shin sata_phy0: sata-phy@0 { 35019e88101SJaedon Shin reg = <0>; 35119e88101SJaedon Shin #phy-cells = <0>; 35219e88101SJaedon Shin }; 35319e88101SJaedon Shin 35419e88101SJaedon Shin sata_phy1: sata-phy@1 { 35519e88101SJaedon Shin reg = <1>; 35619e88101SJaedon Shin #phy-cells = <0>; 35719e88101SJaedon Shin }; 35819e88101SJaedon Shin }; 3598945e37eSKevin Cernekee }; 3608945e37eSKevin Cernekee}; 361