xref: /openbmc/linux/arch/mips/boot/dts/brcm/bcm6358.dtsi (revision b1a792601f264df7172a728f1a83a05b6b399dfb)
1// SPDX-License-Identifier: GPL-2.0
2
3#include "dt-bindings/clock/bcm6358-clock.h"
4#include "dt-bindings/reset/bcm6358-reset.h"
5
6/ {
7	#address-cells = <1>;
8	#size-cells = <1>;
9	compatible = "brcm,bcm6358";
10
11	cpus {
12		#address-cells = <1>;
13		#size-cells = <0>;
14
15		mips-hpt-frequency = <150000000>;
16
17		cpu@0 {
18			compatible = "brcm,bmips4350";
19			device_type = "cpu";
20			reg = <0>;
21		};
22
23		cpu@1 {
24			compatible = "brcm,bmips4350";
25			device_type = "cpu";
26			reg = <1>;
27		};
28	};
29
30	clocks {
31		periph_clk: periph-clk {
32			compatible = "fixed-clock";
33			#clock-cells = <0>;
34			clock-frequency = <50000000>;
35		};
36	};
37
38	aliases {
39		serial0 = &uart0;
40		serial1 = &uart1;
41	};
42
43	cpu_intc: interrupt-controller {
44		#address-cells = <0>;
45		compatible = "mti,cpu-interrupt-controller";
46
47		interrupt-controller;
48		#interrupt-cells = <1>;
49	};
50
51	ubus {
52		#address-cells = <1>;
53		#size-cells = <1>;
54
55		compatible = "simple-bus";
56		ranges;
57
58		clkctl: clock-controller@fffe0004 {
59			compatible = "brcm,bcm6358-clocks";
60			reg = <0xfffe0004 0x4>;
61			#clock-cells = <1>;
62		};
63
64		periph_cntl: syscon@fffe0008 {
65			compatible = "syscon";
66			reg = <0xfffe0000 0x4>;
67			native-endian;
68		};
69
70		reboot: syscon-reboot@fffe0008 {
71			compatible = "syscon-reboot";
72			regmap = <&periph_cntl>;
73			offset = <0x0>;
74			mask = <0x1>;
75		};
76
77		periph_intc: interrupt-controller@fffe000c {
78			compatible = "brcm,bcm6345-l1-intc";
79			reg = <0xfffe000c 0x8>,
80			      <0xfffe0038 0x8>;
81
82			interrupt-controller;
83			#interrupt-cells = <1>;
84
85			interrupt-parent = <&cpu_intc>;
86			interrupts = <2>, <3>;
87		};
88
89		periph_rst: reset-controller@fffe0034 {
90			compatible = "brcm,bcm6345-reset";
91			reg = <0xfffe0034 0x4>;
92			#reset-cells = <1>;
93		};
94
95		leds0: led-controller@fffe00d0 {
96			#address-cells = <1>;
97			#size-cells = <0>;
98			compatible = "brcm,bcm6358-leds";
99			reg = <0xfffe00d0 0x8>;
100
101			status = "disabled";
102		};
103
104		uart0: serial@fffe0100 {
105			compatible = "brcm,bcm6345-uart";
106			reg = <0xfffe0100 0x18>;
107
108			interrupt-parent = <&periph_intc>;
109			interrupts = <2>;
110
111			clocks = <&periph_clk>;
112			clock-names = "refclk";
113
114			status = "disabled";
115		};
116
117		uart1: serial@fffe0120 {
118			compatible = "brcm,bcm6345-uart";
119			reg = <0xfffe0120 0x18>;
120
121			interrupt-parent = <&periph_intc>;
122			interrupts = <3>;
123
124			clocks = <&periph_clk>;
125			clock-names = "refclk";
126
127			status = "disabled";
128		};
129
130		ehci: usb@fffe1300 {
131			compatible = "brcm,bcm6358-ehci", "generic-ehci";
132			reg = <0xfffe1300 0x100>;
133			big-endian;
134			interrupt-parent = <&periph_intc>;
135			interrupts = <10>;
136			status = "disabled";
137		};
138
139		ohci: usb@fffe1400 {
140			compatible = "brcm,bcm6358-ohci", "generic-ohci";
141			reg = <0xfffe1400 0x100>;
142			big-endian;
143			no-big-frame-no;
144			interrupt-parent = <&periph_intc>;
145			interrupts = <5>;
146			status = "disabled";
147		};
148	};
149};
150