xref: /openbmc/linux/arch/mips/boot/dts/brcm/bcm6328.dtsi (revision 7ea42936)
1// SPDX-License-Identifier: GPL-2.0
2
3#include "dt-bindings/clock/bcm6328-clock.h"
4#include "dt-bindings/reset/bcm6328-reset.h"
5#include "dt-bindings/soc/bcm6328-pm.h"
6
7/ {
8	#address-cells = <1>;
9	#size-cells = <1>;
10	compatible = "brcm,bcm6328";
11
12	cpus {
13		#address-cells = <1>;
14		#size-cells = <0>;
15
16		mips-hpt-frequency = <160000000>;
17
18		cpu@0 {
19			compatible = "brcm,bmips4350";
20			device_type = "cpu";
21			reg = <0>;
22		};
23
24		cpu@1 {
25			compatible = "brcm,bmips4350";
26			device_type = "cpu";
27			reg = <1>;
28		};
29	};
30
31	clocks {
32		periph_osc: periph-osc {
33			compatible = "fixed-clock";
34			#clock-cells = <0>;
35			clock-frequency = <50000000>;
36			clock-output-names = "periph";
37		};
38
39		hsspi_osc: hsspi-osc {
40			compatible = "fixed-clock";
41			#clock-cells = <0>;
42			clock-frequency = <133333333>;
43			clock-output-names = "hsspi_osc";
44		};
45	};
46
47	aliases {
48		nflash = &nflash;
49		serial0 = &uart0;
50		serial1 = &uart1;
51		spi1 = &hsspi;
52	};
53
54	cpu_intc: interrupt-controller {
55		#address-cells = <0>;
56		compatible = "mti,cpu-interrupt-controller";
57
58		interrupt-controller;
59		#interrupt-cells = <1>;
60	};
61
62	ubus {
63		#address-cells = <1>;
64		#size-cells = <1>;
65
66		compatible = "simple-bus";
67		ranges;
68
69		periph_clk: clock-controller@10000004 {
70			compatible = "brcm,bcm6328-clocks";
71			reg = <0x10000004 0x4>;
72			#clock-cells = <1>;
73		};
74
75		periph_rst: reset-controller@10000010 {
76			compatible = "brcm,bcm6345-reset";
77			reg = <0x10000010 0x4>;
78			#reset-cells = <1>;
79		};
80
81		periph_intc: interrupt-controller@10000020 {
82			compatible = "brcm,bcm6345-l1-intc";
83			reg = <0x10000020 0x10>,
84			      <0x10000030 0x10>;
85
86			interrupt-controller;
87			#interrupt-cells = <1>;
88
89			interrupt-parent = <&cpu_intc>;
90			interrupts = <2>, <3>;
91		};
92
93		wdt: watchdog@1000005c {
94			compatible = "brcm,bcm7038-wdt";
95			reg = <0x1000005c 0xc>;
96
97			clocks = <&periph_osc>;
98			clock-names = "refclk";
99
100			timeout-sec = <30>;
101		};
102
103		soft_reset: syscon@10000068 {
104			compatible = "syscon";
105			reg = <0x10000068 0x4>;
106			native-endian;
107
108			reboot {
109				compatible = "syscon-reboot";
110				offset = <0x0>;
111				mask = <0x1>;
112			};
113		};
114
115		uart0: serial@10000100 {
116			compatible = "brcm,bcm6345-uart";
117			reg = <0x10000100 0x18>;
118
119			interrupt-parent = <&periph_intc>;
120			interrupts = <28>;
121
122			clocks = <&periph_osc>;
123			clock-names = "refclk";
124
125			status = "disabled";
126		};
127
128		uart1: serial@10000120 {
129			compatible = "brcm,bcm6345-uart";
130			reg = <0x10000120 0x18>;
131
132			interrupt-parent = <&periph_intc>;
133			interrupts = <39>;
134
135			clocks = <&periph_osc>;
136			clock-names = "refclk";
137
138			status = "disabled";
139		};
140
141		nflash: nand@10000200 {
142			#address-cells = <1>;
143			#size-cells = <0>;
144			compatible = "brcm,nand-bcm6368",
145				     "brcm,brcmnand-v2.2",
146				     "brcm,brcmnand";
147			reg = <0x10000200 0x180>,
148			      <0x10000400 0x200>,
149			      <0x10000070 0x10>;
150			reg-names = "nand",
151				    "nand-cache",
152				    "nand-int-base";
153
154			interrupt-parent = <&periph_intc>;
155			interrupts = <0>;
156
157			status = "disabled";
158		};
159
160		leds0: led-controller@10000800 {
161			#address-cells = <1>;
162			#size-cells = <0>;
163			compatible = "brcm,bcm6328-leds";
164			reg = <0x10000800 0x24>;
165
166			status = "disabled";
167		};
168
169		hsspi: spi@10001000 {
170			#address-cells = <1>;
171			#size-cells = <0>;
172			compatible = "brcm,bcm6328-hsspi";
173			reg = <0x10001000 0x600>;
174
175			interrupt-parent = <&periph_intc>;
176			interrupts = <29>;
177
178			clocks = <&periph_clk BCM6328_CLK_HSSPI>,
179				 <&hsspi_osc>;
180			clock-names = "hsspi",
181				      "pll";
182
183			resets = <&periph_rst BCM6328_RST_SPI>;
184			reset-names = "hsspi";
185
186			status = "disabled";
187		};
188
189		periph_pwr: power-controller@10001848 {
190			compatible = "brcm,bcm6328-power-controller";
191			reg = <0x10001848 0x4>;
192			#power-domain-cells = <1>;
193		};
194
195		ehci: usb@10002500 {
196			compatible = "brcm,bcm6328-ehci", "generic-ehci";
197			reg = <0x10002500 0x100>;
198			big-endian;
199
200			interrupt-parent = <&periph_intc>;
201			interrupts = <42>;
202
203			phys = <&usbh 0>;
204			phy-names = "usb";
205
206			status = "disabled";
207		};
208
209		ohci: usb@10002600 {
210			compatible = "brcm,bcm6328-ohci", "generic-ohci";
211			reg = <0x10002600 0x100>;
212			big-endian;
213			no-big-frame-no;
214
215			interrupt-parent = <&periph_intc>;
216			interrupts = <41>;
217
218			phys = <&usbh 0>;
219			phy-names = "usb";
220
221			status = "disabled";
222		};
223
224		usbh: usb-phy@10002700 {
225			compatible = "brcm,bcm6328-usbh-phy";
226			reg = <0x10002700 0x38>;
227			#phy-cells = <1>;
228
229			clocks = <&periph_clk BCM6328_CLK_USBH>;
230			clock-names = "usbh";
231
232			power-domains = <&periph_pwr BCM6328_POWER_DOMAIN_USBH>;
233
234			resets = <&periph_rst BCM6328_RST_USBH>;
235			reset-names = "usbh";
236
237			status = "disabled";
238		};
239	};
240};
241