xref: /openbmc/linux/arch/mips/bcm63xx/setup.c (revision 95e9fd10)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
7  */
8 
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/delay.h>
12 #include <linux/bootmem.h>
13 #include <linux/ioport.h>
14 #include <linux/pm.h>
15 #include <asm/bootinfo.h>
16 #include <asm/time.h>
17 #include <asm/reboot.h>
18 #include <asm/cacheflush.h>
19 #include <bcm63xx_board.h>
20 #include <bcm63xx_cpu.h>
21 #include <bcm63xx_regs.h>
22 #include <bcm63xx_io.h>
23 
24 void bcm63xx_machine_halt(void)
25 {
26 	printk(KERN_INFO "System halted\n");
27 	while (1)
28 		;
29 }
30 
31 static void bcm6348_a1_reboot(void)
32 {
33 	u32 reg;
34 
35 	/* soft reset all blocks */
36 	printk(KERN_INFO "soft-resetting all blocks ...\n");
37 	reg = bcm_perf_readl(PERF_SOFTRESET_REG);
38 	reg &= ~SOFTRESET_6348_ALL;
39 	bcm_perf_writel(reg, PERF_SOFTRESET_REG);
40 	mdelay(10);
41 
42 	reg = bcm_perf_readl(PERF_SOFTRESET_REG);
43 	reg |= SOFTRESET_6348_ALL;
44 	bcm_perf_writel(reg, PERF_SOFTRESET_REG);
45 	mdelay(10);
46 
47 	/* Jump to the power on address. */
48 	printk(KERN_INFO "jumping to reset vector.\n");
49 	/* set high vectors (base at 0xbfc00000 */
50 	set_c0_status(ST0_BEV | ST0_ERL);
51 	/* run uncached in kseg0 */
52 	change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
53 	__flush_cache_all();
54 	/* remove all wired TLB entries */
55 	write_c0_wired(0);
56 	__asm__ __volatile__(
57 		"jr\t%0"
58 		:
59 		: "r" (0xbfc00000));
60 	while (1)
61 		;
62 }
63 
64 void bcm63xx_machine_reboot(void)
65 {
66 	u32 reg, perf_regs[2] = { 0, 0 };
67 	unsigned int i;
68 
69 	/* mask and clear all external irq */
70 	switch (bcm63xx_get_cpu_id()) {
71 	case BCM6328_CPU_ID:
72 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
73 		break;
74 	case BCM6338_CPU_ID:
75 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
76 		break;
77 	case BCM6348_CPU_ID:
78 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348;
79 		break;
80 	case BCM6358_CPU_ID:
81 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6358;
82 		break;
83 	}
84 
85 	for (i = 0; i < 2; i++) {
86 		reg = bcm_perf_readl(perf_regs[i]);
87 		if (BCMCPU_IS_6348()) {
88 			reg &= ~EXTIRQ_CFG_MASK_ALL_6348;
89 			reg |= EXTIRQ_CFG_CLEAR_ALL_6348;
90 		} else {
91 			reg &= ~EXTIRQ_CFG_MASK_ALL;
92 			reg |= EXTIRQ_CFG_CLEAR_ALL;
93 		}
94 		bcm_perf_writel(reg, perf_regs[i]);
95 	}
96 
97 	if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1))
98 		bcm6348_a1_reboot();
99 
100 	printk(KERN_INFO "triggering watchdog soft-reset...\n");
101 	if (BCMCPU_IS_6328()) {
102 		bcm_wdt_writel(1, WDT_SOFTRESET_REG);
103 	} else {
104 		reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
105 		reg |= SYS_PLL_SOFT_RESET;
106 		bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
107 	}
108 	while (1)
109 		;
110 }
111 
112 static void __bcm63xx_machine_reboot(char *p)
113 {
114 	bcm63xx_machine_reboot();
115 }
116 
117 /*
118  * return system type in /proc/cpuinfo
119  */
120 const char *get_system_type(void)
121 {
122 	static char buf[128];
123 	snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)",
124 		 board_get_name(),
125 		 bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
126 	return buf;
127 }
128 
129 void __init plat_time_init(void)
130 {
131 	mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2;
132 }
133 
134 void __init plat_mem_setup(void)
135 {
136 	add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM);
137 
138 	_machine_halt = bcm63xx_machine_halt;
139 	_machine_restart = __bcm63xx_machine_reboot;
140 	pm_power_off = bcm63xx_machine_halt;
141 
142 	set_io_port_base(0);
143 	ioport_resource.start = 0;
144 	ioport_resource.end = ~0;
145 
146 	board_setup();
147 }
148 
149 int __init bcm63xx_register_devices(void)
150 {
151 	return board_register_devices();
152 }
153 
154 device_initcall(bcm63xx_register_devices);
155