1e7300d04SMaxime Bizon /* 2e7300d04SMaxime Bizon * This file is subject to the terms and conditions of the GNU General Public 3e7300d04SMaxime Bizon * License. See the file "COPYING" in the main directory of this archive 4e7300d04SMaxime Bizon * for more details. 5e7300d04SMaxime Bizon * 6e7300d04SMaxime Bizon * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> 7e7300d04SMaxime Bizon * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org> 8e7300d04SMaxime Bizon */ 9e7300d04SMaxime Bizon 10e7300d04SMaxime Bizon #include <linux/init.h> 11e7300d04SMaxime Bizon #include <linux/kernel.h> 12e7300d04SMaxime Bizon #include <linux/string.h> 13e7300d04SMaxime Bizon #include <linux/platform_device.h> 14e7300d04SMaxime Bizon #include <linux/ssb/ssb.h> 15e7300d04SMaxime Bizon #include <asm/addrspace.h> 16e7300d04SMaxime Bizon #include <bcm63xx_board.h> 17e7300d04SMaxime Bizon #include <bcm63xx_cpu.h> 18524ef29cSMaxime Bizon #include <bcm63xx_dev_uart.h> 19e7300d04SMaxime Bizon #include <bcm63xx_regs.h> 20e7300d04SMaxime Bizon #include <bcm63xx_io.h> 21e7e333cbSJonas Gorski #include <bcm63xx_nvram.h> 22e7300d04SMaxime Bizon #include <bcm63xx_dev_pci.h> 23e7300d04SMaxime Bizon #include <bcm63xx_dev_enet.h> 24e7300d04SMaxime Bizon #include <bcm63xx_dev_dsp.h> 254b897d54SJonas Gorski #include <bcm63xx_dev_flash.h> 26553d6d5fSMaxime Bizon #include <bcm63xx_dev_pcmcia.h> 2776ca4e14SFlorian Fainelli #include <bcm63xx_dev_spi.h> 2822df90f6SKevin Cernekee #include <bcm63xx_dev_usb_usbd.h> 29e7300d04SMaxime Bizon #include <board_bcm963xx.h> 30e7300d04SMaxime Bizon 31e7300d04SMaxime Bizon #define PFX "board_bcm963xx: " 32e7300d04SMaxime Bizon 33e7300d04SMaxime Bizon static struct board_info board; 34e7300d04SMaxime Bizon 35e7300d04SMaxime Bizon /* 362f74b770SJonas Gorski * known 6328 boards 372f74b770SJonas Gorski */ 382f74b770SJonas Gorski #ifdef CONFIG_BCM63XX_CPU_6328 392f74b770SJonas Gorski static struct board_info __initdata board_96328avng = { 402f74b770SJonas Gorski .name = "96328avng", 412f74b770SJonas Gorski .expected_cpu_id = 0x6328, 422f74b770SJonas Gorski 432f74b770SJonas Gorski .has_uart0 = 1, 442f74b770SJonas Gorski .has_pci = 1, 4522df90f6SKevin Cernekee .has_usbd = 0, 4622df90f6SKevin Cernekee 4722df90f6SKevin Cernekee .usbd = { 4822df90f6SKevin Cernekee .use_fullspeed = 0, 4922df90f6SKevin Cernekee .port_no = 0, 5022df90f6SKevin Cernekee }, 512f74b770SJonas Gorski 522f74b770SJonas Gorski .leds = { 532f74b770SJonas Gorski { 542f74b770SJonas Gorski .name = "96328avng::ppp-fail", 552f74b770SJonas Gorski .gpio = 2, 562f74b770SJonas Gorski .active_low = 1, 572f74b770SJonas Gorski }, 582f74b770SJonas Gorski { 592f74b770SJonas Gorski .name = "96328avng::power", 602f74b770SJonas Gorski .gpio = 4, 612f74b770SJonas Gorski .active_low = 1, 622f74b770SJonas Gorski .default_trigger = "default-on", 632f74b770SJonas Gorski }, 642f74b770SJonas Gorski { 652f74b770SJonas Gorski .name = "96328avng::power-fail", 662f74b770SJonas Gorski .gpio = 8, 672f74b770SJonas Gorski .active_low = 1, 682f74b770SJonas Gorski }, 692f74b770SJonas Gorski { 702f74b770SJonas Gorski .name = "96328avng::wps", 712f74b770SJonas Gorski .gpio = 9, 722f74b770SJonas Gorski .active_low = 1, 732f74b770SJonas Gorski }, 742f74b770SJonas Gorski { 752f74b770SJonas Gorski .name = "96328avng::ppp", 762f74b770SJonas Gorski .gpio = 11, 772f74b770SJonas Gorski .active_low = 1, 782f74b770SJonas Gorski }, 792f74b770SJonas Gorski }, 802f74b770SJonas Gorski }; 812f74b770SJonas Gorski #endif 822f74b770SJonas Gorski 832f74b770SJonas Gorski /* 84e7300d04SMaxime Bizon * known 6338 boards 85e7300d04SMaxime Bizon */ 86e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6338 87e7300d04SMaxime Bizon static struct board_info __initdata board_96338gw = { 88e7300d04SMaxime Bizon .name = "96338GW", 89e7300d04SMaxime Bizon .expected_cpu_id = 0x6338, 90e7300d04SMaxime Bizon 91524ef29cSMaxime Bizon .has_uart0 = 1, 92e7300d04SMaxime Bizon .has_enet0 = 1, 93e7300d04SMaxime Bizon .enet0 = { 94e7300d04SMaxime Bizon .force_speed_100 = 1, 95e7300d04SMaxime Bizon .force_duplex_full = 1, 96e7300d04SMaxime Bizon }, 97e7300d04SMaxime Bizon 98e7300d04SMaxime Bizon .has_ohci0 = 1, 99e7300d04SMaxime Bizon 100e7300d04SMaxime Bizon .leds = { 101e7300d04SMaxime Bizon { 102e7300d04SMaxime Bizon .name = "adsl", 103e7300d04SMaxime Bizon .gpio = 3, 104e7300d04SMaxime Bizon .active_low = 1, 105e7300d04SMaxime Bizon }, 106e7300d04SMaxime Bizon { 107e7300d04SMaxime Bizon .name = "ses", 108e7300d04SMaxime Bizon .gpio = 5, 109e7300d04SMaxime Bizon .active_low = 1, 110e7300d04SMaxime Bizon }, 111e7300d04SMaxime Bizon { 112e7300d04SMaxime Bizon .name = "ppp-fail", 113e7300d04SMaxime Bizon .gpio = 4, 114e7300d04SMaxime Bizon .active_low = 1, 115e7300d04SMaxime Bizon }, 116e7300d04SMaxime Bizon { 117e7300d04SMaxime Bizon .name = "power", 118e7300d04SMaxime Bizon .gpio = 0, 119e7300d04SMaxime Bizon .active_low = 1, 120e7300d04SMaxime Bizon .default_trigger = "default-on", 121e7300d04SMaxime Bizon }, 122e7300d04SMaxime Bizon { 123e7300d04SMaxime Bizon .name = "stop", 124e7300d04SMaxime Bizon .gpio = 1, 125e7300d04SMaxime Bizon .active_low = 1, 126e7300d04SMaxime Bizon } 127e7300d04SMaxime Bizon }, 128e7300d04SMaxime Bizon }; 129e7300d04SMaxime Bizon 130e7300d04SMaxime Bizon static struct board_info __initdata board_96338w = { 131e7300d04SMaxime Bizon .name = "96338W", 132e7300d04SMaxime Bizon .expected_cpu_id = 0x6338, 133e7300d04SMaxime Bizon 134524ef29cSMaxime Bizon .has_uart0 = 1, 135e7300d04SMaxime Bizon .has_enet0 = 1, 136e7300d04SMaxime Bizon .enet0 = { 137e7300d04SMaxime Bizon .force_speed_100 = 1, 138e7300d04SMaxime Bizon .force_duplex_full = 1, 139e7300d04SMaxime Bizon }, 140e7300d04SMaxime Bizon 141e7300d04SMaxime Bizon .leds = { 142e7300d04SMaxime Bizon { 143e7300d04SMaxime Bizon .name = "adsl", 144e7300d04SMaxime Bizon .gpio = 3, 145e7300d04SMaxime Bizon .active_low = 1, 146e7300d04SMaxime Bizon }, 147e7300d04SMaxime Bizon { 148e7300d04SMaxime Bizon .name = "ses", 149e7300d04SMaxime Bizon .gpio = 5, 150e7300d04SMaxime Bizon .active_low = 1, 151e7300d04SMaxime Bizon }, 152e7300d04SMaxime Bizon { 153e7300d04SMaxime Bizon .name = "ppp-fail", 154e7300d04SMaxime Bizon .gpio = 4, 155e7300d04SMaxime Bizon .active_low = 1, 156e7300d04SMaxime Bizon }, 157e7300d04SMaxime Bizon { 158e7300d04SMaxime Bizon .name = "power", 159e7300d04SMaxime Bizon .gpio = 0, 160e7300d04SMaxime Bizon .active_low = 1, 161e7300d04SMaxime Bizon .default_trigger = "default-on", 162e7300d04SMaxime Bizon }, 163e7300d04SMaxime Bizon { 164e7300d04SMaxime Bizon .name = "stop", 165e7300d04SMaxime Bizon .gpio = 1, 166e7300d04SMaxime Bizon .active_low = 1, 167e7300d04SMaxime Bizon }, 168e7300d04SMaxime Bizon }, 169e7300d04SMaxime Bizon }; 170e7300d04SMaxime Bizon #endif 171e7300d04SMaxime Bizon 172e7300d04SMaxime Bizon /* 173e7300d04SMaxime Bizon * known 6345 boards 174e7300d04SMaxime Bizon */ 175e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6345 176e7300d04SMaxime Bizon static struct board_info __initdata board_96345gw2 = { 177e7300d04SMaxime Bizon .name = "96345GW2", 178e7300d04SMaxime Bizon .expected_cpu_id = 0x6345, 179524ef29cSMaxime Bizon 180524ef29cSMaxime Bizon .has_uart0 = 1, 181e7300d04SMaxime Bizon }; 182e7300d04SMaxime Bizon #endif 183e7300d04SMaxime Bizon 184e7300d04SMaxime Bizon /* 185e7300d04SMaxime Bizon * known 6348 boards 186e7300d04SMaxime Bizon */ 187e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6348 188e7300d04SMaxime Bizon static struct board_info __initdata board_96348r = { 189e7300d04SMaxime Bizon .name = "96348R", 190e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 191e7300d04SMaxime Bizon 192524ef29cSMaxime Bizon .has_uart0 = 1, 193e7300d04SMaxime Bizon .has_enet0 = 1, 194e7300d04SMaxime Bizon .has_pci = 1, 195e7300d04SMaxime Bizon 196e7300d04SMaxime Bizon .enet0 = { 197e7300d04SMaxime Bizon .has_phy = 1, 198e7300d04SMaxime Bizon .use_internal_phy = 1, 199e7300d04SMaxime Bizon }, 200e7300d04SMaxime Bizon 201e7300d04SMaxime Bizon .leds = { 202e7300d04SMaxime Bizon { 203e7300d04SMaxime Bizon .name = "adsl-fail", 204e7300d04SMaxime Bizon .gpio = 2, 205e7300d04SMaxime Bizon .active_low = 1, 206e7300d04SMaxime Bizon }, 207e7300d04SMaxime Bizon { 208e7300d04SMaxime Bizon .name = "ppp", 209e7300d04SMaxime Bizon .gpio = 3, 210e7300d04SMaxime Bizon .active_low = 1, 211e7300d04SMaxime Bizon }, 212e7300d04SMaxime Bizon { 213e7300d04SMaxime Bizon .name = "ppp-fail", 214e7300d04SMaxime Bizon .gpio = 4, 215e7300d04SMaxime Bizon .active_low = 1, 216e7300d04SMaxime Bizon }, 217e7300d04SMaxime Bizon { 218e7300d04SMaxime Bizon .name = "power", 219e7300d04SMaxime Bizon .gpio = 0, 220e7300d04SMaxime Bizon .active_low = 1, 221e7300d04SMaxime Bizon .default_trigger = "default-on", 222e7300d04SMaxime Bizon 223e7300d04SMaxime Bizon }, 224e7300d04SMaxime Bizon { 225e7300d04SMaxime Bizon .name = "stop", 226e7300d04SMaxime Bizon .gpio = 1, 227e7300d04SMaxime Bizon .active_low = 1, 228e7300d04SMaxime Bizon }, 229e7300d04SMaxime Bizon }, 230e7300d04SMaxime Bizon }; 231e7300d04SMaxime Bizon 232e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw_10 = { 233e7300d04SMaxime Bizon .name = "96348GW-10", 234e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 235e7300d04SMaxime Bizon 236524ef29cSMaxime Bizon .has_uart0 = 1, 237e7300d04SMaxime Bizon .has_enet0 = 1, 238e7300d04SMaxime Bizon .has_enet1 = 1, 239e7300d04SMaxime Bizon .has_pci = 1, 240e7300d04SMaxime Bizon 241e7300d04SMaxime Bizon .enet0 = { 242e7300d04SMaxime Bizon .has_phy = 1, 243e7300d04SMaxime Bizon .use_internal_phy = 1, 244e7300d04SMaxime Bizon }, 245e7300d04SMaxime Bizon .enet1 = { 246e7300d04SMaxime Bizon .force_speed_100 = 1, 247e7300d04SMaxime Bizon .force_duplex_full = 1, 248e7300d04SMaxime Bizon }, 249e7300d04SMaxime Bizon 250e7300d04SMaxime Bizon .has_ohci0 = 1, 251e7300d04SMaxime Bizon .has_pccard = 1, 252e7300d04SMaxime Bizon .has_ehci0 = 1, 253e7300d04SMaxime Bizon 254e7300d04SMaxime Bizon .has_dsp = 1, 255e7300d04SMaxime Bizon .dsp = { 256e7300d04SMaxime Bizon .gpio_rst = 6, 257e7300d04SMaxime Bizon .gpio_int = 34, 258e7300d04SMaxime Bizon .cs = 2, 259e7300d04SMaxime Bizon .ext_irq = 2, 260e7300d04SMaxime Bizon }, 261e7300d04SMaxime Bizon 262e7300d04SMaxime Bizon .leds = { 263e7300d04SMaxime Bizon { 264e7300d04SMaxime Bizon .name = "adsl-fail", 265e7300d04SMaxime Bizon .gpio = 2, 266e7300d04SMaxime Bizon .active_low = 1, 267e7300d04SMaxime Bizon }, 268e7300d04SMaxime Bizon { 269e7300d04SMaxime Bizon .name = "ppp", 270e7300d04SMaxime Bizon .gpio = 3, 271e7300d04SMaxime Bizon .active_low = 1, 272e7300d04SMaxime Bizon }, 273e7300d04SMaxime Bizon { 274e7300d04SMaxime Bizon .name = "ppp-fail", 275e7300d04SMaxime Bizon .gpio = 4, 276e7300d04SMaxime Bizon .active_low = 1, 277e7300d04SMaxime Bizon }, 278e7300d04SMaxime Bizon { 279e7300d04SMaxime Bizon .name = "power", 280e7300d04SMaxime Bizon .gpio = 0, 281e7300d04SMaxime Bizon .active_low = 1, 282e7300d04SMaxime Bizon .default_trigger = "default-on", 283e7300d04SMaxime Bizon }, 284e7300d04SMaxime Bizon { 285e7300d04SMaxime Bizon .name = "stop", 286e7300d04SMaxime Bizon .gpio = 1, 287e7300d04SMaxime Bizon .active_low = 1, 288e7300d04SMaxime Bizon }, 289e7300d04SMaxime Bizon }, 290e7300d04SMaxime Bizon }; 291e7300d04SMaxime Bizon 292e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw_11 = { 293e7300d04SMaxime Bizon .name = "96348GW-11", 294e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 295e7300d04SMaxime Bizon 296524ef29cSMaxime Bizon .has_uart0 = 1, 297e7300d04SMaxime Bizon .has_enet0 = 1, 298e7300d04SMaxime Bizon .has_enet1 = 1, 299e7300d04SMaxime Bizon .has_pci = 1, 300e7300d04SMaxime Bizon 301e7300d04SMaxime Bizon .enet0 = { 302e7300d04SMaxime Bizon .has_phy = 1, 303e7300d04SMaxime Bizon .use_internal_phy = 1, 304e7300d04SMaxime Bizon }, 305e7300d04SMaxime Bizon 306e7300d04SMaxime Bizon .enet1 = { 307e7300d04SMaxime Bizon .force_speed_100 = 1, 308e7300d04SMaxime Bizon .force_duplex_full = 1, 309e7300d04SMaxime Bizon }, 310e7300d04SMaxime Bizon 311e7300d04SMaxime Bizon 312e7300d04SMaxime Bizon .has_ohci0 = 1, 313e7300d04SMaxime Bizon .has_pccard = 1, 314e7300d04SMaxime Bizon .has_ehci0 = 1, 315e7300d04SMaxime Bizon 316e7300d04SMaxime Bizon .leds = { 317e7300d04SMaxime Bizon { 318e7300d04SMaxime Bizon .name = "adsl-fail", 319e7300d04SMaxime Bizon .gpio = 2, 320e7300d04SMaxime Bizon .active_low = 1, 321e7300d04SMaxime Bizon }, 322e7300d04SMaxime Bizon { 323e7300d04SMaxime Bizon .name = "ppp", 324e7300d04SMaxime Bizon .gpio = 3, 325e7300d04SMaxime Bizon .active_low = 1, 326e7300d04SMaxime Bizon }, 327e7300d04SMaxime Bizon { 328e7300d04SMaxime Bizon .name = "ppp-fail", 329e7300d04SMaxime Bizon .gpio = 4, 330e7300d04SMaxime Bizon .active_low = 1, 331e7300d04SMaxime Bizon }, 332e7300d04SMaxime Bizon { 333e7300d04SMaxime Bizon .name = "power", 334e7300d04SMaxime Bizon .gpio = 0, 335e7300d04SMaxime Bizon .active_low = 1, 336e7300d04SMaxime Bizon .default_trigger = "default-on", 337e7300d04SMaxime Bizon }, 338e7300d04SMaxime Bizon { 339e7300d04SMaxime Bizon .name = "stop", 340e7300d04SMaxime Bizon .gpio = 1, 341e7300d04SMaxime Bizon .active_low = 1, 342e7300d04SMaxime Bizon }, 343e7300d04SMaxime Bizon }, 344e7300d04SMaxime Bizon }; 345e7300d04SMaxime Bizon 346e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw = { 347e7300d04SMaxime Bizon .name = "96348GW", 348e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 349e7300d04SMaxime Bizon 350524ef29cSMaxime Bizon .has_uart0 = 1, 351e7300d04SMaxime Bizon .has_enet0 = 1, 352e7300d04SMaxime Bizon .has_enet1 = 1, 353e7300d04SMaxime Bizon .has_pci = 1, 354e7300d04SMaxime Bizon 355e7300d04SMaxime Bizon .enet0 = { 356e7300d04SMaxime Bizon .has_phy = 1, 357e7300d04SMaxime Bizon .use_internal_phy = 1, 358e7300d04SMaxime Bizon }, 359e7300d04SMaxime Bizon .enet1 = { 360e7300d04SMaxime Bizon .force_speed_100 = 1, 361e7300d04SMaxime Bizon .force_duplex_full = 1, 362e7300d04SMaxime Bizon }, 363e7300d04SMaxime Bizon 364e7300d04SMaxime Bizon .has_ohci0 = 1, 365e7300d04SMaxime Bizon 366e7300d04SMaxime Bizon .has_dsp = 1, 367e7300d04SMaxime Bizon .dsp = { 368e7300d04SMaxime Bizon .gpio_rst = 6, 369e7300d04SMaxime Bizon .gpio_int = 34, 370e7300d04SMaxime Bizon .ext_irq = 2, 371e7300d04SMaxime Bizon .cs = 2, 372e7300d04SMaxime Bizon }, 373e7300d04SMaxime Bizon 374e7300d04SMaxime Bizon .leds = { 375e7300d04SMaxime Bizon { 376e7300d04SMaxime Bizon .name = "adsl-fail", 377e7300d04SMaxime Bizon .gpio = 2, 378e7300d04SMaxime Bizon .active_low = 1, 379e7300d04SMaxime Bizon }, 380e7300d04SMaxime Bizon { 381e7300d04SMaxime Bizon .name = "ppp", 382e7300d04SMaxime Bizon .gpio = 3, 383e7300d04SMaxime Bizon .active_low = 1, 384e7300d04SMaxime Bizon }, 385e7300d04SMaxime Bizon { 386e7300d04SMaxime Bizon .name = "ppp-fail", 387e7300d04SMaxime Bizon .gpio = 4, 388e7300d04SMaxime Bizon .active_low = 1, 389e7300d04SMaxime Bizon }, 390e7300d04SMaxime Bizon { 391e7300d04SMaxime Bizon .name = "power", 392e7300d04SMaxime Bizon .gpio = 0, 393e7300d04SMaxime Bizon .active_low = 1, 394e7300d04SMaxime Bizon .default_trigger = "default-on", 395e7300d04SMaxime Bizon }, 396e7300d04SMaxime Bizon { 397e7300d04SMaxime Bizon .name = "stop", 398e7300d04SMaxime Bizon .gpio = 1, 399e7300d04SMaxime Bizon .active_low = 1, 400e7300d04SMaxime Bizon }, 401e7300d04SMaxime Bizon }, 402e7300d04SMaxime Bizon }; 403e7300d04SMaxime Bizon 404e7300d04SMaxime Bizon static struct board_info __initdata board_FAST2404 = { 405e7300d04SMaxime Bizon .name = "F@ST2404", 406e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 407e7300d04SMaxime Bizon 408524ef29cSMaxime Bizon .has_uart0 = 1, 409e7300d04SMaxime Bizon .has_enet0 = 1, 410e7300d04SMaxime Bizon .has_enet1 = 1, 411e7300d04SMaxime Bizon .has_pci = 1, 412e7300d04SMaxime Bizon 413e7300d04SMaxime Bizon .enet0 = { 414e7300d04SMaxime Bizon .has_phy = 1, 415e7300d04SMaxime Bizon .use_internal_phy = 1, 416e7300d04SMaxime Bizon }, 417e7300d04SMaxime Bizon 418e7300d04SMaxime Bizon .enet1 = { 419e7300d04SMaxime Bizon .force_speed_100 = 1, 420e7300d04SMaxime Bizon .force_duplex_full = 1, 421e7300d04SMaxime Bizon }, 422e7300d04SMaxime Bizon 423e7300d04SMaxime Bizon .has_ohci0 = 1, 424e7300d04SMaxime Bizon .has_pccard = 1, 425e7300d04SMaxime Bizon .has_ehci0 = 1, 426e7300d04SMaxime Bizon }; 427e7300d04SMaxime Bizon 4282e6ad9a9SFlorian Fainelli static struct board_info __initdata board_rta1025w_16 = { 4292e6ad9a9SFlorian Fainelli .name = "RTA1025W_16", 4302e6ad9a9SFlorian Fainelli .expected_cpu_id = 0x6348, 4312e6ad9a9SFlorian Fainelli 4322e6ad9a9SFlorian Fainelli .has_enet0 = 1, 4332e6ad9a9SFlorian Fainelli .has_enet1 = 1, 4342e6ad9a9SFlorian Fainelli .has_pci = 1, 4352e6ad9a9SFlorian Fainelli 4362e6ad9a9SFlorian Fainelli .enet0 = { 4372e6ad9a9SFlorian Fainelli .has_phy = 1, 4382e6ad9a9SFlorian Fainelli .use_internal_phy = 1, 4392e6ad9a9SFlorian Fainelli }, 4402e6ad9a9SFlorian Fainelli .enet1 = { 4412e6ad9a9SFlorian Fainelli .force_speed_100 = 1, 4422e6ad9a9SFlorian Fainelli .force_duplex_full = 1, 4432e6ad9a9SFlorian Fainelli }, 4442e6ad9a9SFlorian Fainelli }; 4452e6ad9a9SFlorian Fainelli 4462e6ad9a9SFlorian Fainelli 447e7300d04SMaxime Bizon static struct board_info __initdata board_DV201AMR = { 448e7300d04SMaxime Bizon .name = "DV201AMR", 449e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 450e7300d04SMaxime Bizon 451524ef29cSMaxime Bizon .has_uart0 = 1, 452e7300d04SMaxime Bizon .has_pci = 1, 453e7300d04SMaxime Bizon .has_ohci0 = 1, 454e7300d04SMaxime Bizon 455e7300d04SMaxime Bizon .has_enet0 = 1, 456e7300d04SMaxime Bizon .has_enet1 = 1, 457e7300d04SMaxime Bizon .enet0 = { 458e7300d04SMaxime Bizon .has_phy = 1, 459e7300d04SMaxime Bizon .use_internal_phy = 1, 460e7300d04SMaxime Bizon }, 461e7300d04SMaxime Bizon .enet1 = { 462e7300d04SMaxime Bizon .force_speed_100 = 1, 463e7300d04SMaxime Bizon .force_duplex_full = 1, 464e7300d04SMaxime Bizon }, 465e7300d04SMaxime Bizon }; 466e7300d04SMaxime Bizon 467e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw_a = { 468e7300d04SMaxime Bizon .name = "96348GW-A", 469e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 470e7300d04SMaxime Bizon 471524ef29cSMaxime Bizon .has_uart0 = 1, 472e7300d04SMaxime Bizon .has_enet0 = 1, 473e7300d04SMaxime Bizon .has_enet1 = 1, 474e7300d04SMaxime Bizon .has_pci = 1, 475e7300d04SMaxime Bizon 476e7300d04SMaxime Bizon .enet0 = { 477e7300d04SMaxime Bizon .has_phy = 1, 478e7300d04SMaxime Bizon .use_internal_phy = 1, 479e7300d04SMaxime Bizon }, 480e7300d04SMaxime Bizon .enet1 = { 481e7300d04SMaxime Bizon .force_speed_100 = 1, 482e7300d04SMaxime Bizon .force_duplex_full = 1, 483e7300d04SMaxime Bizon }, 484e7300d04SMaxime Bizon 485e7300d04SMaxime Bizon .has_ohci0 = 1, 486e7300d04SMaxime Bizon }; 487e7300d04SMaxime Bizon #endif 488e7300d04SMaxime Bizon 489e7300d04SMaxime Bizon /* 490e7300d04SMaxime Bizon * known 6358 boards 491e7300d04SMaxime Bizon */ 492e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6358 493e7300d04SMaxime Bizon static struct board_info __initdata board_96358vw = { 494e7300d04SMaxime Bizon .name = "96358VW", 495e7300d04SMaxime Bizon .expected_cpu_id = 0x6358, 496e7300d04SMaxime Bizon 497524ef29cSMaxime Bizon .has_uart0 = 1, 498e7300d04SMaxime Bizon .has_enet0 = 1, 499e7300d04SMaxime Bizon .has_enet1 = 1, 500e7300d04SMaxime Bizon .has_pci = 1, 501e7300d04SMaxime Bizon 502e7300d04SMaxime Bizon .enet0 = { 503e7300d04SMaxime Bizon .has_phy = 1, 504e7300d04SMaxime Bizon .use_internal_phy = 1, 505e7300d04SMaxime Bizon }, 506e7300d04SMaxime Bizon 507e7300d04SMaxime Bizon .enet1 = { 508e7300d04SMaxime Bizon .force_speed_100 = 1, 509e7300d04SMaxime Bizon .force_duplex_full = 1, 510e7300d04SMaxime Bizon }, 511e7300d04SMaxime Bizon 512e7300d04SMaxime Bizon 513e7300d04SMaxime Bizon .has_ohci0 = 1, 514e7300d04SMaxime Bizon .has_pccard = 1, 515e7300d04SMaxime Bizon .has_ehci0 = 1, 516e7300d04SMaxime Bizon 517e7300d04SMaxime Bizon .leds = { 518e7300d04SMaxime Bizon { 519e7300d04SMaxime Bizon .name = "adsl-fail", 520e7300d04SMaxime Bizon .gpio = 15, 521e7300d04SMaxime Bizon .active_low = 1, 522e7300d04SMaxime Bizon }, 523e7300d04SMaxime Bizon { 524e7300d04SMaxime Bizon .name = "ppp", 525e7300d04SMaxime Bizon .gpio = 22, 526e7300d04SMaxime Bizon .active_low = 1, 527e7300d04SMaxime Bizon }, 528e7300d04SMaxime Bizon { 529e7300d04SMaxime Bizon .name = "ppp-fail", 530e7300d04SMaxime Bizon .gpio = 23, 531e7300d04SMaxime Bizon .active_low = 1, 532e7300d04SMaxime Bizon }, 533e7300d04SMaxime Bizon { 534e7300d04SMaxime Bizon .name = "power", 535e7300d04SMaxime Bizon .gpio = 4, 536e7300d04SMaxime Bizon .default_trigger = "default-on", 537e7300d04SMaxime Bizon }, 538e7300d04SMaxime Bizon { 539e7300d04SMaxime Bizon .name = "stop", 540e7300d04SMaxime Bizon .gpio = 5, 541e7300d04SMaxime Bizon }, 542e7300d04SMaxime Bizon }, 543e7300d04SMaxime Bizon }; 544e7300d04SMaxime Bizon 545e7300d04SMaxime Bizon static struct board_info __initdata board_96358vw2 = { 546e7300d04SMaxime Bizon .name = "96358VW2", 547e7300d04SMaxime Bizon .expected_cpu_id = 0x6358, 548e7300d04SMaxime Bizon 549524ef29cSMaxime Bizon .has_uart0 = 1, 550e7300d04SMaxime Bizon .has_enet0 = 1, 551e7300d04SMaxime Bizon .has_enet1 = 1, 552e7300d04SMaxime Bizon .has_pci = 1, 553e7300d04SMaxime Bizon 554e7300d04SMaxime Bizon .enet0 = { 555e7300d04SMaxime Bizon .has_phy = 1, 556e7300d04SMaxime Bizon .use_internal_phy = 1, 557e7300d04SMaxime Bizon }, 558e7300d04SMaxime Bizon 559e7300d04SMaxime Bizon .enet1 = { 560e7300d04SMaxime Bizon .force_speed_100 = 1, 561e7300d04SMaxime Bizon .force_duplex_full = 1, 562e7300d04SMaxime Bizon }, 563e7300d04SMaxime Bizon 564e7300d04SMaxime Bizon 565e7300d04SMaxime Bizon .has_ohci0 = 1, 566e7300d04SMaxime Bizon .has_pccard = 1, 567e7300d04SMaxime Bizon .has_ehci0 = 1, 568e7300d04SMaxime Bizon 569e7300d04SMaxime Bizon .leds = { 570e7300d04SMaxime Bizon { 571e7300d04SMaxime Bizon .name = "adsl", 572e7300d04SMaxime Bizon .gpio = 22, 573e7300d04SMaxime Bizon .active_low = 1, 574e7300d04SMaxime Bizon }, 575e7300d04SMaxime Bizon { 576e7300d04SMaxime Bizon .name = "ppp-fail", 577e7300d04SMaxime Bizon .gpio = 23, 578e7300d04SMaxime Bizon }, 579e7300d04SMaxime Bizon { 580e7300d04SMaxime Bizon .name = "power", 581e7300d04SMaxime Bizon .gpio = 5, 582e7300d04SMaxime Bizon .active_low = 1, 583e7300d04SMaxime Bizon .default_trigger = "default-on", 584e7300d04SMaxime Bizon }, 585e7300d04SMaxime Bizon { 586e7300d04SMaxime Bizon .name = "stop", 587e7300d04SMaxime Bizon .gpio = 4, 588e7300d04SMaxime Bizon .active_low = 1, 589e7300d04SMaxime Bizon }, 590e7300d04SMaxime Bizon }, 591e7300d04SMaxime Bizon }; 592e7300d04SMaxime Bizon 593e7300d04SMaxime Bizon static struct board_info __initdata board_AGPFS0 = { 594e7300d04SMaxime Bizon .name = "AGPF-S0", 595e7300d04SMaxime Bizon .expected_cpu_id = 0x6358, 596e7300d04SMaxime Bizon 597524ef29cSMaxime Bizon .has_uart0 = 1, 598e7300d04SMaxime Bizon .has_enet0 = 1, 599e7300d04SMaxime Bizon .has_enet1 = 1, 600e7300d04SMaxime Bizon .has_pci = 1, 601e7300d04SMaxime Bizon 602e7300d04SMaxime Bizon .enet0 = { 603e7300d04SMaxime Bizon .has_phy = 1, 604e7300d04SMaxime Bizon .use_internal_phy = 1, 605e7300d04SMaxime Bizon }, 606e7300d04SMaxime Bizon 607e7300d04SMaxime Bizon .enet1 = { 608e7300d04SMaxime Bizon .force_speed_100 = 1, 609e7300d04SMaxime Bizon .force_duplex_full = 1, 610e7300d04SMaxime Bizon }, 611e7300d04SMaxime Bizon 612e7300d04SMaxime Bizon .has_ohci0 = 1, 613e7300d04SMaxime Bizon .has_ehci0 = 1, 614e7300d04SMaxime Bizon }; 615f29b7cacSFlorian Fainelli 616f29b7cacSFlorian Fainelli static struct board_info __initdata board_DWVS0 = { 617f29b7cacSFlorian Fainelli .name = "DWV-S0", 618f29b7cacSFlorian Fainelli .expected_cpu_id = 0x6358, 619f29b7cacSFlorian Fainelli 620f29b7cacSFlorian Fainelli .has_enet0 = 1, 621f29b7cacSFlorian Fainelli .has_enet1 = 1, 622f29b7cacSFlorian Fainelli .has_pci = 1, 623f29b7cacSFlorian Fainelli 624f29b7cacSFlorian Fainelli .enet0 = { 625f29b7cacSFlorian Fainelli .has_phy = 1, 626f29b7cacSFlorian Fainelli .use_internal_phy = 1, 627f29b7cacSFlorian Fainelli }, 628f29b7cacSFlorian Fainelli 629f29b7cacSFlorian Fainelli .enet1 = { 630f29b7cacSFlorian Fainelli .force_speed_100 = 1, 631f29b7cacSFlorian Fainelli .force_duplex_full = 1, 632f29b7cacSFlorian Fainelli }, 633f29b7cacSFlorian Fainelli 634f29b7cacSFlorian Fainelli .has_ohci0 = 1, 635f29b7cacSFlorian Fainelli }; 636e7300d04SMaxime Bizon #endif 637e7300d04SMaxime Bizon 638e7300d04SMaxime Bizon /* 639e7300d04SMaxime Bizon * all boards 640e7300d04SMaxime Bizon */ 6413cf5ae6eSAndi Kleen static const struct board_info __initconst *bcm963xx_boards[] = { 6422f74b770SJonas Gorski #ifdef CONFIG_BCM63XX_CPU_6328 6432f74b770SJonas Gorski &board_96328avng, 6442f74b770SJonas Gorski #endif 645e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6338 646e7300d04SMaxime Bizon &board_96338gw, 647e7300d04SMaxime Bizon &board_96338w, 648e7300d04SMaxime Bizon #endif 649e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6345 650e7300d04SMaxime Bizon &board_96345gw2, 651e7300d04SMaxime Bizon #endif 652e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6348 653e7300d04SMaxime Bizon &board_96348r, 654e7300d04SMaxime Bizon &board_96348gw, 655e7300d04SMaxime Bizon &board_96348gw_10, 656e7300d04SMaxime Bizon &board_96348gw_11, 657e7300d04SMaxime Bizon &board_FAST2404, 658e7300d04SMaxime Bizon &board_DV201AMR, 659e7300d04SMaxime Bizon &board_96348gw_a, 6602e6ad9a9SFlorian Fainelli &board_rta1025w_16, 661e7300d04SMaxime Bizon #endif 662e7300d04SMaxime Bizon 663e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6358 664e7300d04SMaxime Bizon &board_96358vw, 665e7300d04SMaxime Bizon &board_96358vw2, 666e7300d04SMaxime Bizon &board_AGPFS0, 667f29b7cacSFlorian Fainelli &board_DWVS0, 668e7300d04SMaxime Bizon #endif 669e7300d04SMaxime Bizon }; 670e7300d04SMaxime Bizon 671e7300d04SMaxime Bizon /* 6725e3644a9SFlorian Fainelli * Register a sane SPROMv2 to make the on-board 6735e3644a9SFlorian Fainelli * bcm4318 WLAN work 6745e3644a9SFlorian Fainelli */ 6755e3644a9SFlorian Fainelli #ifdef CONFIG_SSB_PCIHOST 6765e3644a9SFlorian Fainelli static struct ssb_sprom bcm63xx_sprom = { 6775e3644a9SFlorian Fainelli .revision = 0x02, 6785e3644a9SFlorian Fainelli .board_rev = 0x17, 6795e3644a9SFlorian Fainelli .country_code = 0x0, 6805e3644a9SFlorian Fainelli .ant_available_bg = 0x3, 6815e3644a9SFlorian Fainelli .pa0b0 = 0x15ae, 6825e3644a9SFlorian Fainelli .pa0b1 = 0xfa85, 6835e3644a9SFlorian Fainelli .pa0b2 = 0xfe8d, 6845e3644a9SFlorian Fainelli .pa1b0 = 0xffff, 6855e3644a9SFlorian Fainelli .pa1b1 = 0xffff, 6865e3644a9SFlorian Fainelli .pa1b2 = 0xffff, 6875e3644a9SFlorian Fainelli .gpio0 = 0xff, 6885e3644a9SFlorian Fainelli .gpio1 = 0xff, 6895e3644a9SFlorian Fainelli .gpio2 = 0xff, 6905e3644a9SFlorian Fainelli .gpio3 = 0xff, 6915e3644a9SFlorian Fainelli .maxpwr_bg = 0x004c, 6925e3644a9SFlorian Fainelli .itssi_bg = 0x00, 6935e3644a9SFlorian Fainelli .boardflags_lo = 0x2848, 6945e3644a9SFlorian Fainelli .boardflags_hi = 0x0000, 6955e3644a9SFlorian Fainelli }; 696b3ae52b6SHauke Mehrtens 697b3ae52b6SHauke Mehrtens int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) 698b3ae52b6SHauke Mehrtens { 699b3ae52b6SHauke Mehrtens if (bus->bustype == SSB_BUSTYPE_PCI) { 700b3ae52b6SHauke Mehrtens memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); 701b3ae52b6SHauke Mehrtens return 0; 702b3ae52b6SHauke Mehrtens } else { 703b3ae52b6SHauke Mehrtens printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); 704b3ae52b6SHauke Mehrtens return -EINVAL; 705b3ae52b6SHauke Mehrtens } 706b3ae52b6SHauke Mehrtens } 7075e3644a9SFlorian Fainelli #endif 7085e3644a9SFlorian Fainelli 7095e3644a9SFlorian Fainelli /* 7105e3644a9SFlorian Fainelli * return board name for /proc/cpuinfo 7115e3644a9SFlorian Fainelli */ 7125e3644a9SFlorian Fainelli const char *board_get_name(void) 7135e3644a9SFlorian Fainelli { 7145e3644a9SFlorian Fainelli return board.name; 7155e3644a9SFlorian Fainelli } 7165e3644a9SFlorian Fainelli 7175e3644a9SFlorian Fainelli /* 718e7300d04SMaxime Bizon * early init callback, read nvram data from flash and checksum it 719e7300d04SMaxime Bizon */ 720e7300d04SMaxime Bizon void __init board_prom_init(void) 721e7300d04SMaxime Bizon { 722e7e333cbSJonas Gorski unsigned int i; 723e7e333cbSJonas Gorski u8 *boot_addr, *cfe; 724e7300d04SMaxime Bizon char cfe_version[32]; 725e7e333cbSJonas Gorski char *board_name; 726e7300d04SMaxime Bizon u32 val; 727e7300d04SMaxime Bizon 728e5766aeaSJonas Gorski /* read base address of boot chip select (0) 7292c8aaf71SJonas Gorski * 6328/6362 do not have MPI but boot from a fixed address 730e5766aeaSJonas Gorski */ 7312c8aaf71SJonas Gorski if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { 732e5766aeaSJonas Gorski val = 0x18000000; 7332c8aaf71SJonas Gorski } else { 734e7300d04SMaxime Bizon val = bcm_mpi_readl(MPI_CSBASE_REG(0)); 735e7300d04SMaxime Bizon val &= MPI_CSBASE_BASE_MASK; 736e5766aeaSJonas Gorski } 737e7300d04SMaxime Bizon boot_addr = (u8 *)KSEG1ADDR(val); 738e7300d04SMaxime Bizon 739e7300d04SMaxime Bizon /* dump cfe version */ 740e7300d04SMaxime Bizon cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; 741e7300d04SMaxime Bizon if (!memcmp(cfe, "cfe-v", 5)) 742e7300d04SMaxime Bizon snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u", 743e7300d04SMaxime Bizon cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]); 744e7300d04SMaxime Bizon else 745e7300d04SMaxime Bizon strcpy(cfe_version, "unknown"); 746e7300d04SMaxime Bizon printk(KERN_INFO PFX "CFE version: %s\n", cfe_version); 747e7300d04SMaxime Bizon 74897367519SJonas Gorski bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET); 749e7300d04SMaxime Bizon 750e7e333cbSJonas Gorski board_name = bcm63xx_nvram_get_name(); 751e7300d04SMaxime Bizon /* find board by name */ 752e7300d04SMaxime Bizon for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) { 753e7e333cbSJonas Gorski if (strncmp(board_name, bcm963xx_boards[i]->name, 16)) 754e7300d04SMaxime Bizon continue; 755e7300d04SMaxime Bizon /* copy, board desc array is marked initdata */ 756e7300d04SMaxime Bizon memcpy(&board, bcm963xx_boards[i], sizeof(board)); 757e7300d04SMaxime Bizon break; 758e7300d04SMaxime Bizon } 759e7300d04SMaxime Bizon 760e7300d04SMaxime Bizon /* bail out if board is not found, will complain later */ 761e7300d04SMaxime Bizon if (!board.name[0]) { 762e7300d04SMaxime Bizon char name[17]; 763e7e333cbSJonas Gorski memcpy(name, board_name, 16); 764e7300d04SMaxime Bizon name[16] = 0; 765e7300d04SMaxime Bizon printk(KERN_ERR PFX "unknown bcm963xx board: %s\n", 766e7300d04SMaxime Bizon name); 767e7300d04SMaxime Bizon return; 768e7300d04SMaxime Bizon } 769e7300d04SMaxime Bizon 770e7300d04SMaxime Bizon /* setup pin multiplexing depending on board enabled device, 771e7300d04SMaxime Bizon * this has to be done this early since PCI init is done 772e7300d04SMaxime Bizon * inside arch_initcall */ 773e7300d04SMaxime Bizon val = 0; 774e7300d04SMaxime Bizon 775e7300d04SMaxime Bizon #ifdef CONFIG_PCI 776e7300d04SMaxime Bizon if (board.has_pci) { 777e7300d04SMaxime Bizon bcm63xx_pci_enabled = 1; 778e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 779e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G2_PCI; 780e7300d04SMaxime Bizon } 781e7300d04SMaxime Bizon #endif 782e7300d04SMaxime Bizon 783e7300d04SMaxime Bizon if (board.has_pccard) { 784e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 785e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G1_MII_PCCARD; 786e7300d04SMaxime Bizon } 787e7300d04SMaxime Bizon 788e7300d04SMaxime Bizon if (board.has_enet0 && !board.enet0.use_internal_phy) { 789e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 790e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G3_EXT_MII | 791e7300d04SMaxime Bizon GPIO_MODE_6348_G0_EXT_MII; 792e7300d04SMaxime Bizon } 793e7300d04SMaxime Bizon 794e7300d04SMaxime Bizon if (board.has_enet1 && !board.enet1.use_internal_phy) { 795e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 796e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G3_EXT_MII | 797e7300d04SMaxime Bizon GPIO_MODE_6348_G0_EXT_MII; 798e7300d04SMaxime Bizon } 799e7300d04SMaxime Bizon 800e7300d04SMaxime Bizon bcm_gpio_writel(val, GPIO_MODE_REG); 801e7300d04SMaxime Bizon } 802e7300d04SMaxime Bizon 803e7300d04SMaxime Bizon /* 804e7300d04SMaxime Bizon * second stage init callback, good time to panic if we couldn't 805e7300d04SMaxime Bizon * identify on which board we're running since early printk is working 806e7300d04SMaxime Bizon */ 807e7300d04SMaxime Bizon void __init board_setup(void) 808e7300d04SMaxime Bizon { 809e7300d04SMaxime Bizon if (!board.name[0]) 810e7300d04SMaxime Bizon panic("unable to detect bcm963xx board"); 811e7300d04SMaxime Bizon printk(KERN_INFO PFX "board name: %s\n", board.name); 812e7300d04SMaxime Bizon 813e7300d04SMaxime Bizon /* make sure we're running on expected cpu */ 814e7300d04SMaxime Bizon if (bcm63xx_get_cpu_id() != board.expected_cpu_id) 815e7300d04SMaxime Bizon panic("unexpected CPU for bcm963xx board"); 816e7300d04SMaxime Bizon } 817e7300d04SMaxime Bizon 818e7300d04SMaxime Bizon static struct gpio_led_platform_data bcm63xx_led_data; 819e7300d04SMaxime Bizon 820e7300d04SMaxime Bizon static struct platform_device bcm63xx_gpio_leds = { 821e7300d04SMaxime Bizon .name = "leds-gpio", 822e7300d04SMaxime Bizon .id = 0, 823e7300d04SMaxime Bizon .dev.platform_data = &bcm63xx_led_data, 824e7300d04SMaxime Bizon }; 825e7300d04SMaxime Bizon 826e7300d04SMaxime Bizon /* 827e7300d04SMaxime Bizon * third stage init callback, register all board devices. 828e7300d04SMaxime Bizon */ 829e7300d04SMaxime Bizon int __init board_register_devices(void) 830e7300d04SMaxime Bizon { 831524ef29cSMaxime Bizon if (board.has_uart0) 832524ef29cSMaxime Bizon bcm63xx_uart_register(0); 833524ef29cSMaxime Bizon 834524ef29cSMaxime Bizon if (board.has_uart1) 835524ef29cSMaxime Bizon bcm63xx_uart_register(1); 836524ef29cSMaxime Bizon 837553d6d5fSMaxime Bizon if (board.has_pccard) 838553d6d5fSMaxime Bizon bcm63xx_pcmcia_register(); 839553d6d5fSMaxime Bizon 840e7300d04SMaxime Bizon if (board.has_enet0 && 841e7e333cbSJonas Gorski !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr)) 842e7300d04SMaxime Bizon bcm63xx_enet_register(0, &board.enet0); 843e7300d04SMaxime Bizon 844e7300d04SMaxime Bizon if (board.has_enet1 && 845e7e333cbSJonas Gorski !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) 846e7300d04SMaxime Bizon bcm63xx_enet_register(1, &board.enet1); 847e7300d04SMaxime Bizon 8486f00a022SMaxime Bizon if (board.has_enetsw && 8496f00a022SMaxime Bizon !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr)) 8506f00a022SMaxime Bizon bcm63xx_enetsw_register(&board.enetsw); 8516f00a022SMaxime Bizon 85222df90f6SKevin Cernekee if (board.has_usbd) 85322df90f6SKevin Cernekee bcm63xx_usbd_register(&board.usbd); 85422df90f6SKevin Cernekee 855e7300d04SMaxime Bizon if (board.has_dsp) 856e7300d04SMaxime Bizon bcm63xx_dsp_register(&board.dsp); 857e7300d04SMaxime Bizon 858b15a6d62SFlorian Fainelli /* Generate MAC address for WLAN and register our SPROM, 859b15a6d62SFlorian Fainelli * do this after registering enet devices 860b15a6d62SFlorian Fainelli */ 861b15a6d62SFlorian Fainelli #ifdef CONFIG_SSB_PCIHOST 862e7e333cbSJonas Gorski if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) { 863b15a6d62SFlorian Fainelli memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); 864b15a6d62SFlorian Fainelli memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); 865b15a6d62SFlorian Fainelli if (ssb_arch_register_fallback_sprom( 866b15a6d62SFlorian Fainelli &bcm63xx_get_fallback_sprom) < 0) 867b15a6d62SFlorian Fainelli pr_err(PFX "failed to register fallback SPROM\n"); 868b15a6d62SFlorian Fainelli } 869b15a6d62SFlorian Fainelli #endif 870b15a6d62SFlorian Fainelli 87176ca4e14SFlorian Fainelli bcm63xx_spi_register(); 87276ca4e14SFlorian Fainelli 8734b897d54SJonas Gorski bcm63xx_flash_register(); 874e7300d04SMaxime Bizon 875e7300d04SMaxime Bizon bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); 876e7300d04SMaxime Bizon bcm63xx_led_data.leds = board.leds; 877e7300d04SMaxime Bizon 878e7300d04SMaxime Bizon platform_device_register(&bcm63xx_gpio_leds); 879e7300d04SMaxime Bizon 880e7300d04SMaxime Bizon return 0; 881e7300d04SMaxime Bizon } 882