1e7300d04SMaxime Bizon /* 2e7300d04SMaxime Bizon * This file is subject to the terms and conditions of the GNU General Public 3e7300d04SMaxime Bizon * License. See the file "COPYING" in the main directory of this archive 4e7300d04SMaxime Bizon * for more details. 5e7300d04SMaxime Bizon * 6e7300d04SMaxime Bizon * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> 7e7300d04SMaxime Bizon * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org> 8e7300d04SMaxime Bizon */ 9e7300d04SMaxime Bizon 10e7300d04SMaxime Bizon #include <linux/init.h> 11e7300d04SMaxime Bizon #include <linux/kernel.h> 12e7300d04SMaxime Bizon #include <linux/string.h> 13e7300d04SMaxime Bizon #include <linux/platform_device.h> 14e7300d04SMaxime Bizon #include <linux/ssb/ssb.h> 15e7300d04SMaxime Bizon #include <asm/addrspace.h> 16e7300d04SMaxime Bizon #include <bcm63xx_board.h> 17e7300d04SMaxime Bizon #include <bcm63xx_cpu.h> 18524ef29cSMaxime Bizon #include <bcm63xx_dev_uart.h> 19e7300d04SMaxime Bizon #include <bcm63xx_regs.h> 20e7300d04SMaxime Bizon #include <bcm63xx_io.h> 21e7e333cbSJonas Gorski #include <bcm63xx_nvram.h> 22e7300d04SMaxime Bizon #include <bcm63xx_dev_pci.h> 23e7300d04SMaxime Bizon #include <bcm63xx_dev_enet.h> 24e7300d04SMaxime Bizon #include <bcm63xx_dev_dsp.h> 254b897d54SJonas Gorski #include <bcm63xx_dev_flash.h> 26553d6d5fSMaxime Bizon #include <bcm63xx_dev_pcmcia.h> 2776ca4e14SFlorian Fainelli #include <bcm63xx_dev_spi.h> 2822df90f6SKevin Cernekee #include <bcm63xx_dev_usb_usbd.h> 29e7300d04SMaxime Bizon #include <board_bcm963xx.h> 30e7300d04SMaxime Bizon 31d753601aSFlorian Fainelli #include <uapi/linux/bcm933xx_hcs.h> 32d753601aSFlorian Fainelli 33e7300d04SMaxime Bizon #define PFX "board_bcm963xx: " 34e7300d04SMaxime Bizon 35d753601aSFlorian Fainelli #define HCS_OFFSET_128K 0x20000 36d753601aSFlorian Fainelli 37e7300d04SMaxime Bizon static struct board_info board; 38e7300d04SMaxime Bizon 39e7300d04SMaxime Bizon /* 40450acb0bSFlorian Fainelli * known 3368 boards 41450acb0bSFlorian Fainelli */ 42450acb0bSFlorian Fainelli #ifdef CONFIG_BCM63XX_CPU_3368 43450acb0bSFlorian Fainelli static struct board_info __initdata board_cvg834g = { 44450acb0bSFlorian Fainelli .name = "CVG834G_E15R3921", 45450acb0bSFlorian Fainelli .expected_cpu_id = 0x3368, 46450acb0bSFlorian Fainelli 47450acb0bSFlorian Fainelli .has_uart0 = 1, 48450acb0bSFlorian Fainelli .has_uart1 = 1, 49450acb0bSFlorian Fainelli 50450acb0bSFlorian Fainelli .has_enet0 = 1, 51450acb0bSFlorian Fainelli .has_pci = 1, 52450acb0bSFlorian Fainelli 53450acb0bSFlorian Fainelli .enet0 = { 54450acb0bSFlorian Fainelli .has_phy = 1, 55450acb0bSFlorian Fainelli .use_internal_phy = 1, 56450acb0bSFlorian Fainelli }, 57450acb0bSFlorian Fainelli 58450acb0bSFlorian Fainelli .leds = { 59450acb0bSFlorian Fainelli { 60450acb0bSFlorian Fainelli .name = "CVG834G:green:power", 61450acb0bSFlorian Fainelli .gpio = 37, 62450acb0bSFlorian Fainelli .default_trigger= "default-on", 63450acb0bSFlorian Fainelli }, 64450acb0bSFlorian Fainelli }, 65450acb0bSFlorian Fainelli 66450acb0bSFlorian Fainelli .ephy_reset_gpio = 36, 67450acb0bSFlorian Fainelli .ephy_reset_gpio_flags = GPIOF_INIT_HIGH, 68450acb0bSFlorian Fainelli }; 69450acb0bSFlorian Fainelli #endif 70450acb0bSFlorian Fainelli 71450acb0bSFlorian Fainelli /* 722f74b770SJonas Gorski * known 6328 boards 732f74b770SJonas Gorski */ 742f74b770SJonas Gorski #ifdef CONFIG_BCM63XX_CPU_6328 752f74b770SJonas Gorski static struct board_info __initdata board_96328avng = { 762f74b770SJonas Gorski .name = "96328avng", 772f74b770SJonas Gorski .expected_cpu_id = 0x6328, 782f74b770SJonas Gorski 792f74b770SJonas Gorski .has_uart0 = 1, 802f74b770SJonas Gorski .has_pci = 1, 8122df90f6SKevin Cernekee .has_usbd = 0, 8222df90f6SKevin Cernekee 8322df90f6SKevin Cernekee .usbd = { 8422df90f6SKevin Cernekee .use_fullspeed = 0, 8522df90f6SKevin Cernekee .port_no = 0, 8622df90f6SKevin Cernekee }, 872f74b770SJonas Gorski 882f74b770SJonas Gorski .leds = { 892f74b770SJonas Gorski { 902f74b770SJonas Gorski .name = "96328avng::ppp-fail", 912f74b770SJonas Gorski .gpio = 2, 922f74b770SJonas Gorski .active_low = 1, 932f74b770SJonas Gorski }, 942f74b770SJonas Gorski { 952f74b770SJonas Gorski .name = "96328avng::power", 962f74b770SJonas Gorski .gpio = 4, 972f74b770SJonas Gorski .active_low = 1, 982f74b770SJonas Gorski .default_trigger = "default-on", 992f74b770SJonas Gorski }, 1002f74b770SJonas Gorski { 1012f74b770SJonas Gorski .name = "96328avng::power-fail", 1022f74b770SJonas Gorski .gpio = 8, 1032f74b770SJonas Gorski .active_low = 1, 1042f74b770SJonas Gorski }, 1052f74b770SJonas Gorski { 1062f74b770SJonas Gorski .name = "96328avng::wps", 1072f74b770SJonas Gorski .gpio = 9, 1082f74b770SJonas Gorski .active_low = 1, 1092f74b770SJonas Gorski }, 1102f74b770SJonas Gorski { 1112f74b770SJonas Gorski .name = "96328avng::ppp", 1122f74b770SJonas Gorski .gpio = 11, 1132f74b770SJonas Gorski .active_low = 1, 1142f74b770SJonas Gorski }, 1152f74b770SJonas Gorski }, 1162f74b770SJonas Gorski }; 1172f74b770SJonas Gorski #endif 1182f74b770SJonas Gorski 1192f74b770SJonas Gorski /* 120e7300d04SMaxime Bizon * known 6338 boards 121e7300d04SMaxime Bizon */ 122e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6338 123e7300d04SMaxime Bizon static struct board_info __initdata board_96338gw = { 124e7300d04SMaxime Bizon .name = "96338GW", 125e7300d04SMaxime Bizon .expected_cpu_id = 0x6338, 126e7300d04SMaxime Bizon 127524ef29cSMaxime Bizon .has_uart0 = 1, 128e7300d04SMaxime Bizon .has_enet0 = 1, 129e7300d04SMaxime Bizon .enet0 = { 130e7300d04SMaxime Bizon .force_speed_100 = 1, 131e7300d04SMaxime Bizon .force_duplex_full = 1, 132e7300d04SMaxime Bizon }, 133e7300d04SMaxime Bizon 134e7300d04SMaxime Bizon .has_ohci0 = 1, 135e7300d04SMaxime Bizon 136e7300d04SMaxime Bizon .leds = { 137e7300d04SMaxime Bizon { 138e7300d04SMaxime Bizon .name = "adsl", 139e7300d04SMaxime Bizon .gpio = 3, 140e7300d04SMaxime Bizon .active_low = 1, 141e7300d04SMaxime Bizon }, 142e7300d04SMaxime Bizon { 143e7300d04SMaxime Bizon .name = "ses", 144e7300d04SMaxime Bizon .gpio = 5, 145e7300d04SMaxime Bizon .active_low = 1, 146e7300d04SMaxime Bizon }, 147e7300d04SMaxime Bizon { 148e7300d04SMaxime Bizon .name = "ppp-fail", 149e7300d04SMaxime Bizon .gpio = 4, 150e7300d04SMaxime Bizon .active_low = 1, 151e7300d04SMaxime Bizon }, 152e7300d04SMaxime Bizon { 153e7300d04SMaxime Bizon .name = "power", 154e7300d04SMaxime Bizon .gpio = 0, 155e7300d04SMaxime Bizon .active_low = 1, 156e7300d04SMaxime Bizon .default_trigger = "default-on", 157e7300d04SMaxime Bizon }, 158e7300d04SMaxime Bizon { 159e7300d04SMaxime Bizon .name = "stop", 160e7300d04SMaxime Bizon .gpio = 1, 161e7300d04SMaxime Bizon .active_low = 1, 162e7300d04SMaxime Bizon } 163e7300d04SMaxime Bizon }, 164e7300d04SMaxime Bizon }; 165e7300d04SMaxime Bizon 166e7300d04SMaxime Bizon static struct board_info __initdata board_96338w = { 167e7300d04SMaxime Bizon .name = "96338W", 168e7300d04SMaxime Bizon .expected_cpu_id = 0x6338, 169e7300d04SMaxime Bizon 170524ef29cSMaxime Bizon .has_uart0 = 1, 171e7300d04SMaxime Bizon .has_enet0 = 1, 172e7300d04SMaxime Bizon .enet0 = { 173e7300d04SMaxime Bizon .force_speed_100 = 1, 174e7300d04SMaxime Bizon .force_duplex_full = 1, 175e7300d04SMaxime Bizon }, 176e7300d04SMaxime Bizon 177e7300d04SMaxime Bizon .leds = { 178e7300d04SMaxime Bizon { 179e7300d04SMaxime Bizon .name = "adsl", 180e7300d04SMaxime Bizon .gpio = 3, 181e7300d04SMaxime Bizon .active_low = 1, 182e7300d04SMaxime Bizon }, 183e7300d04SMaxime Bizon { 184e7300d04SMaxime Bizon .name = "ses", 185e7300d04SMaxime Bizon .gpio = 5, 186e7300d04SMaxime Bizon .active_low = 1, 187e7300d04SMaxime Bizon }, 188e7300d04SMaxime Bizon { 189e7300d04SMaxime Bizon .name = "ppp-fail", 190e7300d04SMaxime Bizon .gpio = 4, 191e7300d04SMaxime Bizon .active_low = 1, 192e7300d04SMaxime Bizon }, 193e7300d04SMaxime Bizon { 194e7300d04SMaxime Bizon .name = "power", 195e7300d04SMaxime Bizon .gpio = 0, 196e7300d04SMaxime Bizon .active_low = 1, 197e7300d04SMaxime Bizon .default_trigger = "default-on", 198e7300d04SMaxime Bizon }, 199e7300d04SMaxime Bizon { 200e7300d04SMaxime Bizon .name = "stop", 201e7300d04SMaxime Bizon .gpio = 1, 202e7300d04SMaxime Bizon .active_low = 1, 203e7300d04SMaxime Bizon }, 204e7300d04SMaxime Bizon }, 205e7300d04SMaxime Bizon }; 206e7300d04SMaxime Bizon #endif 207e7300d04SMaxime Bizon 208e7300d04SMaxime Bizon /* 209e7300d04SMaxime Bizon * known 6345 boards 210e7300d04SMaxime Bizon */ 211e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6345 212e7300d04SMaxime Bizon static struct board_info __initdata board_96345gw2 = { 213e7300d04SMaxime Bizon .name = "96345GW2", 214e7300d04SMaxime Bizon .expected_cpu_id = 0x6345, 215524ef29cSMaxime Bizon 216524ef29cSMaxime Bizon .has_uart0 = 1, 217e7300d04SMaxime Bizon }; 218e7300d04SMaxime Bizon #endif 219e7300d04SMaxime Bizon 220e7300d04SMaxime Bizon /* 221e7300d04SMaxime Bizon * known 6348 boards 222e7300d04SMaxime Bizon */ 223e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6348 224e7300d04SMaxime Bizon static struct board_info __initdata board_96348r = { 225e7300d04SMaxime Bizon .name = "96348R", 226e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 227e7300d04SMaxime Bizon 228524ef29cSMaxime Bizon .has_uart0 = 1, 229e7300d04SMaxime Bizon .has_enet0 = 1, 230e7300d04SMaxime Bizon .has_pci = 1, 231e7300d04SMaxime Bizon 232e7300d04SMaxime Bizon .enet0 = { 233e7300d04SMaxime Bizon .has_phy = 1, 234e7300d04SMaxime Bizon .use_internal_phy = 1, 235e7300d04SMaxime Bizon }, 236e7300d04SMaxime Bizon 237e7300d04SMaxime Bizon .leds = { 238e7300d04SMaxime Bizon { 239e7300d04SMaxime Bizon .name = "adsl-fail", 240e7300d04SMaxime Bizon .gpio = 2, 241e7300d04SMaxime Bizon .active_low = 1, 242e7300d04SMaxime Bizon }, 243e7300d04SMaxime Bizon { 244e7300d04SMaxime Bizon .name = "ppp", 245e7300d04SMaxime Bizon .gpio = 3, 246e7300d04SMaxime Bizon .active_low = 1, 247e7300d04SMaxime Bizon }, 248e7300d04SMaxime Bizon { 249e7300d04SMaxime Bizon .name = "ppp-fail", 250e7300d04SMaxime Bizon .gpio = 4, 251e7300d04SMaxime Bizon .active_low = 1, 252e7300d04SMaxime Bizon }, 253e7300d04SMaxime Bizon { 254e7300d04SMaxime Bizon .name = "power", 255e7300d04SMaxime Bizon .gpio = 0, 256e7300d04SMaxime Bizon .active_low = 1, 257e7300d04SMaxime Bizon .default_trigger = "default-on", 258e7300d04SMaxime Bizon 259e7300d04SMaxime Bizon }, 260e7300d04SMaxime Bizon { 261e7300d04SMaxime Bizon .name = "stop", 262e7300d04SMaxime Bizon .gpio = 1, 263e7300d04SMaxime Bizon .active_low = 1, 264e7300d04SMaxime Bizon }, 265e7300d04SMaxime Bizon }, 266e7300d04SMaxime Bizon }; 267e7300d04SMaxime Bizon 268e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw_10 = { 269e7300d04SMaxime Bizon .name = "96348GW-10", 270e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 271e7300d04SMaxime Bizon 272524ef29cSMaxime Bizon .has_uart0 = 1, 273e7300d04SMaxime Bizon .has_enet0 = 1, 274e7300d04SMaxime Bizon .has_enet1 = 1, 275e7300d04SMaxime Bizon .has_pci = 1, 276e7300d04SMaxime Bizon 277e7300d04SMaxime Bizon .enet0 = { 278e7300d04SMaxime Bizon .has_phy = 1, 279e7300d04SMaxime Bizon .use_internal_phy = 1, 280e7300d04SMaxime Bizon }, 281e7300d04SMaxime Bizon .enet1 = { 282e7300d04SMaxime Bizon .force_speed_100 = 1, 283e7300d04SMaxime Bizon .force_duplex_full = 1, 284e7300d04SMaxime Bizon }, 285e7300d04SMaxime Bizon 286e7300d04SMaxime Bizon .has_ohci0 = 1, 287e7300d04SMaxime Bizon .has_pccard = 1, 288e7300d04SMaxime Bizon .has_ehci0 = 1, 289e7300d04SMaxime Bizon 290e7300d04SMaxime Bizon .has_dsp = 1, 291e7300d04SMaxime Bizon .dsp = { 292e7300d04SMaxime Bizon .gpio_rst = 6, 293e7300d04SMaxime Bizon .gpio_int = 34, 294e7300d04SMaxime Bizon .cs = 2, 295e7300d04SMaxime Bizon .ext_irq = 2, 296e7300d04SMaxime Bizon }, 297e7300d04SMaxime Bizon 298e7300d04SMaxime Bizon .leds = { 299e7300d04SMaxime Bizon { 300e7300d04SMaxime Bizon .name = "adsl-fail", 301e7300d04SMaxime Bizon .gpio = 2, 302e7300d04SMaxime Bizon .active_low = 1, 303e7300d04SMaxime Bizon }, 304e7300d04SMaxime Bizon { 305e7300d04SMaxime Bizon .name = "ppp", 306e7300d04SMaxime Bizon .gpio = 3, 307e7300d04SMaxime Bizon .active_low = 1, 308e7300d04SMaxime Bizon }, 309e7300d04SMaxime Bizon { 310e7300d04SMaxime Bizon .name = "ppp-fail", 311e7300d04SMaxime Bizon .gpio = 4, 312e7300d04SMaxime Bizon .active_low = 1, 313e7300d04SMaxime Bizon }, 314e7300d04SMaxime Bizon { 315e7300d04SMaxime Bizon .name = "power", 316e7300d04SMaxime Bizon .gpio = 0, 317e7300d04SMaxime Bizon .active_low = 1, 318e7300d04SMaxime Bizon .default_trigger = "default-on", 319e7300d04SMaxime Bizon }, 320e7300d04SMaxime Bizon { 321e7300d04SMaxime Bizon .name = "stop", 322e7300d04SMaxime Bizon .gpio = 1, 323e7300d04SMaxime Bizon .active_low = 1, 324e7300d04SMaxime Bizon }, 325e7300d04SMaxime Bizon }, 326e7300d04SMaxime Bizon }; 327e7300d04SMaxime Bizon 328e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw_11 = { 329e7300d04SMaxime Bizon .name = "96348GW-11", 330e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 331e7300d04SMaxime Bizon 332524ef29cSMaxime Bizon .has_uart0 = 1, 333e7300d04SMaxime Bizon .has_enet0 = 1, 334e7300d04SMaxime Bizon .has_enet1 = 1, 335e7300d04SMaxime Bizon .has_pci = 1, 336e7300d04SMaxime Bizon 337e7300d04SMaxime Bizon .enet0 = { 338e7300d04SMaxime Bizon .has_phy = 1, 339e7300d04SMaxime Bizon .use_internal_phy = 1, 340e7300d04SMaxime Bizon }, 341e7300d04SMaxime Bizon 342e7300d04SMaxime Bizon .enet1 = { 343e7300d04SMaxime Bizon .force_speed_100 = 1, 344e7300d04SMaxime Bizon .force_duplex_full = 1, 345e7300d04SMaxime Bizon }, 346e7300d04SMaxime Bizon 347e7300d04SMaxime Bizon 348e7300d04SMaxime Bizon .has_ohci0 = 1, 349e7300d04SMaxime Bizon .has_pccard = 1, 350e7300d04SMaxime Bizon .has_ehci0 = 1, 351e7300d04SMaxime Bizon 352e7300d04SMaxime Bizon .leds = { 353e7300d04SMaxime Bizon { 354e7300d04SMaxime Bizon .name = "adsl-fail", 355e7300d04SMaxime Bizon .gpio = 2, 356e7300d04SMaxime Bizon .active_low = 1, 357e7300d04SMaxime Bizon }, 358e7300d04SMaxime Bizon { 359e7300d04SMaxime Bizon .name = "ppp", 360e7300d04SMaxime Bizon .gpio = 3, 361e7300d04SMaxime Bizon .active_low = 1, 362e7300d04SMaxime Bizon }, 363e7300d04SMaxime Bizon { 364e7300d04SMaxime Bizon .name = "ppp-fail", 365e7300d04SMaxime Bizon .gpio = 4, 366e7300d04SMaxime Bizon .active_low = 1, 367e7300d04SMaxime Bizon }, 368e7300d04SMaxime Bizon { 369e7300d04SMaxime Bizon .name = "power", 370e7300d04SMaxime Bizon .gpio = 0, 371e7300d04SMaxime Bizon .active_low = 1, 372e7300d04SMaxime Bizon .default_trigger = "default-on", 373e7300d04SMaxime Bizon }, 374e7300d04SMaxime Bizon { 375e7300d04SMaxime Bizon .name = "stop", 376e7300d04SMaxime Bizon .gpio = 1, 377e7300d04SMaxime Bizon .active_low = 1, 378e7300d04SMaxime Bizon }, 379e7300d04SMaxime Bizon }, 380e7300d04SMaxime Bizon }; 381e7300d04SMaxime Bizon 382e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw = { 383e7300d04SMaxime Bizon .name = "96348GW", 384e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 385e7300d04SMaxime Bizon 386524ef29cSMaxime Bizon .has_uart0 = 1, 387e7300d04SMaxime Bizon .has_enet0 = 1, 388e7300d04SMaxime Bizon .has_enet1 = 1, 389e7300d04SMaxime Bizon .has_pci = 1, 390e7300d04SMaxime Bizon 391e7300d04SMaxime Bizon .enet0 = { 392e7300d04SMaxime Bizon .has_phy = 1, 393e7300d04SMaxime Bizon .use_internal_phy = 1, 394e7300d04SMaxime Bizon }, 395e7300d04SMaxime Bizon .enet1 = { 396e7300d04SMaxime Bizon .force_speed_100 = 1, 397e7300d04SMaxime Bizon .force_duplex_full = 1, 398e7300d04SMaxime Bizon }, 399e7300d04SMaxime Bizon 400e7300d04SMaxime Bizon .has_ohci0 = 1, 401e7300d04SMaxime Bizon 402e7300d04SMaxime Bizon .has_dsp = 1, 403e7300d04SMaxime Bizon .dsp = { 404e7300d04SMaxime Bizon .gpio_rst = 6, 405e7300d04SMaxime Bizon .gpio_int = 34, 406e7300d04SMaxime Bizon .ext_irq = 2, 407e7300d04SMaxime Bizon .cs = 2, 408e7300d04SMaxime Bizon }, 409e7300d04SMaxime Bizon 410e7300d04SMaxime Bizon .leds = { 411e7300d04SMaxime Bizon { 412e7300d04SMaxime Bizon .name = "adsl-fail", 413e7300d04SMaxime Bizon .gpio = 2, 414e7300d04SMaxime Bizon .active_low = 1, 415e7300d04SMaxime Bizon }, 416e7300d04SMaxime Bizon { 417e7300d04SMaxime Bizon .name = "ppp", 418e7300d04SMaxime Bizon .gpio = 3, 419e7300d04SMaxime Bizon .active_low = 1, 420e7300d04SMaxime Bizon }, 421e7300d04SMaxime Bizon { 422e7300d04SMaxime Bizon .name = "ppp-fail", 423e7300d04SMaxime Bizon .gpio = 4, 424e7300d04SMaxime Bizon .active_low = 1, 425e7300d04SMaxime Bizon }, 426e7300d04SMaxime Bizon { 427e7300d04SMaxime Bizon .name = "power", 428e7300d04SMaxime Bizon .gpio = 0, 429e7300d04SMaxime Bizon .active_low = 1, 430e7300d04SMaxime Bizon .default_trigger = "default-on", 431e7300d04SMaxime Bizon }, 432e7300d04SMaxime Bizon { 433e7300d04SMaxime Bizon .name = "stop", 434e7300d04SMaxime Bizon .gpio = 1, 435e7300d04SMaxime Bizon .active_low = 1, 436e7300d04SMaxime Bizon }, 437e7300d04SMaxime Bizon }, 438e7300d04SMaxime Bizon }; 439e7300d04SMaxime Bizon 440e7300d04SMaxime Bizon static struct board_info __initdata board_FAST2404 = { 441e7300d04SMaxime Bizon .name = "F@ST2404", 442e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 443e7300d04SMaxime Bizon 444524ef29cSMaxime Bizon .has_uart0 = 1, 445e7300d04SMaxime Bizon .has_enet0 = 1, 446e7300d04SMaxime Bizon .has_enet1 = 1, 447e7300d04SMaxime Bizon .has_pci = 1, 448e7300d04SMaxime Bizon 449e7300d04SMaxime Bizon .enet0 = { 450e7300d04SMaxime Bizon .has_phy = 1, 451e7300d04SMaxime Bizon .use_internal_phy = 1, 452e7300d04SMaxime Bizon }, 453e7300d04SMaxime Bizon 454e7300d04SMaxime Bizon .enet1 = { 455e7300d04SMaxime Bizon .force_speed_100 = 1, 456e7300d04SMaxime Bizon .force_duplex_full = 1, 457e7300d04SMaxime Bizon }, 458e7300d04SMaxime Bizon 459e7300d04SMaxime Bizon .has_ohci0 = 1, 460e7300d04SMaxime Bizon .has_pccard = 1, 461e7300d04SMaxime Bizon .has_ehci0 = 1, 462e7300d04SMaxime Bizon }; 463e7300d04SMaxime Bizon 4642e6ad9a9SFlorian Fainelli static struct board_info __initdata board_rta1025w_16 = { 4652e6ad9a9SFlorian Fainelli .name = "RTA1025W_16", 4662e6ad9a9SFlorian Fainelli .expected_cpu_id = 0x6348, 4672e6ad9a9SFlorian Fainelli 4682e6ad9a9SFlorian Fainelli .has_enet0 = 1, 4692e6ad9a9SFlorian Fainelli .has_enet1 = 1, 4702e6ad9a9SFlorian Fainelli .has_pci = 1, 4712e6ad9a9SFlorian Fainelli 4722e6ad9a9SFlorian Fainelli .enet0 = { 4732e6ad9a9SFlorian Fainelli .has_phy = 1, 4742e6ad9a9SFlorian Fainelli .use_internal_phy = 1, 4752e6ad9a9SFlorian Fainelli }, 4762e6ad9a9SFlorian Fainelli .enet1 = { 4772e6ad9a9SFlorian Fainelli .force_speed_100 = 1, 4782e6ad9a9SFlorian Fainelli .force_duplex_full = 1, 4792e6ad9a9SFlorian Fainelli }, 4802e6ad9a9SFlorian Fainelli }; 4812e6ad9a9SFlorian Fainelli 4822e6ad9a9SFlorian Fainelli 483e7300d04SMaxime Bizon static struct board_info __initdata board_DV201AMR = { 484e7300d04SMaxime Bizon .name = "DV201AMR", 485e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 486e7300d04SMaxime Bizon 487524ef29cSMaxime Bizon .has_uart0 = 1, 488e7300d04SMaxime Bizon .has_pci = 1, 489e7300d04SMaxime Bizon .has_ohci0 = 1, 490e7300d04SMaxime Bizon 491e7300d04SMaxime Bizon .has_enet0 = 1, 492e7300d04SMaxime Bizon .has_enet1 = 1, 493e7300d04SMaxime Bizon .enet0 = { 494e7300d04SMaxime Bizon .has_phy = 1, 495e7300d04SMaxime Bizon .use_internal_phy = 1, 496e7300d04SMaxime Bizon }, 497e7300d04SMaxime Bizon .enet1 = { 498e7300d04SMaxime Bizon .force_speed_100 = 1, 499e7300d04SMaxime Bizon .force_duplex_full = 1, 500e7300d04SMaxime Bizon }, 501e7300d04SMaxime Bizon }; 502e7300d04SMaxime Bizon 503e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw_a = { 504e7300d04SMaxime Bizon .name = "96348GW-A", 505e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 506e7300d04SMaxime Bizon 507524ef29cSMaxime Bizon .has_uart0 = 1, 508e7300d04SMaxime Bizon .has_enet0 = 1, 509e7300d04SMaxime Bizon .has_enet1 = 1, 510e7300d04SMaxime Bizon .has_pci = 1, 511e7300d04SMaxime Bizon 512e7300d04SMaxime Bizon .enet0 = { 513e7300d04SMaxime Bizon .has_phy = 1, 514e7300d04SMaxime Bizon .use_internal_phy = 1, 515e7300d04SMaxime Bizon }, 516e7300d04SMaxime Bizon .enet1 = { 517e7300d04SMaxime Bizon .force_speed_100 = 1, 518e7300d04SMaxime Bizon .force_duplex_full = 1, 519e7300d04SMaxime Bizon }, 520e7300d04SMaxime Bizon 521e7300d04SMaxime Bizon .has_ohci0 = 1, 522e7300d04SMaxime Bizon }; 523e7300d04SMaxime Bizon #endif 524e7300d04SMaxime Bizon 525e7300d04SMaxime Bizon /* 526e7300d04SMaxime Bizon * known 6358 boards 527e7300d04SMaxime Bizon */ 528e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6358 529e7300d04SMaxime Bizon static struct board_info __initdata board_96358vw = { 530e7300d04SMaxime Bizon .name = "96358VW", 531e7300d04SMaxime Bizon .expected_cpu_id = 0x6358, 532e7300d04SMaxime Bizon 533524ef29cSMaxime Bizon .has_uart0 = 1, 534e7300d04SMaxime Bizon .has_enet0 = 1, 535e7300d04SMaxime Bizon .has_enet1 = 1, 536e7300d04SMaxime Bizon .has_pci = 1, 537e7300d04SMaxime Bizon 538e7300d04SMaxime Bizon .enet0 = { 539e7300d04SMaxime Bizon .has_phy = 1, 540e7300d04SMaxime Bizon .use_internal_phy = 1, 541e7300d04SMaxime Bizon }, 542e7300d04SMaxime Bizon 543e7300d04SMaxime Bizon .enet1 = { 544e7300d04SMaxime Bizon .force_speed_100 = 1, 545e7300d04SMaxime Bizon .force_duplex_full = 1, 546e7300d04SMaxime Bizon }, 547e7300d04SMaxime Bizon 548e7300d04SMaxime Bizon 549e7300d04SMaxime Bizon .has_ohci0 = 1, 550e7300d04SMaxime Bizon .has_pccard = 1, 551e7300d04SMaxime Bizon .has_ehci0 = 1, 552e7300d04SMaxime Bizon 553e7300d04SMaxime Bizon .leds = { 554e7300d04SMaxime Bizon { 555e7300d04SMaxime Bizon .name = "adsl-fail", 556e7300d04SMaxime Bizon .gpio = 15, 557e7300d04SMaxime Bizon .active_low = 1, 558e7300d04SMaxime Bizon }, 559e7300d04SMaxime Bizon { 560e7300d04SMaxime Bizon .name = "ppp", 561e7300d04SMaxime Bizon .gpio = 22, 562e7300d04SMaxime Bizon .active_low = 1, 563e7300d04SMaxime Bizon }, 564e7300d04SMaxime Bizon { 565e7300d04SMaxime Bizon .name = "ppp-fail", 566e7300d04SMaxime Bizon .gpio = 23, 567e7300d04SMaxime Bizon .active_low = 1, 568e7300d04SMaxime Bizon }, 569e7300d04SMaxime Bizon { 570e7300d04SMaxime Bizon .name = "power", 571e7300d04SMaxime Bizon .gpio = 4, 572e7300d04SMaxime Bizon .default_trigger = "default-on", 573e7300d04SMaxime Bizon }, 574e7300d04SMaxime Bizon { 575e7300d04SMaxime Bizon .name = "stop", 576e7300d04SMaxime Bizon .gpio = 5, 577e7300d04SMaxime Bizon }, 578e7300d04SMaxime Bizon }, 579e7300d04SMaxime Bizon }; 580e7300d04SMaxime Bizon 581e7300d04SMaxime Bizon static struct board_info __initdata board_96358vw2 = { 582e7300d04SMaxime Bizon .name = "96358VW2", 583e7300d04SMaxime Bizon .expected_cpu_id = 0x6358, 584e7300d04SMaxime Bizon 585524ef29cSMaxime Bizon .has_uart0 = 1, 586e7300d04SMaxime Bizon .has_enet0 = 1, 587e7300d04SMaxime Bizon .has_enet1 = 1, 588e7300d04SMaxime Bizon .has_pci = 1, 589e7300d04SMaxime Bizon 590e7300d04SMaxime Bizon .enet0 = { 591e7300d04SMaxime Bizon .has_phy = 1, 592e7300d04SMaxime Bizon .use_internal_phy = 1, 593e7300d04SMaxime Bizon }, 594e7300d04SMaxime Bizon 595e7300d04SMaxime Bizon .enet1 = { 596e7300d04SMaxime Bizon .force_speed_100 = 1, 597e7300d04SMaxime Bizon .force_duplex_full = 1, 598e7300d04SMaxime Bizon }, 599e7300d04SMaxime Bizon 600e7300d04SMaxime Bizon 601e7300d04SMaxime Bizon .has_ohci0 = 1, 602e7300d04SMaxime Bizon .has_pccard = 1, 603e7300d04SMaxime Bizon .has_ehci0 = 1, 604e7300d04SMaxime Bizon 605e7300d04SMaxime Bizon .leds = { 606e7300d04SMaxime Bizon { 607e7300d04SMaxime Bizon .name = "adsl", 608e7300d04SMaxime Bizon .gpio = 22, 609e7300d04SMaxime Bizon .active_low = 1, 610e7300d04SMaxime Bizon }, 611e7300d04SMaxime Bizon { 612e7300d04SMaxime Bizon .name = "ppp-fail", 613e7300d04SMaxime Bizon .gpio = 23, 614e7300d04SMaxime Bizon }, 615e7300d04SMaxime Bizon { 616e7300d04SMaxime Bizon .name = "power", 617e7300d04SMaxime Bizon .gpio = 5, 618e7300d04SMaxime Bizon .active_low = 1, 619e7300d04SMaxime Bizon .default_trigger = "default-on", 620e7300d04SMaxime Bizon }, 621e7300d04SMaxime Bizon { 622e7300d04SMaxime Bizon .name = "stop", 623e7300d04SMaxime Bizon .gpio = 4, 624e7300d04SMaxime Bizon .active_low = 1, 625e7300d04SMaxime Bizon }, 626e7300d04SMaxime Bizon }, 627e7300d04SMaxime Bizon }; 628e7300d04SMaxime Bizon 629e7300d04SMaxime Bizon static struct board_info __initdata board_AGPFS0 = { 630e7300d04SMaxime Bizon .name = "AGPF-S0", 631e7300d04SMaxime Bizon .expected_cpu_id = 0x6358, 632e7300d04SMaxime Bizon 633524ef29cSMaxime Bizon .has_uart0 = 1, 634e7300d04SMaxime Bizon .has_enet0 = 1, 635e7300d04SMaxime Bizon .has_enet1 = 1, 636e7300d04SMaxime Bizon .has_pci = 1, 637e7300d04SMaxime Bizon 638e7300d04SMaxime Bizon .enet0 = { 639e7300d04SMaxime Bizon .has_phy = 1, 640e7300d04SMaxime Bizon .use_internal_phy = 1, 641e7300d04SMaxime Bizon }, 642e7300d04SMaxime Bizon 643e7300d04SMaxime Bizon .enet1 = { 644e7300d04SMaxime Bizon .force_speed_100 = 1, 645e7300d04SMaxime Bizon .force_duplex_full = 1, 646e7300d04SMaxime Bizon }, 647e7300d04SMaxime Bizon 648e7300d04SMaxime Bizon .has_ohci0 = 1, 649e7300d04SMaxime Bizon .has_ehci0 = 1, 650e7300d04SMaxime Bizon }; 651f29b7cacSFlorian Fainelli 652f29b7cacSFlorian Fainelli static struct board_info __initdata board_DWVS0 = { 653f29b7cacSFlorian Fainelli .name = "DWV-S0", 654f29b7cacSFlorian Fainelli .expected_cpu_id = 0x6358, 655f29b7cacSFlorian Fainelli 656f29b7cacSFlorian Fainelli .has_enet0 = 1, 657f29b7cacSFlorian Fainelli .has_enet1 = 1, 658f29b7cacSFlorian Fainelli .has_pci = 1, 659f29b7cacSFlorian Fainelli 660f29b7cacSFlorian Fainelli .enet0 = { 661f29b7cacSFlorian Fainelli .has_phy = 1, 662f29b7cacSFlorian Fainelli .use_internal_phy = 1, 663f29b7cacSFlorian Fainelli }, 664f29b7cacSFlorian Fainelli 665f29b7cacSFlorian Fainelli .enet1 = { 666f29b7cacSFlorian Fainelli .force_speed_100 = 1, 667f29b7cacSFlorian Fainelli .force_duplex_full = 1, 668f29b7cacSFlorian Fainelli }, 669f29b7cacSFlorian Fainelli 670f29b7cacSFlorian Fainelli .has_ohci0 = 1, 671f29b7cacSFlorian Fainelli }; 672e7300d04SMaxime Bizon #endif 673e7300d04SMaxime Bizon 674e7300d04SMaxime Bizon /* 675e7300d04SMaxime Bizon * all boards 676e7300d04SMaxime Bizon */ 6773cf5ae6eSAndi Kleen static const struct board_info __initconst *bcm963xx_boards[] = { 678450acb0bSFlorian Fainelli #ifdef CONFIG_BCM63XX_CPU_3368 679450acb0bSFlorian Fainelli &board_cvg834g, 680450acb0bSFlorian Fainelli #endif 6812f74b770SJonas Gorski #ifdef CONFIG_BCM63XX_CPU_6328 6822f74b770SJonas Gorski &board_96328avng, 6832f74b770SJonas Gorski #endif 684e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6338 685e7300d04SMaxime Bizon &board_96338gw, 686e7300d04SMaxime Bizon &board_96338w, 687e7300d04SMaxime Bizon #endif 688e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6345 689e7300d04SMaxime Bizon &board_96345gw2, 690e7300d04SMaxime Bizon #endif 691e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6348 692e7300d04SMaxime Bizon &board_96348r, 693e7300d04SMaxime Bizon &board_96348gw, 694e7300d04SMaxime Bizon &board_96348gw_10, 695e7300d04SMaxime Bizon &board_96348gw_11, 696e7300d04SMaxime Bizon &board_FAST2404, 697e7300d04SMaxime Bizon &board_DV201AMR, 698e7300d04SMaxime Bizon &board_96348gw_a, 6992e6ad9a9SFlorian Fainelli &board_rta1025w_16, 700e7300d04SMaxime Bizon #endif 701e7300d04SMaxime Bizon 702e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6358 703e7300d04SMaxime Bizon &board_96358vw, 704e7300d04SMaxime Bizon &board_96358vw2, 705e7300d04SMaxime Bizon &board_AGPFS0, 706f29b7cacSFlorian Fainelli &board_DWVS0, 707e7300d04SMaxime Bizon #endif 708e7300d04SMaxime Bizon }; 709e7300d04SMaxime Bizon 710e7300d04SMaxime Bizon /* 7115e3644a9SFlorian Fainelli * Register a sane SPROMv2 to make the on-board 7125e3644a9SFlorian Fainelli * bcm4318 WLAN work 7135e3644a9SFlorian Fainelli */ 7145e3644a9SFlorian Fainelli #ifdef CONFIG_SSB_PCIHOST 7155e3644a9SFlorian Fainelli static struct ssb_sprom bcm63xx_sprom = { 7165e3644a9SFlorian Fainelli .revision = 0x02, 7175e3644a9SFlorian Fainelli .board_rev = 0x17, 7185e3644a9SFlorian Fainelli .country_code = 0x0, 7195e3644a9SFlorian Fainelli .ant_available_bg = 0x3, 7205e3644a9SFlorian Fainelli .pa0b0 = 0x15ae, 7215e3644a9SFlorian Fainelli .pa0b1 = 0xfa85, 7225e3644a9SFlorian Fainelli .pa0b2 = 0xfe8d, 7235e3644a9SFlorian Fainelli .pa1b0 = 0xffff, 7245e3644a9SFlorian Fainelli .pa1b1 = 0xffff, 7255e3644a9SFlorian Fainelli .pa1b2 = 0xffff, 7265e3644a9SFlorian Fainelli .gpio0 = 0xff, 7275e3644a9SFlorian Fainelli .gpio1 = 0xff, 7285e3644a9SFlorian Fainelli .gpio2 = 0xff, 7295e3644a9SFlorian Fainelli .gpio3 = 0xff, 7305e3644a9SFlorian Fainelli .maxpwr_bg = 0x004c, 7315e3644a9SFlorian Fainelli .itssi_bg = 0x00, 7325e3644a9SFlorian Fainelli .boardflags_lo = 0x2848, 7335e3644a9SFlorian Fainelli .boardflags_hi = 0x0000, 7345e3644a9SFlorian Fainelli }; 735b3ae52b6SHauke Mehrtens 736b3ae52b6SHauke Mehrtens int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) 737b3ae52b6SHauke Mehrtens { 738b3ae52b6SHauke Mehrtens if (bus->bustype == SSB_BUSTYPE_PCI) { 739b3ae52b6SHauke Mehrtens memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); 740b3ae52b6SHauke Mehrtens return 0; 741b3ae52b6SHauke Mehrtens } else { 742b3ae52b6SHauke Mehrtens printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); 743b3ae52b6SHauke Mehrtens return -EINVAL; 744b3ae52b6SHauke Mehrtens } 745b3ae52b6SHauke Mehrtens } 7465e3644a9SFlorian Fainelli #endif 7475e3644a9SFlorian Fainelli 7485e3644a9SFlorian Fainelli /* 7495e3644a9SFlorian Fainelli * return board name for /proc/cpuinfo 7505e3644a9SFlorian Fainelli */ 7515e3644a9SFlorian Fainelli const char *board_get_name(void) 7525e3644a9SFlorian Fainelli { 7535e3644a9SFlorian Fainelli return board.name; 7545e3644a9SFlorian Fainelli } 7555e3644a9SFlorian Fainelli 7565e3644a9SFlorian Fainelli /* 757e7300d04SMaxime Bizon * early init callback, read nvram data from flash and checksum it 758e7300d04SMaxime Bizon */ 759e7300d04SMaxime Bizon void __init board_prom_init(void) 760e7300d04SMaxime Bizon { 761e7e333cbSJonas Gorski unsigned int i; 762e7e333cbSJonas Gorski u8 *boot_addr, *cfe; 763e7300d04SMaxime Bizon char cfe_version[32]; 764d753601aSFlorian Fainelli char *board_name = NULL; 765e7300d04SMaxime Bizon u32 val; 766d753601aSFlorian Fainelli struct bcm_hcs *hcs; 767e7300d04SMaxime Bizon 768e5766aeaSJonas Gorski /* read base address of boot chip select (0) 7692c8aaf71SJonas Gorski * 6328/6362 do not have MPI but boot from a fixed address 770e5766aeaSJonas Gorski */ 7712c8aaf71SJonas Gorski if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { 772e5766aeaSJonas Gorski val = 0x18000000; 7732c8aaf71SJonas Gorski } else { 774e7300d04SMaxime Bizon val = bcm_mpi_readl(MPI_CSBASE_REG(0)); 775e7300d04SMaxime Bizon val &= MPI_CSBASE_BASE_MASK; 776e5766aeaSJonas Gorski } 777e7300d04SMaxime Bizon boot_addr = (u8 *)KSEG1ADDR(val); 778e7300d04SMaxime Bizon 779e7300d04SMaxime Bizon /* dump cfe version */ 780e7300d04SMaxime Bizon cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; 781e7300d04SMaxime Bizon if (!memcmp(cfe, "cfe-v", 5)) 782e7300d04SMaxime Bizon snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u", 783e7300d04SMaxime Bizon cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]); 784e7300d04SMaxime Bizon else 785e7300d04SMaxime Bizon strcpy(cfe_version, "unknown"); 786e7300d04SMaxime Bizon printk(KERN_INFO PFX "CFE version: %s\n", cfe_version); 787e7300d04SMaxime Bizon 78897367519SJonas Gorski bcm63xx_nvram_init(boot_addr + BCM963XX_NVRAM_OFFSET); 789e7300d04SMaxime Bizon 790d753601aSFlorian Fainelli if (BCMCPU_IS_3368()) { 791d753601aSFlorian Fainelli hcs = (struct bcm_hcs *)boot_addr; 792d753601aSFlorian Fainelli board_name = hcs->filename; 793d753601aSFlorian Fainelli } else { 794e7e333cbSJonas Gorski board_name = bcm63xx_nvram_get_name(); 795d753601aSFlorian Fainelli } 796e7300d04SMaxime Bizon /* find board by name */ 797e7300d04SMaxime Bizon for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) { 798e7e333cbSJonas Gorski if (strncmp(board_name, bcm963xx_boards[i]->name, 16)) 799e7300d04SMaxime Bizon continue; 800e7300d04SMaxime Bizon /* copy, board desc array is marked initdata */ 801e7300d04SMaxime Bizon memcpy(&board, bcm963xx_boards[i], sizeof(board)); 802e7300d04SMaxime Bizon break; 803e7300d04SMaxime Bizon } 804e7300d04SMaxime Bizon 805e7300d04SMaxime Bizon /* bail out if board is not found, will complain later */ 806e7300d04SMaxime Bizon if (!board.name[0]) { 807e7300d04SMaxime Bizon char name[17]; 808e7e333cbSJonas Gorski memcpy(name, board_name, 16); 809e7300d04SMaxime Bizon name[16] = 0; 810e7300d04SMaxime Bizon printk(KERN_ERR PFX "unknown bcm963xx board: %s\n", 811e7300d04SMaxime Bizon name); 812e7300d04SMaxime Bizon return; 813e7300d04SMaxime Bizon } 814e7300d04SMaxime Bizon 815e7300d04SMaxime Bizon /* setup pin multiplexing depending on board enabled device, 816e7300d04SMaxime Bizon * this has to be done this early since PCI init is done 817e7300d04SMaxime Bizon * inside arch_initcall */ 818e7300d04SMaxime Bizon val = 0; 819e7300d04SMaxime Bizon 820e7300d04SMaxime Bizon #ifdef CONFIG_PCI 821e7300d04SMaxime Bizon if (board.has_pci) { 822e7300d04SMaxime Bizon bcm63xx_pci_enabled = 1; 823e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 824e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G2_PCI; 825e7300d04SMaxime Bizon } 826e7300d04SMaxime Bizon #endif 827e7300d04SMaxime Bizon 828e7300d04SMaxime Bizon if (board.has_pccard) { 829e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 830e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G1_MII_PCCARD; 831e7300d04SMaxime Bizon } 832e7300d04SMaxime Bizon 833e7300d04SMaxime Bizon if (board.has_enet0 && !board.enet0.use_internal_phy) { 834e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 835e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G3_EXT_MII | 836e7300d04SMaxime Bizon GPIO_MODE_6348_G0_EXT_MII; 837e7300d04SMaxime Bizon } 838e7300d04SMaxime Bizon 839e7300d04SMaxime Bizon if (board.has_enet1 && !board.enet1.use_internal_phy) { 840e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 841e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G3_EXT_MII | 842e7300d04SMaxime Bizon GPIO_MODE_6348_G0_EXT_MII; 843e7300d04SMaxime Bizon } 844e7300d04SMaxime Bizon 845e7300d04SMaxime Bizon bcm_gpio_writel(val, GPIO_MODE_REG); 846e7300d04SMaxime Bizon } 847e7300d04SMaxime Bizon 848e7300d04SMaxime Bizon /* 849e7300d04SMaxime Bizon * second stage init callback, good time to panic if we couldn't 850e7300d04SMaxime Bizon * identify on which board we're running since early printk is working 851e7300d04SMaxime Bizon */ 852e7300d04SMaxime Bizon void __init board_setup(void) 853e7300d04SMaxime Bizon { 854e7300d04SMaxime Bizon if (!board.name[0]) 855e7300d04SMaxime Bizon panic("unable to detect bcm963xx board"); 856e7300d04SMaxime Bizon printk(KERN_INFO PFX "board name: %s\n", board.name); 857e7300d04SMaxime Bizon 858e7300d04SMaxime Bizon /* make sure we're running on expected cpu */ 859e7300d04SMaxime Bizon if (bcm63xx_get_cpu_id() != board.expected_cpu_id) 860e7300d04SMaxime Bizon panic("unexpected CPU for bcm963xx board"); 861e7300d04SMaxime Bizon } 862e7300d04SMaxime Bizon 863e7300d04SMaxime Bizon static struct gpio_led_platform_data bcm63xx_led_data; 864e7300d04SMaxime Bizon 865e7300d04SMaxime Bizon static struct platform_device bcm63xx_gpio_leds = { 866e7300d04SMaxime Bizon .name = "leds-gpio", 867e7300d04SMaxime Bizon .id = 0, 868e7300d04SMaxime Bizon .dev.platform_data = &bcm63xx_led_data, 869e7300d04SMaxime Bizon }; 870e7300d04SMaxime Bizon 871e7300d04SMaxime Bizon /* 872e7300d04SMaxime Bizon * third stage init callback, register all board devices. 873e7300d04SMaxime Bizon */ 874e7300d04SMaxime Bizon int __init board_register_devices(void) 875e7300d04SMaxime Bizon { 876524ef29cSMaxime Bizon if (board.has_uart0) 877524ef29cSMaxime Bizon bcm63xx_uart_register(0); 878524ef29cSMaxime Bizon 879524ef29cSMaxime Bizon if (board.has_uart1) 880524ef29cSMaxime Bizon bcm63xx_uart_register(1); 881524ef29cSMaxime Bizon 882553d6d5fSMaxime Bizon if (board.has_pccard) 883553d6d5fSMaxime Bizon bcm63xx_pcmcia_register(); 884553d6d5fSMaxime Bizon 885e7300d04SMaxime Bizon if (board.has_enet0 && 886e7e333cbSJonas Gorski !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr)) 887e7300d04SMaxime Bizon bcm63xx_enet_register(0, &board.enet0); 888e7300d04SMaxime Bizon 889e7300d04SMaxime Bizon if (board.has_enet1 && 890e7e333cbSJonas Gorski !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) 891e7300d04SMaxime Bizon bcm63xx_enet_register(1, &board.enet1); 892e7300d04SMaxime Bizon 89322df90f6SKevin Cernekee if (board.has_usbd) 89422df90f6SKevin Cernekee bcm63xx_usbd_register(&board.usbd); 89522df90f6SKevin Cernekee 896e7300d04SMaxime Bizon if (board.has_dsp) 897e7300d04SMaxime Bizon bcm63xx_dsp_register(&board.dsp); 898e7300d04SMaxime Bizon 899b15a6d62SFlorian Fainelli /* Generate MAC address for WLAN and register our SPROM, 900b15a6d62SFlorian Fainelli * do this after registering enet devices 901b15a6d62SFlorian Fainelli */ 902b15a6d62SFlorian Fainelli #ifdef CONFIG_SSB_PCIHOST 903e7e333cbSJonas Gorski if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) { 904b15a6d62SFlorian Fainelli memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); 905b15a6d62SFlorian Fainelli memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); 906b15a6d62SFlorian Fainelli if (ssb_arch_register_fallback_sprom( 907b15a6d62SFlorian Fainelli &bcm63xx_get_fallback_sprom) < 0) 908b15a6d62SFlorian Fainelli pr_err(PFX "failed to register fallback SPROM\n"); 909b15a6d62SFlorian Fainelli } 910b15a6d62SFlorian Fainelli #endif 911b15a6d62SFlorian Fainelli 91276ca4e14SFlorian Fainelli bcm63xx_spi_register(); 91376ca4e14SFlorian Fainelli 9144b897d54SJonas Gorski bcm63xx_flash_register(); 915e7300d04SMaxime Bizon 916e7300d04SMaxime Bizon bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); 917e7300d04SMaxime Bizon bcm63xx_led_data.leds = board.leds; 918e7300d04SMaxime Bizon 919e7300d04SMaxime Bizon platform_device_register(&bcm63xx_gpio_leds); 920e7300d04SMaxime Bizon 9210b35f0c5SFlorian Fainelli if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) 9220b35f0c5SFlorian Fainelli gpio_request_one(board.ephy_reset_gpio, 9230b35f0c5SFlorian Fainelli board.ephy_reset_gpio_flags, "ephy-reset"); 9240b35f0c5SFlorian Fainelli 925e7300d04SMaxime Bizon return 0; 926e7300d04SMaxime Bizon } 927