1e7300d04SMaxime Bizon /* 2e7300d04SMaxime Bizon * This file is subject to the terms and conditions of the GNU General Public 3e7300d04SMaxime Bizon * License. See the file "COPYING" in the main directory of this archive 4e7300d04SMaxime Bizon * for more details. 5e7300d04SMaxime Bizon * 6e7300d04SMaxime Bizon * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> 7e7300d04SMaxime Bizon * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org> 8e7300d04SMaxime Bizon */ 9e7300d04SMaxime Bizon 10e7300d04SMaxime Bizon #include <linux/init.h> 11e7300d04SMaxime Bizon #include <linux/kernel.h> 12e7300d04SMaxime Bizon #include <linux/string.h> 13e7300d04SMaxime Bizon #include <linux/platform_device.h> 14e7300d04SMaxime Bizon #include <linux/mtd/mtd.h> 15e7300d04SMaxime Bizon #include <linux/mtd/partitions.h> 16e7300d04SMaxime Bizon #include <linux/mtd/physmap.h> 17e7300d04SMaxime Bizon #include <linux/ssb/ssb.h> 18e7300d04SMaxime Bizon #include <asm/addrspace.h> 19e7300d04SMaxime Bizon #include <bcm63xx_board.h> 20e7300d04SMaxime Bizon #include <bcm63xx_cpu.h> 21e7300d04SMaxime Bizon #include <bcm63xx_regs.h> 22e7300d04SMaxime Bizon #include <bcm63xx_io.h> 23e7300d04SMaxime Bizon #include <bcm63xx_dev_pci.h> 24e7300d04SMaxime Bizon #include <bcm63xx_dev_enet.h> 25e7300d04SMaxime Bizon #include <bcm63xx_dev_dsp.h> 26553d6d5fSMaxime Bizon #include <bcm63xx_dev_pcmcia.h> 27e7300d04SMaxime Bizon #include <board_bcm963xx.h> 28e7300d04SMaxime Bizon 29e7300d04SMaxime Bizon #define PFX "board_bcm963xx: " 30e7300d04SMaxime Bizon 31e7300d04SMaxime Bizon static struct bcm963xx_nvram nvram; 32e7300d04SMaxime Bizon static unsigned int mac_addr_used; 33e7300d04SMaxime Bizon static struct board_info board; 34e7300d04SMaxime Bizon 35e7300d04SMaxime Bizon /* 36e7300d04SMaxime Bizon * known 6338 boards 37e7300d04SMaxime Bizon */ 38e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6338 39e7300d04SMaxime Bizon static struct board_info __initdata board_96338gw = { 40e7300d04SMaxime Bizon .name = "96338GW", 41e7300d04SMaxime Bizon .expected_cpu_id = 0x6338, 42e7300d04SMaxime Bizon 43e7300d04SMaxime Bizon .has_enet0 = 1, 44e7300d04SMaxime Bizon .enet0 = { 45e7300d04SMaxime Bizon .force_speed_100 = 1, 46e7300d04SMaxime Bizon .force_duplex_full = 1, 47e7300d04SMaxime Bizon }, 48e7300d04SMaxime Bizon 49e7300d04SMaxime Bizon .has_ohci0 = 1, 50e7300d04SMaxime Bizon 51e7300d04SMaxime Bizon .leds = { 52e7300d04SMaxime Bizon { 53e7300d04SMaxime Bizon .name = "adsl", 54e7300d04SMaxime Bizon .gpio = 3, 55e7300d04SMaxime Bizon .active_low = 1, 56e7300d04SMaxime Bizon }, 57e7300d04SMaxime Bizon { 58e7300d04SMaxime Bizon .name = "ses", 59e7300d04SMaxime Bizon .gpio = 5, 60e7300d04SMaxime Bizon .active_low = 1, 61e7300d04SMaxime Bizon }, 62e7300d04SMaxime Bizon { 63e7300d04SMaxime Bizon .name = "ppp-fail", 64e7300d04SMaxime Bizon .gpio = 4, 65e7300d04SMaxime Bizon .active_low = 1, 66e7300d04SMaxime Bizon }, 67e7300d04SMaxime Bizon { 68e7300d04SMaxime Bizon .name = "power", 69e7300d04SMaxime Bizon .gpio = 0, 70e7300d04SMaxime Bizon .active_low = 1, 71e7300d04SMaxime Bizon .default_trigger = "default-on", 72e7300d04SMaxime Bizon }, 73e7300d04SMaxime Bizon { 74e7300d04SMaxime Bizon .name = "stop", 75e7300d04SMaxime Bizon .gpio = 1, 76e7300d04SMaxime Bizon .active_low = 1, 77e7300d04SMaxime Bizon } 78e7300d04SMaxime Bizon }, 79e7300d04SMaxime Bizon }; 80e7300d04SMaxime Bizon 81e7300d04SMaxime Bizon static struct board_info __initdata board_96338w = { 82e7300d04SMaxime Bizon .name = "96338W", 83e7300d04SMaxime Bizon .expected_cpu_id = 0x6338, 84e7300d04SMaxime Bizon 85e7300d04SMaxime Bizon .has_enet0 = 1, 86e7300d04SMaxime Bizon .enet0 = { 87e7300d04SMaxime Bizon .force_speed_100 = 1, 88e7300d04SMaxime Bizon .force_duplex_full = 1, 89e7300d04SMaxime Bizon }, 90e7300d04SMaxime Bizon 91e7300d04SMaxime Bizon .leds = { 92e7300d04SMaxime Bizon { 93e7300d04SMaxime Bizon .name = "adsl", 94e7300d04SMaxime Bizon .gpio = 3, 95e7300d04SMaxime Bizon .active_low = 1, 96e7300d04SMaxime Bizon }, 97e7300d04SMaxime Bizon { 98e7300d04SMaxime Bizon .name = "ses", 99e7300d04SMaxime Bizon .gpio = 5, 100e7300d04SMaxime Bizon .active_low = 1, 101e7300d04SMaxime Bizon }, 102e7300d04SMaxime Bizon { 103e7300d04SMaxime Bizon .name = "ppp-fail", 104e7300d04SMaxime Bizon .gpio = 4, 105e7300d04SMaxime Bizon .active_low = 1, 106e7300d04SMaxime Bizon }, 107e7300d04SMaxime Bizon { 108e7300d04SMaxime Bizon .name = "power", 109e7300d04SMaxime Bizon .gpio = 0, 110e7300d04SMaxime Bizon .active_low = 1, 111e7300d04SMaxime Bizon .default_trigger = "default-on", 112e7300d04SMaxime Bizon }, 113e7300d04SMaxime Bizon { 114e7300d04SMaxime Bizon .name = "stop", 115e7300d04SMaxime Bizon .gpio = 1, 116e7300d04SMaxime Bizon .active_low = 1, 117e7300d04SMaxime Bizon }, 118e7300d04SMaxime Bizon }, 119e7300d04SMaxime Bizon }; 120e7300d04SMaxime Bizon #endif 121e7300d04SMaxime Bizon 122e7300d04SMaxime Bizon /* 123e7300d04SMaxime Bizon * known 6345 boards 124e7300d04SMaxime Bizon */ 125e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6345 126e7300d04SMaxime Bizon static struct board_info __initdata board_96345gw2 = { 127e7300d04SMaxime Bizon .name = "96345GW2", 128e7300d04SMaxime Bizon .expected_cpu_id = 0x6345, 129e7300d04SMaxime Bizon }; 130e7300d04SMaxime Bizon #endif 131e7300d04SMaxime Bizon 132e7300d04SMaxime Bizon /* 133e7300d04SMaxime Bizon * known 6348 boards 134e7300d04SMaxime Bizon */ 135e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6348 136e7300d04SMaxime Bizon static struct board_info __initdata board_96348r = { 137e7300d04SMaxime Bizon .name = "96348R", 138e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 139e7300d04SMaxime Bizon 140e7300d04SMaxime Bizon .has_enet0 = 1, 141e7300d04SMaxime Bizon .has_pci = 1, 142e7300d04SMaxime Bizon 143e7300d04SMaxime Bizon .enet0 = { 144e7300d04SMaxime Bizon .has_phy = 1, 145e7300d04SMaxime Bizon .use_internal_phy = 1, 146e7300d04SMaxime Bizon }, 147e7300d04SMaxime Bizon 148e7300d04SMaxime Bizon .leds = { 149e7300d04SMaxime Bizon { 150e7300d04SMaxime Bizon .name = "adsl-fail", 151e7300d04SMaxime Bizon .gpio = 2, 152e7300d04SMaxime Bizon .active_low = 1, 153e7300d04SMaxime Bizon }, 154e7300d04SMaxime Bizon { 155e7300d04SMaxime Bizon .name = "ppp", 156e7300d04SMaxime Bizon .gpio = 3, 157e7300d04SMaxime Bizon .active_low = 1, 158e7300d04SMaxime Bizon }, 159e7300d04SMaxime Bizon { 160e7300d04SMaxime Bizon .name = "ppp-fail", 161e7300d04SMaxime Bizon .gpio = 4, 162e7300d04SMaxime Bizon .active_low = 1, 163e7300d04SMaxime Bizon }, 164e7300d04SMaxime Bizon { 165e7300d04SMaxime Bizon .name = "power", 166e7300d04SMaxime Bizon .gpio = 0, 167e7300d04SMaxime Bizon .active_low = 1, 168e7300d04SMaxime Bizon .default_trigger = "default-on", 169e7300d04SMaxime Bizon 170e7300d04SMaxime Bizon }, 171e7300d04SMaxime Bizon { 172e7300d04SMaxime Bizon .name = "stop", 173e7300d04SMaxime Bizon .gpio = 1, 174e7300d04SMaxime Bizon .active_low = 1, 175e7300d04SMaxime Bizon }, 176e7300d04SMaxime Bizon }, 177e7300d04SMaxime Bizon }; 178e7300d04SMaxime Bizon 179e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw_10 = { 180e7300d04SMaxime Bizon .name = "96348GW-10", 181e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 182e7300d04SMaxime Bizon 183e7300d04SMaxime Bizon .has_enet0 = 1, 184e7300d04SMaxime Bizon .has_enet1 = 1, 185e7300d04SMaxime Bizon .has_pci = 1, 186e7300d04SMaxime Bizon 187e7300d04SMaxime Bizon .enet0 = { 188e7300d04SMaxime Bizon .has_phy = 1, 189e7300d04SMaxime Bizon .use_internal_phy = 1, 190e7300d04SMaxime Bizon }, 191e7300d04SMaxime Bizon .enet1 = { 192e7300d04SMaxime Bizon .force_speed_100 = 1, 193e7300d04SMaxime Bizon .force_duplex_full = 1, 194e7300d04SMaxime Bizon }, 195e7300d04SMaxime Bizon 196e7300d04SMaxime Bizon .has_ohci0 = 1, 197e7300d04SMaxime Bizon .has_pccard = 1, 198e7300d04SMaxime Bizon .has_ehci0 = 1, 199e7300d04SMaxime Bizon 200e7300d04SMaxime Bizon .has_dsp = 1, 201e7300d04SMaxime Bizon .dsp = { 202e7300d04SMaxime Bizon .gpio_rst = 6, 203e7300d04SMaxime Bizon .gpio_int = 34, 204e7300d04SMaxime Bizon .cs = 2, 205e7300d04SMaxime Bizon .ext_irq = 2, 206e7300d04SMaxime Bizon }, 207e7300d04SMaxime Bizon 208e7300d04SMaxime Bizon .leds = { 209e7300d04SMaxime Bizon { 210e7300d04SMaxime Bizon .name = "adsl-fail", 211e7300d04SMaxime Bizon .gpio = 2, 212e7300d04SMaxime Bizon .active_low = 1, 213e7300d04SMaxime Bizon }, 214e7300d04SMaxime Bizon { 215e7300d04SMaxime Bizon .name = "ppp", 216e7300d04SMaxime Bizon .gpio = 3, 217e7300d04SMaxime Bizon .active_low = 1, 218e7300d04SMaxime Bizon }, 219e7300d04SMaxime Bizon { 220e7300d04SMaxime Bizon .name = "ppp-fail", 221e7300d04SMaxime Bizon .gpio = 4, 222e7300d04SMaxime Bizon .active_low = 1, 223e7300d04SMaxime Bizon }, 224e7300d04SMaxime Bizon { 225e7300d04SMaxime Bizon .name = "power", 226e7300d04SMaxime Bizon .gpio = 0, 227e7300d04SMaxime Bizon .active_low = 1, 228e7300d04SMaxime Bizon .default_trigger = "default-on", 229e7300d04SMaxime Bizon }, 230e7300d04SMaxime Bizon { 231e7300d04SMaxime Bizon .name = "stop", 232e7300d04SMaxime Bizon .gpio = 1, 233e7300d04SMaxime Bizon .active_low = 1, 234e7300d04SMaxime Bizon }, 235e7300d04SMaxime Bizon }, 236e7300d04SMaxime Bizon }; 237e7300d04SMaxime Bizon 238e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw_11 = { 239e7300d04SMaxime Bizon .name = "96348GW-11", 240e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 241e7300d04SMaxime Bizon 242e7300d04SMaxime Bizon .has_enet0 = 1, 243e7300d04SMaxime Bizon .has_enet1 = 1, 244e7300d04SMaxime Bizon .has_pci = 1, 245e7300d04SMaxime Bizon 246e7300d04SMaxime Bizon .enet0 = { 247e7300d04SMaxime Bizon .has_phy = 1, 248e7300d04SMaxime Bizon .use_internal_phy = 1, 249e7300d04SMaxime Bizon }, 250e7300d04SMaxime Bizon 251e7300d04SMaxime Bizon .enet1 = { 252e7300d04SMaxime Bizon .force_speed_100 = 1, 253e7300d04SMaxime Bizon .force_duplex_full = 1, 254e7300d04SMaxime Bizon }, 255e7300d04SMaxime Bizon 256e7300d04SMaxime Bizon 257e7300d04SMaxime Bizon .has_ohci0 = 1, 258e7300d04SMaxime Bizon .has_pccard = 1, 259e7300d04SMaxime Bizon .has_ehci0 = 1, 260e7300d04SMaxime Bizon 261e7300d04SMaxime Bizon .leds = { 262e7300d04SMaxime Bizon { 263e7300d04SMaxime Bizon .name = "adsl-fail", 264e7300d04SMaxime Bizon .gpio = 2, 265e7300d04SMaxime Bizon .active_low = 1, 266e7300d04SMaxime Bizon }, 267e7300d04SMaxime Bizon { 268e7300d04SMaxime Bizon .name = "ppp", 269e7300d04SMaxime Bizon .gpio = 3, 270e7300d04SMaxime Bizon .active_low = 1, 271e7300d04SMaxime Bizon }, 272e7300d04SMaxime Bizon { 273e7300d04SMaxime Bizon .name = "ppp-fail", 274e7300d04SMaxime Bizon .gpio = 4, 275e7300d04SMaxime Bizon .active_low = 1, 276e7300d04SMaxime Bizon }, 277e7300d04SMaxime Bizon { 278e7300d04SMaxime Bizon .name = "power", 279e7300d04SMaxime Bizon .gpio = 0, 280e7300d04SMaxime Bizon .active_low = 1, 281e7300d04SMaxime Bizon .default_trigger = "default-on", 282e7300d04SMaxime Bizon }, 283e7300d04SMaxime Bizon { 284e7300d04SMaxime Bizon .name = "stop", 285e7300d04SMaxime Bizon .gpio = 1, 286e7300d04SMaxime Bizon .active_low = 1, 287e7300d04SMaxime Bizon }, 288e7300d04SMaxime Bizon }, 289e7300d04SMaxime Bizon }; 290e7300d04SMaxime Bizon 291e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw = { 292e7300d04SMaxime Bizon .name = "96348GW", 293e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 294e7300d04SMaxime Bizon 295e7300d04SMaxime Bizon .has_enet0 = 1, 296e7300d04SMaxime Bizon .has_enet1 = 1, 297e7300d04SMaxime Bizon .has_pci = 1, 298e7300d04SMaxime Bizon 299e7300d04SMaxime Bizon .enet0 = { 300e7300d04SMaxime Bizon .has_phy = 1, 301e7300d04SMaxime Bizon .use_internal_phy = 1, 302e7300d04SMaxime Bizon }, 303e7300d04SMaxime Bizon .enet1 = { 304e7300d04SMaxime Bizon .force_speed_100 = 1, 305e7300d04SMaxime Bizon .force_duplex_full = 1, 306e7300d04SMaxime Bizon }, 307e7300d04SMaxime Bizon 308e7300d04SMaxime Bizon .has_ohci0 = 1, 309e7300d04SMaxime Bizon 310e7300d04SMaxime Bizon .has_dsp = 1, 311e7300d04SMaxime Bizon .dsp = { 312e7300d04SMaxime Bizon .gpio_rst = 6, 313e7300d04SMaxime Bizon .gpio_int = 34, 314e7300d04SMaxime Bizon .ext_irq = 2, 315e7300d04SMaxime Bizon .cs = 2, 316e7300d04SMaxime Bizon }, 317e7300d04SMaxime Bizon 318e7300d04SMaxime Bizon .leds = { 319e7300d04SMaxime Bizon { 320e7300d04SMaxime Bizon .name = "adsl-fail", 321e7300d04SMaxime Bizon .gpio = 2, 322e7300d04SMaxime Bizon .active_low = 1, 323e7300d04SMaxime Bizon }, 324e7300d04SMaxime Bizon { 325e7300d04SMaxime Bizon .name = "ppp", 326e7300d04SMaxime Bizon .gpio = 3, 327e7300d04SMaxime Bizon .active_low = 1, 328e7300d04SMaxime Bizon }, 329e7300d04SMaxime Bizon { 330e7300d04SMaxime Bizon .name = "ppp-fail", 331e7300d04SMaxime Bizon .gpio = 4, 332e7300d04SMaxime Bizon .active_low = 1, 333e7300d04SMaxime Bizon }, 334e7300d04SMaxime Bizon { 335e7300d04SMaxime Bizon .name = "power", 336e7300d04SMaxime Bizon .gpio = 0, 337e7300d04SMaxime Bizon .active_low = 1, 338e7300d04SMaxime Bizon .default_trigger = "default-on", 339e7300d04SMaxime Bizon }, 340e7300d04SMaxime Bizon { 341e7300d04SMaxime Bizon .name = "stop", 342e7300d04SMaxime Bizon .gpio = 1, 343e7300d04SMaxime Bizon .active_low = 1, 344e7300d04SMaxime Bizon }, 345e7300d04SMaxime Bizon }, 346e7300d04SMaxime Bizon }; 347e7300d04SMaxime Bizon 348e7300d04SMaxime Bizon static struct board_info __initdata board_FAST2404 = { 349e7300d04SMaxime Bizon .name = "F@ST2404", 350e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 351e7300d04SMaxime Bizon 352e7300d04SMaxime Bizon .has_enet0 = 1, 353e7300d04SMaxime Bizon .has_enet1 = 1, 354e7300d04SMaxime Bizon .has_pci = 1, 355e7300d04SMaxime Bizon 356e7300d04SMaxime Bizon .enet0 = { 357e7300d04SMaxime Bizon .has_phy = 1, 358e7300d04SMaxime Bizon .use_internal_phy = 1, 359e7300d04SMaxime Bizon }, 360e7300d04SMaxime Bizon 361e7300d04SMaxime Bizon .enet1 = { 362e7300d04SMaxime Bizon .force_speed_100 = 1, 363e7300d04SMaxime Bizon .force_duplex_full = 1, 364e7300d04SMaxime Bizon }, 365e7300d04SMaxime Bizon 366e7300d04SMaxime Bizon .has_ohci0 = 1, 367e7300d04SMaxime Bizon .has_pccard = 1, 368e7300d04SMaxime Bizon .has_ehci0 = 1, 369e7300d04SMaxime Bizon }; 370e7300d04SMaxime Bizon 3712e6ad9a9SFlorian Fainelli static struct board_info __initdata board_rta1025w_16 = { 3722e6ad9a9SFlorian Fainelli .name = "RTA1025W_16", 3732e6ad9a9SFlorian Fainelli .expected_cpu_id = 0x6348, 3742e6ad9a9SFlorian Fainelli 3752e6ad9a9SFlorian Fainelli .has_enet0 = 1, 3762e6ad9a9SFlorian Fainelli .has_enet1 = 1, 3772e6ad9a9SFlorian Fainelli .has_pci = 1, 3782e6ad9a9SFlorian Fainelli 3792e6ad9a9SFlorian Fainelli .enet0 = { 3802e6ad9a9SFlorian Fainelli .has_phy = 1, 3812e6ad9a9SFlorian Fainelli .use_internal_phy = 1, 3822e6ad9a9SFlorian Fainelli }, 3832e6ad9a9SFlorian Fainelli .enet1 = { 3842e6ad9a9SFlorian Fainelli .force_speed_100 = 1, 3852e6ad9a9SFlorian Fainelli .force_duplex_full = 1, 3862e6ad9a9SFlorian Fainelli }, 3872e6ad9a9SFlorian Fainelli }; 3882e6ad9a9SFlorian Fainelli 3892e6ad9a9SFlorian Fainelli 390e7300d04SMaxime Bizon static struct board_info __initdata board_DV201AMR = { 391e7300d04SMaxime Bizon .name = "DV201AMR", 392e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 393e7300d04SMaxime Bizon 394e7300d04SMaxime Bizon .has_pci = 1, 395e7300d04SMaxime Bizon .has_ohci0 = 1, 396e7300d04SMaxime Bizon 397e7300d04SMaxime Bizon .has_enet0 = 1, 398e7300d04SMaxime Bizon .has_enet1 = 1, 399e7300d04SMaxime Bizon .enet0 = { 400e7300d04SMaxime Bizon .has_phy = 1, 401e7300d04SMaxime Bizon .use_internal_phy = 1, 402e7300d04SMaxime Bizon }, 403e7300d04SMaxime Bizon .enet1 = { 404e7300d04SMaxime Bizon .force_speed_100 = 1, 405e7300d04SMaxime Bizon .force_duplex_full = 1, 406e7300d04SMaxime Bizon }, 407e7300d04SMaxime Bizon }; 408e7300d04SMaxime Bizon 409e7300d04SMaxime Bizon static struct board_info __initdata board_96348gw_a = { 410e7300d04SMaxime Bizon .name = "96348GW-A", 411e7300d04SMaxime Bizon .expected_cpu_id = 0x6348, 412e7300d04SMaxime Bizon 413e7300d04SMaxime Bizon .has_enet0 = 1, 414e7300d04SMaxime Bizon .has_enet1 = 1, 415e7300d04SMaxime Bizon .has_pci = 1, 416e7300d04SMaxime Bizon 417e7300d04SMaxime Bizon .enet0 = { 418e7300d04SMaxime Bizon .has_phy = 1, 419e7300d04SMaxime Bizon .use_internal_phy = 1, 420e7300d04SMaxime Bizon }, 421e7300d04SMaxime Bizon .enet1 = { 422e7300d04SMaxime Bizon .force_speed_100 = 1, 423e7300d04SMaxime Bizon .force_duplex_full = 1, 424e7300d04SMaxime Bizon }, 425e7300d04SMaxime Bizon 426e7300d04SMaxime Bizon .has_ohci0 = 1, 427e7300d04SMaxime Bizon }; 428e7300d04SMaxime Bizon #endif 429e7300d04SMaxime Bizon 430e7300d04SMaxime Bizon /* 431e7300d04SMaxime Bizon * known 6358 boards 432e7300d04SMaxime Bizon */ 433e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6358 434e7300d04SMaxime Bizon static struct board_info __initdata board_96358vw = { 435e7300d04SMaxime Bizon .name = "96358VW", 436e7300d04SMaxime Bizon .expected_cpu_id = 0x6358, 437e7300d04SMaxime Bizon 438e7300d04SMaxime Bizon .has_enet0 = 1, 439e7300d04SMaxime Bizon .has_enet1 = 1, 440e7300d04SMaxime Bizon .has_pci = 1, 441e7300d04SMaxime Bizon 442e7300d04SMaxime Bizon .enet0 = { 443e7300d04SMaxime Bizon .has_phy = 1, 444e7300d04SMaxime Bizon .use_internal_phy = 1, 445e7300d04SMaxime Bizon }, 446e7300d04SMaxime Bizon 447e7300d04SMaxime Bizon .enet1 = { 448e7300d04SMaxime Bizon .force_speed_100 = 1, 449e7300d04SMaxime Bizon .force_duplex_full = 1, 450e7300d04SMaxime Bizon }, 451e7300d04SMaxime Bizon 452e7300d04SMaxime Bizon 453e7300d04SMaxime Bizon .has_ohci0 = 1, 454e7300d04SMaxime Bizon .has_pccard = 1, 455e7300d04SMaxime Bizon .has_ehci0 = 1, 456e7300d04SMaxime Bizon 457e7300d04SMaxime Bizon .leds = { 458e7300d04SMaxime Bizon { 459e7300d04SMaxime Bizon .name = "adsl-fail", 460e7300d04SMaxime Bizon .gpio = 15, 461e7300d04SMaxime Bizon .active_low = 1, 462e7300d04SMaxime Bizon }, 463e7300d04SMaxime Bizon { 464e7300d04SMaxime Bizon .name = "ppp", 465e7300d04SMaxime Bizon .gpio = 22, 466e7300d04SMaxime Bizon .active_low = 1, 467e7300d04SMaxime Bizon }, 468e7300d04SMaxime Bizon { 469e7300d04SMaxime Bizon .name = "ppp-fail", 470e7300d04SMaxime Bizon .gpio = 23, 471e7300d04SMaxime Bizon .active_low = 1, 472e7300d04SMaxime Bizon }, 473e7300d04SMaxime Bizon { 474e7300d04SMaxime Bizon .name = "power", 475e7300d04SMaxime Bizon .gpio = 4, 476e7300d04SMaxime Bizon .default_trigger = "default-on", 477e7300d04SMaxime Bizon }, 478e7300d04SMaxime Bizon { 479e7300d04SMaxime Bizon .name = "stop", 480e7300d04SMaxime Bizon .gpio = 5, 481e7300d04SMaxime Bizon }, 482e7300d04SMaxime Bizon }, 483e7300d04SMaxime Bizon }; 484e7300d04SMaxime Bizon 485e7300d04SMaxime Bizon static struct board_info __initdata board_96358vw2 = { 486e7300d04SMaxime Bizon .name = "96358VW2", 487e7300d04SMaxime Bizon .expected_cpu_id = 0x6358, 488e7300d04SMaxime Bizon 489e7300d04SMaxime Bizon .has_enet0 = 1, 490e7300d04SMaxime Bizon .has_enet1 = 1, 491e7300d04SMaxime Bizon .has_pci = 1, 492e7300d04SMaxime Bizon 493e7300d04SMaxime Bizon .enet0 = { 494e7300d04SMaxime Bizon .has_phy = 1, 495e7300d04SMaxime Bizon .use_internal_phy = 1, 496e7300d04SMaxime Bizon }, 497e7300d04SMaxime Bizon 498e7300d04SMaxime Bizon .enet1 = { 499e7300d04SMaxime Bizon .force_speed_100 = 1, 500e7300d04SMaxime Bizon .force_duplex_full = 1, 501e7300d04SMaxime Bizon }, 502e7300d04SMaxime Bizon 503e7300d04SMaxime Bizon 504e7300d04SMaxime Bizon .has_ohci0 = 1, 505e7300d04SMaxime Bizon .has_pccard = 1, 506e7300d04SMaxime Bizon .has_ehci0 = 1, 507e7300d04SMaxime Bizon 508e7300d04SMaxime Bizon .leds = { 509e7300d04SMaxime Bizon { 510e7300d04SMaxime Bizon .name = "adsl", 511e7300d04SMaxime Bizon .gpio = 22, 512e7300d04SMaxime Bizon .active_low = 1, 513e7300d04SMaxime Bizon }, 514e7300d04SMaxime Bizon { 515e7300d04SMaxime Bizon .name = "ppp-fail", 516e7300d04SMaxime Bizon .gpio = 23, 517e7300d04SMaxime Bizon }, 518e7300d04SMaxime Bizon { 519e7300d04SMaxime Bizon .name = "power", 520e7300d04SMaxime Bizon .gpio = 5, 521e7300d04SMaxime Bizon .active_low = 1, 522e7300d04SMaxime Bizon .default_trigger = "default-on", 523e7300d04SMaxime Bizon }, 524e7300d04SMaxime Bizon { 525e7300d04SMaxime Bizon .name = "stop", 526e7300d04SMaxime Bizon .gpio = 4, 527e7300d04SMaxime Bizon .active_low = 1, 528e7300d04SMaxime Bizon }, 529e7300d04SMaxime Bizon }, 530e7300d04SMaxime Bizon }; 531e7300d04SMaxime Bizon 532e7300d04SMaxime Bizon static struct board_info __initdata board_AGPFS0 = { 533e7300d04SMaxime Bizon .name = "AGPF-S0", 534e7300d04SMaxime Bizon .expected_cpu_id = 0x6358, 535e7300d04SMaxime Bizon 536e7300d04SMaxime Bizon .has_enet0 = 1, 537e7300d04SMaxime Bizon .has_enet1 = 1, 538e7300d04SMaxime Bizon .has_pci = 1, 539e7300d04SMaxime Bizon 540e7300d04SMaxime Bizon .enet0 = { 541e7300d04SMaxime Bizon .has_phy = 1, 542e7300d04SMaxime Bizon .use_internal_phy = 1, 543e7300d04SMaxime Bizon }, 544e7300d04SMaxime Bizon 545e7300d04SMaxime Bizon .enet1 = { 546e7300d04SMaxime Bizon .force_speed_100 = 1, 547e7300d04SMaxime Bizon .force_duplex_full = 1, 548e7300d04SMaxime Bizon }, 549e7300d04SMaxime Bizon 550e7300d04SMaxime Bizon .has_ohci0 = 1, 551e7300d04SMaxime Bizon .has_ehci0 = 1, 552e7300d04SMaxime Bizon }; 553e7300d04SMaxime Bizon #endif 554e7300d04SMaxime Bizon 555e7300d04SMaxime Bizon /* 556e7300d04SMaxime Bizon * all boards 557e7300d04SMaxime Bizon */ 558e7300d04SMaxime Bizon static const struct board_info __initdata *bcm963xx_boards[] = { 559e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6338 560e7300d04SMaxime Bizon &board_96338gw, 561e7300d04SMaxime Bizon &board_96338w, 562e7300d04SMaxime Bizon #endif 563e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6345 564e7300d04SMaxime Bizon &board_96345gw2, 565e7300d04SMaxime Bizon #endif 566e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6348 567e7300d04SMaxime Bizon &board_96348r, 568e7300d04SMaxime Bizon &board_96348gw, 569e7300d04SMaxime Bizon &board_96348gw_10, 570e7300d04SMaxime Bizon &board_96348gw_11, 571e7300d04SMaxime Bizon &board_FAST2404, 572e7300d04SMaxime Bizon &board_DV201AMR, 573e7300d04SMaxime Bizon &board_96348gw_a, 5742e6ad9a9SFlorian Fainelli &board_rta1025w_16, 575e7300d04SMaxime Bizon #endif 576e7300d04SMaxime Bizon 577e7300d04SMaxime Bizon #ifdef CONFIG_BCM63XX_CPU_6358 578e7300d04SMaxime Bizon &board_96358vw, 579e7300d04SMaxime Bizon &board_96358vw2, 580e7300d04SMaxime Bizon &board_AGPFS0, 581e7300d04SMaxime Bizon #endif 582e7300d04SMaxime Bizon }; 583e7300d04SMaxime Bizon 584e7300d04SMaxime Bizon /* 585e7300d04SMaxime Bizon * early init callback, read nvram data from flash and checksum it 586e7300d04SMaxime Bizon */ 587e7300d04SMaxime Bizon void __init board_prom_init(void) 588e7300d04SMaxime Bizon { 589e7300d04SMaxime Bizon unsigned int check_len, i; 590e7300d04SMaxime Bizon u8 *boot_addr, *cfe, *p; 591e7300d04SMaxime Bizon char cfe_version[32]; 592e7300d04SMaxime Bizon u32 val; 593e7300d04SMaxime Bizon 594e7300d04SMaxime Bizon /* read base address of boot chip select (0) 595e7300d04SMaxime Bizon * 6345 does not have MPI but boots from standard 596e7300d04SMaxime Bizon * MIPS Flash address */ 597e7300d04SMaxime Bizon if (BCMCPU_IS_6345()) 598e7300d04SMaxime Bizon val = 0x1fc00000; 599e7300d04SMaxime Bizon else { 600e7300d04SMaxime Bizon val = bcm_mpi_readl(MPI_CSBASE_REG(0)); 601e7300d04SMaxime Bizon val &= MPI_CSBASE_BASE_MASK; 602e7300d04SMaxime Bizon } 603e7300d04SMaxime Bizon boot_addr = (u8 *)KSEG1ADDR(val); 604e7300d04SMaxime Bizon 605e7300d04SMaxime Bizon /* dump cfe version */ 606e7300d04SMaxime Bizon cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; 607e7300d04SMaxime Bizon if (!memcmp(cfe, "cfe-v", 5)) 608e7300d04SMaxime Bizon snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u", 609e7300d04SMaxime Bizon cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]); 610e7300d04SMaxime Bizon else 611e7300d04SMaxime Bizon strcpy(cfe_version, "unknown"); 612e7300d04SMaxime Bizon printk(KERN_INFO PFX "CFE version: %s\n", cfe_version); 613e7300d04SMaxime Bizon 614e7300d04SMaxime Bizon /* extract nvram data */ 615e7300d04SMaxime Bizon memcpy(&nvram, boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram)); 616e7300d04SMaxime Bizon 617e7300d04SMaxime Bizon /* check checksum before using data */ 618e7300d04SMaxime Bizon if (nvram.version <= 4) 619e7300d04SMaxime Bizon check_len = offsetof(struct bcm963xx_nvram, checksum_old); 620e7300d04SMaxime Bizon else 621e7300d04SMaxime Bizon check_len = sizeof(nvram); 622e7300d04SMaxime Bizon val = 0; 623e7300d04SMaxime Bizon p = (u8 *)&nvram; 624e7300d04SMaxime Bizon while (check_len--) 625e7300d04SMaxime Bizon val += *p; 626e7300d04SMaxime Bizon if (val) { 627e7300d04SMaxime Bizon printk(KERN_ERR PFX "invalid nvram checksum\n"); 628e7300d04SMaxime Bizon return; 629e7300d04SMaxime Bizon } 630e7300d04SMaxime Bizon 631e7300d04SMaxime Bizon /* find board by name */ 632e7300d04SMaxime Bizon for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) { 633e7300d04SMaxime Bizon if (strncmp(nvram.name, bcm963xx_boards[i]->name, 634e7300d04SMaxime Bizon sizeof(nvram.name))) 635e7300d04SMaxime Bizon continue; 636e7300d04SMaxime Bizon /* copy, board desc array is marked initdata */ 637e7300d04SMaxime Bizon memcpy(&board, bcm963xx_boards[i], sizeof(board)); 638e7300d04SMaxime Bizon break; 639e7300d04SMaxime Bizon } 640e7300d04SMaxime Bizon 641e7300d04SMaxime Bizon /* bail out if board is not found, will complain later */ 642e7300d04SMaxime Bizon if (!board.name[0]) { 643e7300d04SMaxime Bizon char name[17]; 644e7300d04SMaxime Bizon memcpy(name, nvram.name, 16); 645e7300d04SMaxime Bizon name[16] = 0; 646e7300d04SMaxime Bizon printk(KERN_ERR PFX "unknown bcm963xx board: %s\n", 647e7300d04SMaxime Bizon name); 648e7300d04SMaxime Bizon return; 649e7300d04SMaxime Bizon } 650e7300d04SMaxime Bizon 651e7300d04SMaxime Bizon /* setup pin multiplexing depending on board enabled device, 652e7300d04SMaxime Bizon * this has to be done this early since PCI init is done 653e7300d04SMaxime Bizon * inside arch_initcall */ 654e7300d04SMaxime Bizon val = 0; 655e7300d04SMaxime Bizon 656e7300d04SMaxime Bizon #ifdef CONFIG_PCI 657e7300d04SMaxime Bizon if (board.has_pci) { 658e7300d04SMaxime Bizon bcm63xx_pci_enabled = 1; 659e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 660e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G2_PCI; 661e7300d04SMaxime Bizon } 662e7300d04SMaxime Bizon #endif 663e7300d04SMaxime Bizon 664e7300d04SMaxime Bizon if (board.has_pccard) { 665e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 666e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G1_MII_PCCARD; 667e7300d04SMaxime Bizon } 668e7300d04SMaxime Bizon 669e7300d04SMaxime Bizon if (board.has_enet0 && !board.enet0.use_internal_phy) { 670e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 671e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G3_EXT_MII | 672e7300d04SMaxime Bizon GPIO_MODE_6348_G0_EXT_MII; 673e7300d04SMaxime Bizon } 674e7300d04SMaxime Bizon 675e7300d04SMaxime Bizon if (board.has_enet1 && !board.enet1.use_internal_phy) { 676e7300d04SMaxime Bizon if (BCMCPU_IS_6348()) 677e7300d04SMaxime Bizon val |= GPIO_MODE_6348_G3_EXT_MII | 678e7300d04SMaxime Bizon GPIO_MODE_6348_G0_EXT_MII; 679e7300d04SMaxime Bizon } 680e7300d04SMaxime Bizon 681e7300d04SMaxime Bizon bcm_gpio_writel(val, GPIO_MODE_REG); 682e7300d04SMaxime Bizon } 683e7300d04SMaxime Bizon 684e7300d04SMaxime Bizon /* 685e7300d04SMaxime Bizon * second stage init callback, good time to panic if we couldn't 686e7300d04SMaxime Bizon * identify on which board we're running since early printk is working 687e7300d04SMaxime Bizon */ 688e7300d04SMaxime Bizon void __init board_setup(void) 689e7300d04SMaxime Bizon { 690e7300d04SMaxime Bizon if (!board.name[0]) 691e7300d04SMaxime Bizon panic("unable to detect bcm963xx board"); 692e7300d04SMaxime Bizon printk(KERN_INFO PFX "board name: %s\n", board.name); 693e7300d04SMaxime Bizon 694e7300d04SMaxime Bizon /* make sure we're running on expected cpu */ 695e7300d04SMaxime Bizon if (bcm63xx_get_cpu_id() != board.expected_cpu_id) 696e7300d04SMaxime Bizon panic("unexpected CPU for bcm963xx board"); 697e7300d04SMaxime Bizon } 698e7300d04SMaxime Bizon 699e7300d04SMaxime Bizon /* 700e7300d04SMaxime Bizon * return board name for /proc/cpuinfo 701e7300d04SMaxime Bizon */ 702e7300d04SMaxime Bizon const char *board_get_name(void) 703e7300d04SMaxime Bizon { 704e7300d04SMaxime Bizon return board.name; 705e7300d04SMaxime Bizon } 706e7300d04SMaxime Bizon 707e7300d04SMaxime Bizon /* 708e7300d04SMaxime Bizon * register & return a new board mac address 709e7300d04SMaxime Bizon */ 710e7300d04SMaxime Bizon static int board_get_mac_address(u8 *mac) 711e7300d04SMaxime Bizon { 712e7300d04SMaxime Bizon u8 *p; 713e7300d04SMaxime Bizon int count; 714e7300d04SMaxime Bizon 715e7300d04SMaxime Bizon if (mac_addr_used >= nvram.mac_addr_count) { 716e7300d04SMaxime Bizon printk(KERN_ERR PFX "not enough mac address\n"); 717e7300d04SMaxime Bizon return -ENODEV; 718e7300d04SMaxime Bizon } 719e7300d04SMaxime Bizon 720e7300d04SMaxime Bizon memcpy(mac, nvram.mac_addr_base, ETH_ALEN); 721e7300d04SMaxime Bizon p = mac + ETH_ALEN - 1; 722e7300d04SMaxime Bizon count = mac_addr_used; 723e7300d04SMaxime Bizon 724e7300d04SMaxime Bizon while (count--) { 725e7300d04SMaxime Bizon do { 726e7300d04SMaxime Bizon (*p)++; 727e7300d04SMaxime Bizon if (*p != 0) 728e7300d04SMaxime Bizon break; 729e7300d04SMaxime Bizon p--; 730e7300d04SMaxime Bizon } while (p != mac); 731e7300d04SMaxime Bizon } 732e7300d04SMaxime Bizon 733e7300d04SMaxime Bizon if (p == mac) { 734e7300d04SMaxime Bizon printk(KERN_ERR PFX "unable to fetch mac address\n"); 735e7300d04SMaxime Bizon return -ENODEV; 736e7300d04SMaxime Bizon } 737e7300d04SMaxime Bizon 738e7300d04SMaxime Bizon mac_addr_used++; 739e7300d04SMaxime Bizon return 0; 740e7300d04SMaxime Bizon } 741e7300d04SMaxime Bizon 742e7300d04SMaxime Bizon static struct mtd_partition mtd_partitions[] = { 743e7300d04SMaxime Bizon { 744e7300d04SMaxime Bizon .name = "cfe", 745e7300d04SMaxime Bizon .offset = 0x0, 746e7300d04SMaxime Bizon .size = 0x40000, 747e7300d04SMaxime Bizon } 748e7300d04SMaxime Bizon }; 749e7300d04SMaxime Bizon 750e7300d04SMaxime Bizon static struct physmap_flash_data flash_data = { 751e7300d04SMaxime Bizon .width = 2, 752e7300d04SMaxime Bizon .nr_parts = ARRAY_SIZE(mtd_partitions), 753e7300d04SMaxime Bizon .parts = mtd_partitions, 754e7300d04SMaxime Bizon }; 755e7300d04SMaxime Bizon 756e7300d04SMaxime Bizon static struct resource mtd_resources[] = { 757e7300d04SMaxime Bizon { 758e7300d04SMaxime Bizon .start = 0, /* filled at runtime */ 759e7300d04SMaxime Bizon .end = 0, /* filled at runtime */ 760e7300d04SMaxime Bizon .flags = IORESOURCE_MEM, 761e7300d04SMaxime Bizon } 762e7300d04SMaxime Bizon }; 763e7300d04SMaxime Bizon 764e7300d04SMaxime Bizon static struct platform_device mtd_dev = { 765e7300d04SMaxime Bizon .name = "physmap-flash", 766e7300d04SMaxime Bizon .resource = mtd_resources, 767e7300d04SMaxime Bizon .num_resources = ARRAY_SIZE(mtd_resources), 768e7300d04SMaxime Bizon .dev = { 769e7300d04SMaxime Bizon .platform_data = &flash_data, 770e7300d04SMaxime Bizon }, 771e7300d04SMaxime Bizon }; 772e7300d04SMaxime Bizon 773e7300d04SMaxime Bizon /* 774e7300d04SMaxime Bizon * Register a sane SPROMv2 to make the on-board 775e7300d04SMaxime Bizon * bcm4318 WLAN work 776e7300d04SMaxime Bizon */ 777e7300d04SMaxime Bizon #ifdef CONFIG_SSB_PCIHOST 778e7300d04SMaxime Bizon static struct ssb_sprom bcm63xx_sprom = { 779e7300d04SMaxime Bizon .revision = 0x02, 780e7300d04SMaxime Bizon .board_rev = 0x17, 781e7300d04SMaxime Bizon .country_code = 0x0, 782e7300d04SMaxime Bizon .ant_available_bg = 0x3, 783e7300d04SMaxime Bizon .pa0b0 = 0x15ae, 784e7300d04SMaxime Bizon .pa0b1 = 0xfa85, 785e7300d04SMaxime Bizon .pa0b2 = 0xfe8d, 786e7300d04SMaxime Bizon .pa1b0 = 0xffff, 787e7300d04SMaxime Bizon .pa1b1 = 0xffff, 788e7300d04SMaxime Bizon .pa1b2 = 0xffff, 789e7300d04SMaxime Bizon .gpio0 = 0xff, 790e7300d04SMaxime Bizon .gpio1 = 0xff, 791e7300d04SMaxime Bizon .gpio2 = 0xff, 792e7300d04SMaxime Bizon .gpio3 = 0xff, 793e7300d04SMaxime Bizon .maxpwr_bg = 0x004c, 794e7300d04SMaxime Bizon .itssi_bg = 0x00, 795e7300d04SMaxime Bizon .boardflags_lo = 0x2848, 796e7300d04SMaxime Bizon .boardflags_hi = 0x0000, 797e7300d04SMaxime Bizon }; 798e7300d04SMaxime Bizon #endif 799e7300d04SMaxime Bizon 800e7300d04SMaxime Bizon static struct gpio_led_platform_data bcm63xx_led_data; 801e7300d04SMaxime Bizon 802e7300d04SMaxime Bizon static struct platform_device bcm63xx_gpio_leds = { 803e7300d04SMaxime Bizon .name = "leds-gpio", 804e7300d04SMaxime Bizon .id = 0, 805e7300d04SMaxime Bizon .dev.platform_data = &bcm63xx_led_data, 806e7300d04SMaxime Bizon }; 807e7300d04SMaxime Bizon 808e7300d04SMaxime Bizon /* 809e7300d04SMaxime Bizon * third stage init callback, register all board devices. 810e7300d04SMaxime Bizon */ 811e7300d04SMaxime Bizon int __init board_register_devices(void) 812e7300d04SMaxime Bizon { 813e7300d04SMaxime Bizon u32 val; 814e7300d04SMaxime Bizon 815553d6d5fSMaxime Bizon if (board.has_pccard) 816553d6d5fSMaxime Bizon bcm63xx_pcmcia_register(); 817553d6d5fSMaxime Bizon 818e7300d04SMaxime Bizon if (board.has_enet0 && 819e7300d04SMaxime Bizon !board_get_mac_address(board.enet0.mac_addr)) 820e7300d04SMaxime Bizon bcm63xx_enet_register(0, &board.enet0); 821e7300d04SMaxime Bizon 822e7300d04SMaxime Bizon if (board.has_enet1 && 823e7300d04SMaxime Bizon !board_get_mac_address(board.enet1.mac_addr)) 824e7300d04SMaxime Bizon bcm63xx_enet_register(1, &board.enet1); 825e7300d04SMaxime Bizon 826e7300d04SMaxime Bizon if (board.has_dsp) 827e7300d04SMaxime Bizon bcm63xx_dsp_register(&board.dsp); 828e7300d04SMaxime Bizon 829e7300d04SMaxime Bizon /* Generate MAC address for WLAN and 830e7300d04SMaxime Bizon * register our SPROM */ 831e7300d04SMaxime Bizon #ifdef CONFIG_SSB_PCIHOST 832e7300d04SMaxime Bizon if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { 833e7300d04SMaxime Bizon memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); 834e7300d04SMaxime Bizon memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); 835e7300d04SMaxime Bizon if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0) 836e7300d04SMaxime Bizon printk(KERN_ERR "failed to register fallback SPROM\n"); 837e7300d04SMaxime Bizon } 838e7300d04SMaxime Bizon #endif 839e7300d04SMaxime Bizon 840e7300d04SMaxime Bizon /* read base address of boot chip select (0) */ 841e7300d04SMaxime Bizon if (BCMCPU_IS_6345()) 842e7300d04SMaxime Bizon val = 0x1fc00000; 843e7300d04SMaxime Bizon else { 844e7300d04SMaxime Bizon val = bcm_mpi_readl(MPI_CSBASE_REG(0)); 845e7300d04SMaxime Bizon val &= MPI_CSBASE_BASE_MASK; 846e7300d04SMaxime Bizon } 847e7300d04SMaxime Bizon mtd_resources[0].start = val; 848e7300d04SMaxime Bizon mtd_resources[0].end = 0x1FFFFFFF; 849e7300d04SMaxime Bizon 850e7300d04SMaxime Bizon platform_device_register(&mtd_dev); 851e7300d04SMaxime Bizon 852e7300d04SMaxime Bizon bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); 853e7300d04SMaxime Bizon bcm63xx_led_data.leds = board.leds; 854e7300d04SMaxime Bizon 855e7300d04SMaxime Bizon platform_device_register(&bcm63xx_gpio_leds); 856e7300d04SMaxime Bizon 857e7300d04SMaxime Bizon return 0; 858e7300d04SMaxime Bizon } 859