1 /* 2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> 3 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> 4 * Copyright (C) 2006 Michael Buesch <m@bues.ch> 5 * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org> 6 * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de> 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 * 24 * You should have received a copy of the GNU General Public License along 25 * with this program; if not, write to the Free Software Foundation, Inc., 26 * 675 Mass Ave, Cambridge, MA 02139, USA. 27 */ 28 29 #include "bcm47xx_private.h" 30 31 #include <linux/export.h> 32 #include <linux/types.h> 33 #include <linux/ethtool.h> 34 #include <linux/phy.h> 35 #include <linux/phy_fixed.h> 36 #include <linux/ssb/ssb.h> 37 #include <linux/ssb/ssb_embedded.h> 38 #include <linux/bcma/bcma_soc.h> 39 #include <asm/bootinfo.h> 40 #include <asm/idle.h> 41 #include <asm/prom.h> 42 #include <asm/reboot.h> 43 #include <asm/time.h> 44 #include <bcm47xx.h> 45 #include <bcm47xx_nvram.h> 46 #include <bcm47xx_board.h> 47 48 union bcm47xx_bus bcm47xx_bus; 49 EXPORT_SYMBOL(bcm47xx_bus); 50 51 enum bcm47xx_bus_type bcm47xx_bus_type; 52 EXPORT_SYMBOL(bcm47xx_bus_type); 53 54 static void bcm47xx_machine_restart(char *command) 55 { 56 printk(KERN_ALERT "Please stand by while rebooting the system...\n"); 57 local_irq_disable(); 58 /* Set the watchdog timer to reset immediately */ 59 switch (bcm47xx_bus_type) { 60 #ifdef CONFIG_BCM47XX_SSB 61 case BCM47XX_BUS_TYPE_SSB: 62 if (bcm47xx_bus.ssb.chip_id == 0x4785) 63 write_c0_diag4(1 << 22); 64 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1); 65 if (bcm47xx_bus.ssb.chip_id == 0x4785) { 66 __asm__ __volatile__( 67 ".set\tmips3\n\t" 68 "sync\n\t" 69 "wait\n\t" 70 ".set\tmips0"); 71 } 72 break; 73 #endif 74 #ifdef CONFIG_BCM47XX_BCMA 75 case BCM47XX_BUS_TYPE_BCMA: 76 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1); 77 break; 78 #endif 79 } 80 while (1) 81 cpu_relax(); 82 } 83 84 static void bcm47xx_machine_halt(void) 85 { 86 /* Disable interrupts and watchdog and spin forever */ 87 local_irq_disable(); 88 switch (bcm47xx_bus_type) { 89 #ifdef CONFIG_BCM47XX_SSB 90 case BCM47XX_BUS_TYPE_SSB: 91 ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0); 92 break; 93 #endif 94 #ifdef CONFIG_BCM47XX_BCMA 95 case BCM47XX_BUS_TYPE_BCMA: 96 bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0); 97 break; 98 #endif 99 } 100 while (1) 101 cpu_relax(); 102 } 103 104 #ifdef CONFIG_BCM47XX_SSB 105 static int bcm47xx_get_invariants(struct ssb_bus *bus, 106 struct ssb_init_invariants *iv) 107 { 108 char buf[20]; 109 110 /* Fill boardinfo structure */ 111 memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo)); 112 113 bcm47xx_fill_ssb_boardinfo(&iv->boardinfo, NULL); 114 115 memset(&iv->sprom, 0, sizeof(struct ssb_sprom)); 116 bcm47xx_fill_sprom(&iv->sprom, NULL, false); 117 118 if (bcm47xx_nvram_getenv("cardbus", buf, sizeof(buf)) >= 0) 119 iv->has_cardbus_slot = !!simple_strtoul(buf, NULL, 10); 120 121 return 0; 122 } 123 124 static void __init bcm47xx_register_ssb(void) 125 { 126 int err; 127 char buf[100]; 128 struct ssb_mipscore *mcore; 129 130 err = ssb_bus_ssbbus_register(&(bcm47xx_bus.ssb), SSB_ENUM_BASE, 131 bcm47xx_get_invariants); 132 if (err) 133 panic("Failed to initialize SSB bus (err %d)", err); 134 135 mcore = &bcm47xx_bus.ssb.mipscore; 136 if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) { 137 if (strstr(buf, "console=ttyS1")) { 138 struct ssb_serial_port port; 139 140 printk(KERN_DEBUG "Swapping serial ports!\n"); 141 /* swap serial ports */ 142 memcpy(&port, &mcore->serial_ports[0], sizeof(port)); 143 memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], 144 sizeof(port)); 145 memcpy(&mcore->serial_ports[1], &port, sizeof(port)); 146 } 147 } 148 } 149 #endif 150 151 #ifdef CONFIG_BCM47XX_BCMA 152 static void __init bcm47xx_register_bcma(void) 153 { 154 int err; 155 156 err = bcma_host_soc_register(&bcm47xx_bus.bcma); 157 if (err) 158 panic("Failed to register BCMA bus (err %d)", err); 159 } 160 #endif 161 162 /* 163 * Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed 164 * to detect memory and record it with add_memory_region. 165 * Any extra initializaion performed here must not use kmalloc or bootmem. 166 */ 167 void __init plat_mem_setup(void) 168 { 169 struct cpuinfo_mips *c = ¤t_cpu_data; 170 171 if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) { 172 printk(KERN_INFO "bcm47xx: using bcma bus\n"); 173 #ifdef CONFIG_BCM47XX_BCMA 174 bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA; 175 bcm47xx_sprom_register_fallbacks(); 176 bcm47xx_register_bcma(); 177 bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id); 178 #ifdef CONFIG_HIGHMEM 179 bcm47xx_prom_highmem_init(); 180 #endif 181 #endif 182 } else { 183 printk(KERN_INFO "bcm47xx: using ssb bus\n"); 184 #ifdef CONFIG_BCM47XX_SSB 185 bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB; 186 bcm47xx_sprom_register_fallbacks(); 187 bcm47xx_register_ssb(); 188 bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id); 189 #endif 190 } 191 192 _machine_restart = bcm47xx_machine_restart; 193 _machine_halt = bcm47xx_machine_halt; 194 pm_power_off = bcm47xx_machine_halt; 195 } 196 197 /* 198 * This finishes bus initialization doing things that were not possible without 199 * kmalloc. Make sure to call it late enough (after mm_init). 200 */ 201 void __init bcm47xx_bus_setup(void) 202 { 203 #ifdef CONFIG_BCM47XX_BCMA 204 if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) { 205 int err; 206 207 err = bcma_host_soc_init(&bcm47xx_bus.bcma); 208 if (err) 209 panic("Failed to initialize BCMA bus (err %d)", err); 210 211 bcm47xx_fill_bcma_boardinfo(&bcm47xx_bus.bcma.bus.boardinfo, 212 NULL); 213 } 214 #endif 215 216 /* With bus initialized we can access NVRAM and detect the board */ 217 bcm47xx_board_detect(); 218 mips_set_machine_name(bcm47xx_board_get_name()); 219 } 220 221 static int __init bcm47xx_cpu_fixes(void) 222 { 223 switch (bcm47xx_bus_type) { 224 #ifdef CONFIG_BCM47XX_SSB 225 case BCM47XX_BUS_TYPE_SSB: 226 /* Nothing to do */ 227 break; 228 #endif 229 #ifdef CONFIG_BCM47XX_BCMA 230 case BCM47XX_BUS_TYPE_BCMA: 231 /* The BCM4706 has a problem with the CPU wait instruction. 232 * When r4k_wait or r4k_wait_irqoff is used will just hang and 233 * not return from a msleep(). Removing the cpu_wait 234 * functionality is a workaround for this problem. The BCM4716 235 * does not have this problem. 236 */ 237 if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706) 238 cpu_wait = NULL; 239 break; 240 #endif 241 } 242 return 0; 243 } 244 arch_initcall(bcm47xx_cpu_fixes); 245 246 static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = { 247 .link = 1, 248 .speed = SPEED_100, 249 .duplex = DUPLEX_FULL, 250 }; 251 252 static int __init bcm47xx_register_bus_complete(void) 253 { 254 switch (bcm47xx_bus_type) { 255 #ifdef CONFIG_BCM47XX_SSB 256 case BCM47XX_BUS_TYPE_SSB: 257 /* Nothing to do */ 258 break; 259 #endif 260 #ifdef CONFIG_BCM47XX_BCMA 261 case BCM47XX_BUS_TYPE_BCMA: 262 bcma_bus_register(&bcm47xx_bus.bcma.bus); 263 break; 264 #endif 265 } 266 bcm47xx_buttons_register(); 267 bcm47xx_leds_register(); 268 bcm47xx_workarounds(); 269 270 fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status); 271 return 0; 272 } 273 device_initcall(bcm47xx_register_bus_complete); 274