xref: /openbmc/linux/arch/mips/bcm47xx/setup.c (revision a06c488d)
1 /*
2  *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3  *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4  *  Copyright (C) 2006 Michael Buesch <m@bues.ch>
5  *  Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6  *  Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
7  *
8  *  This program is free software; you can redistribute  it and/or modify it
9  *  under  the terms of  the GNU General  Public License as published by the
10  *  Free Software Foundation;  either version 2 of the  License, or (at your
11  *  option) any later version.
12  *
13  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
14  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
15  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
16  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
17  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
19  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
21  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23  *
24  *  You should have received a copy of the  GNU General Public License along
25  *  with this program; if not, write  to the Free Software Foundation, Inc.,
26  *  675 Mass Ave, Cambridge, MA 02139, USA.
27  */
28 
29 #include "bcm47xx_private.h"
30 
31 #include <linux/export.h>
32 #include <linux/types.h>
33 #include <linux/ethtool.h>
34 #include <linux/phy.h>
35 #include <linux/phy_fixed.h>
36 #include <linux/ssb/ssb.h>
37 #include <linux/ssb/ssb_embedded.h>
38 #include <linux/bcma/bcma_soc.h>
39 #include <asm/bootinfo.h>
40 #include <asm/idle.h>
41 #include <asm/prom.h>
42 #include <asm/reboot.h>
43 #include <asm/time.h>
44 #include <bcm47xx.h>
45 #include <bcm47xx_board.h>
46 
47 union bcm47xx_bus bcm47xx_bus;
48 EXPORT_SYMBOL(bcm47xx_bus);
49 
50 enum bcm47xx_bus_type bcm47xx_bus_type;
51 EXPORT_SYMBOL(bcm47xx_bus_type);
52 
53 static void bcm47xx_machine_restart(char *command)
54 {
55 	pr_alert("Please stand by while rebooting the system...\n");
56 	local_irq_disable();
57 	/* Set the watchdog timer to reset immediately */
58 	switch (bcm47xx_bus_type) {
59 #ifdef CONFIG_BCM47XX_SSB
60 	case BCM47XX_BUS_TYPE_SSB:
61 		if (bcm47xx_bus.ssb.chip_id == 0x4785)
62 			write_c0_diag4(1 << 22);
63 		ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
64 		if (bcm47xx_bus.ssb.chip_id == 0x4785) {
65 			__asm__ __volatile__(
66 				".set\tmips3\n\t"
67 				"sync\n\t"
68 				"wait\n\t"
69 				".set\tmips0");
70 		}
71 		break;
72 #endif
73 #ifdef CONFIG_BCM47XX_BCMA
74 	case BCM47XX_BUS_TYPE_BCMA:
75 		bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
76 		break;
77 #endif
78 	}
79 	while (1)
80 		cpu_relax();
81 }
82 
83 static void bcm47xx_machine_halt(void)
84 {
85 	/* Disable interrupts and watchdog and spin forever */
86 	local_irq_disable();
87 	switch (bcm47xx_bus_type) {
88 #ifdef CONFIG_BCM47XX_SSB
89 	case BCM47XX_BUS_TYPE_SSB:
90 		ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 0);
91 		break;
92 #endif
93 #ifdef CONFIG_BCM47XX_BCMA
94 	case BCM47XX_BUS_TYPE_BCMA:
95 		bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 0);
96 		break;
97 #endif
98 	}
99 	while (1)
100 		cpu_relax();
101 }
102 
103 #ifdef CONFIG_BCM47XX_SSB
104 static void __init bcm47xx_register_ssb(void)
105 {
106 	int err;
107 	char buf[100];
108 	struct ssb_mipscore *mcore;
109 
110 	err = ssb_bus_host_soc_register(&bcm47xx_bus.ssb, SSB_ENUM_BASE);
111 	if (err)
112 		panic("Failed to initialize SSB bus (err %d)", err);
113 
114 	mcore = &bcm47xx_bus.ssb.mipscore;
115 	if (bcm47xx_nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
116 		if (strstr(buf, "console=ttyS1")) {
117 			struct ssb_serial_port port;
118 
119 			pr_debug("Swapping serial ports!\n");
120 			/* swap serial ports */
121 			memcpy(&port, &mcore->serial_ports[0], sizeof(port));
122 			memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
123 			       sizeof(port));
124 			memcpy(&mcore->serial_ports[1], &port, sizeof(port));
125 		}
126 	}
127 }
128 #endif
129 
130 #ifdef CONFIG_BCM47XX_BCMA
131 static void __init bcm47xx_register_bcma(void)
132 {
133 	int err;
134 
135 	err = bcma_host_soc_register(&bcm47xx_bus.bcma);
136 	if (err)
137 		panic("Failed to register BCMA bus (err %d)", err);
138 }
139 #endif
140 
141 /*
142  * Memory setup is done in the early part of MIPS's arch_mem_init. It's supposed
143  * to detect memory and record it with add_memory_region.
144  * Any extra initializaion performed here must not use kmalloc or bootmem.
145  */
146 void __init plat_mem_setup(void)
147 {
148 	struct cpuinfo_mips *c = &current_cpu_data;
149 
150 	if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K)) {
151 		pr_info("Using bcma bus\n");
152 #ifdef CONFIG_BCM47XX_BCMA
153 		bcm47xx_bus_type = BCM47XX_BUS_TYPE_BCMA;
154 		bcm47xx_sprom_register_fallbacks();
155 		bcm47xx_register_bcma();
156 		bcm47xx_set_system_type(bcm47xx_bus.bcma.bus.chipinfo.id);
157 #ifdef CONFIG_HIGHMEM
158 		bcm47xx_prom_highmem_init();
159 #endif
160 #endif
161 	} else {
162 		pr_info("Using ssb bus\n");
163 #ifdef CONFIG_BCM47XX_SSB
164 		bcm47xx_bus_type = BCM47XX_BUS_TYPE_SSB;
165 		bcm47xx_sprom_register_fallbacks();
166 		bcm47xx_register_ssb();
167 		bcm47xx_set_system_type(bcm47xx_bus.ssb.chip_id);
168 #endif
169 	}
170 
171 	_machine_restart = bcm47xx_machine_restart;
172 	_machine_halt = bcm47xx_machine_halt;
173 	pm_power_off = bcm47xx_machine_halt;
174 }
175 
176 /*
177  * This finishes bus initialization doing things that were not possible without
178  * kmalloc. Make sure to call it late enough (after mm_init).
179  */
180 void __init bcm47xx_bus_setup(void)
181 {
182 #ifdef CONFIG_BCM47XX_BCMA
183 	if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
184 		int err;
185 
186 		err = bcma_host_soc_init(&bcm47xx_bus.bcma);
187 		if (err)
188 			panic("Failed to initialize BCMA bus (err %d)", err);
189 	}
190 #endif
191 
192 	/* With bus initialized we can access NVRAM and detect the board */
193 	bcm47xx_board_detect();
194 	mips_set_machine_name(bcm47xx_board_get_name());
195 }
196 
197 static int __init bcm47xx_cpu_fixes(void)
198 {
199 	switch (bcm47xx_bus_type) {
200 #ifdef CONFIG_BCM47XX_SSB
201 	case BCM47XX_BUS_TYPE_SSB:
202 		/* Nothing to do */
203 		break;
204 #endif
205 #ifdef CONFIG_BCM47XX_BCMA
206 	case BCM47XX_BUS_TYPE_BCMA:
207 		/* The BCM4706 has a problem with the CPU wait instruction.
208 		 * When r4k_wait or r4k_wait_irqoff is used will just hang and
209 		 * not return from a msleep(). Removing the cpu_wait
210 		 * functionality is a workaround for this problem. The BCM4716
211 		 * does not have this problem.
212 		 */
213 		if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
214 			cpu_wait = NULL;
215 		break;
216 #endif
217 	}
218 	return 0;
219 }
220 arch_initcall(bcm47xx_cpu_fixes);
221 
222 static struct fixed_phy_status bcm47xx_fixed_phy_status __initdata = {
223 	.link	= 1,
224 	.speed	= SPEED_100,
225 	.duplex	= DUPLEX_FULL,
226 };
227 
228 static int __init bcm47xx_register_bus_complete(void)
229 {
230 	switch (bcm47xx_bus_type) {
231 #ifdef CONFIG_BCM47XX_SSB
232 	case BCM47XX_BUS_TYPE_SSB:
233 		/* Nothing to do */
234 		break;
235 #endif
236 #ifdef CONFIG_BCM47XX_BCMA
237 	case BCM47XX_BUS_TYPE_BCMA:
238 		bcma_bus_register(&bcm47xx_bus.bcma.bus);
239 		break;
240 #endif
241 	}
242 	bcm47xx_buttons_register();
243 	bcm47xx_leds_register();
244 	bcm47xx_workarounds();
245 
246 	fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status, -1);
247 	return 0;
248 }
249 device_initcall(bcm47xx_register_bus_complete);
250