1 /* 2 * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org> 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #include <linux/types.h> 26 #include <linux/interrupt.h> 27 #include <linux/irq.h> 28 #include <asm/setup.h> 29 #include <asm/irq_cpu.h> 30 #include <bcm47xx.h> 31 32 asmlinkage void plat_irq_dispatch(void) 33 { 34 u32 cause; 35 36 cause = read_c0_cause() & read_c0_status() & CAUSEF_IP; 37 38 clear_c0_status(cause); 39 40 if (cause & CAUSEF_IP7) 41 do_IRQ(7); 42 if (cause & CAUSEF_IP2) 43 do_IRQ(2); 44 if (cause & CAUSEF_IP3) 45 do_IRQ(3); 46 if (cause & CAUSEF_IP4) 47 do_IRQ(4); 48 if (cause & CAUSEF_IP5) 49 do_IRQ(5); 50 if (cause & CAUSEF_IP6) 51 do_IRQ(6); 52 } 53 54 #define DEFINE_HWx_IRQDISPATCH(x) \ 55 static void bcm47xx_hw ## x ## _irqdispatch(void) \ 56 { \ 57 do_IRQ(x); \ 58 } 59 DEFINE_HWx_IRQDISPATCH(2) 60 DEFINE_HWx_IRQDISPATCH(3) 61 DEFINE_HWx_IRQDISPATCH(4) 62 DEFINE_HWx_IRQDISPATCH(5) 63 DEFINE_HWx_IRQDISPATCH(6) 64 DEFINE_HWx_IRQDISPATCH(7) 65 66 void __init arch_init_irq(void) 67 { 68 #ifdef CONFIG_BCM47XX_BCMA 69 if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) { 70 bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core, 71 BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31); 72 /* 73 * the kernel reads the timer irq from some register and thinks 74 * it's #5, but we offset it by 2 and route to #7 75 */ 76 cp0_compare_irq = 7; 77 } 78 #endif 79 mips_cpu_irq_init(); 80 81 if (cpu_has_vint) { 82 pr_info("Setting up vectored interrupts\n"); 83 set_vi_handler(2, bcm47xx_hw2_irqdispatch); 84 set_vi_handler(3, bcm47xx_hw3_irqdispatch); 85 set_vi_handler(4, bcm47xx_hw4_irqdispatch); 86 set_vi_handler(5, bcm47xx_hw5_irqdispatch); 87 set_vi_handler(6, bcm47xx_hw6_irqdispatch); 88 set_vi_handler(7, bcm47xx_hw7_irqdispatch); 89 } 90 } 91