1 /* 2 * DBAu1000/1500/1100 PBAu1100/1500 board support 3 * 4 * Copyright 2000, 2008 MontaVista Software Inc. 5 * Author: MontaVista Software, Inc. <source@mvista.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 20 */ 21 22 #include <linux/dma-mapping.h> 23 #include <linux/gpio.h> 24 #include <linux/init.h> 25 #include <linux/interrupt.h> 26 #include <linux/leds.h> 27 #include <linux/mmc/host.h> 28 #include <linux/module.h> 29 #include <linux/platform_device.h> 30 #include <linux/pm.h> 31 #include <linux/spi/spi.h> 32 #include <linux/spi/spi_gpio.h> 33 #include <linux/spi/ads7846.h> 34 #include <asm/mach-au1x00/au1000.h> 35 #include <asm/mach-au1x00/au1000_dma.h> 36 #include <asm/mach-au1x00/au1100_mmc.h> 37 #include <asm/mach-db1x00/bcsr.h> 38 #include <asm/reboot.h> 39 #include <prom.h> 40 #include "platform.h" 41 42 #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT) 43 44 const char *get_system_type(void); 45 46 int __init db1000_board_setup(void) 47 { 48 /* initialize board register space */ 49 bcsr_init(DB1000_BCSR_PHYS_ADDR, 50 DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS); 51 52 switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) { 53 case BCSR_WHOAMI_DB1000: 54 case BCSR_WHOAMI_DB1500: 55 case BCSR_WHOAMI_DB1100: 56 case BCSR_WHOAMI_PB1500: 57 case BCSR_WHOAMI_PB1500R2: 58 case BCSR_WHOAMI_PB1100: 59 pr_info("AMD Alchemy %s Board\n", get_system_type()); 60 return 0; 61 } 62 return -ENODEV; 63 } 64 65 static int db1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) 66 { 67 if ((slot < 12) || (slot > 13) || pin == 0) 68 return -1; 69 if (slot == 12) 70 return (pin == 1) ? AU1500_PCI_INTA : 0xff; 71 if (slot == 13) { 72 switch (pin) { 73 case 1: return AU1500_PCI_INTA; 74 case 2: return AU1500_PCI_INTB; 75 case 3: return AU1500_PCI_INTC; 76 case 4: return AU1500_PCI_INTD; 77 } 78 } 79 return -1; 80 } 81 82 static struct resource alchemy_pci_host_res[] = { 83 [0] = { 84 .start = AU1500_PCI_PHYS_ADDR, 85 .end = AU1500_PCI_PHYS_ADDR + 0xfff, 86 .flags = IORESOURCE_MEM, 87 }, 88 }; 89 90 static struct alchemy_pci_platdata db1500_pci_pd = { 91 .board_map_irq = db1500_map_pci_irq, 92 }; 93 94 static struct platform_device db1500_pci_host_dev = { 95 .dev.platform_data = &db1500_pci_pd, 96 .name = "alchemy-pci", 97 .id = 0, 98 .num_resources = ARRAY_SIZE(alchemy_pci_host_res), 99 .resource = alchemy_pci_host_res, 100 }; 101 102 int __init db1500_pci_setup(void) 103 { 104 return platform_device_register(&db1500_pci_host_dev); 105 } 106 107 static struct resource au1100_lcd_resources[] = { 108 [0] = { 109 .start = AU1100_LCD_PHYS_ADDR, 110 .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1, 111 .flags = IORESOURCE_MEM, 112 }, 113 [1] = { 114 .start = AU1100_LCD_INT, 115 .end = AU1100_LCD_INT, 116 .flags = IORESOURCE_IRQ, 117 } 118 }; 119 120 static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32); 121 122 static struct platform_device au1100_lcd_device = { 123 .name = "au1100-lcd", 124 .id = 0, 125 .dev = { 126 .dma_mask = &au1100_lcd_dmamask, 127 .coherent_dma_mask = DMA_BIT_MASK(32), 128 }, 129 .num_resources = ARRAY_SIZE(au1100_lcd_resources), 130 .resource = au1100_lcd_resources, 131 }; 132 133 static struct resource alchemy_ac97c_res[] = { 134 [0] = { 135 .start = AU1000_AC97_PHYS_ADDR, 136 .end = AU1000_AC97_PHYS_ADDR + 0xfff, 137 .flags = IORESOURCE_MEM, 138 }, 139 [1] = { 140 .start = DMA_ID_AC97C_TX, 141 .end = DMA_ID_AC97C_TX, 142 .flags = IORESOURCE_DMA, 143 }, 144 [2] = { 145 .start = DMA_ID_AC97C_RX, 146 .end = DMA_ID_AC97C_RX, 147 .flags = IORESOURCE_DMA, 148 }, 149 }; 150 151 static struct platform_device alchemy_ac97c_dev = { 152 .name = "alchemy-ac97c", 153 .id = -1, 154 .resource = alchemy_ac97c_res, 155 .num_resources = ARRAY_SIZE(alchemy_ac97c_res), 156 }; 157 158 static struct platform_device alchemy_ac97c_dma_dev = { 159 .name = "alchemy-pcm-dma", 160 .id = 0, 161 }; 162 163 static struct platform_device db1x00_codec_dev = { 164 .name = "ac97-codec", 165 .id = -1, 166 }; 167 168 static struct platform_device db1x00_audio_dev = { 169 .name = "db1000-audio", 170 }; 171 172 /******************************************************************************/ 173 174 static irqreturn_t db1100_mmc_cd(int irq, void *ptr) 175 { 176 void (*mmc_cd)(struct mmc_host *, unsigned long); 177 /* link against CONFIG_MMC=m */ 178 mmc_cd = symbol_get(mmc_detect_change); 179 mmc_cd(ptr, msecs_to_jiffies(500)); 180 symbol_put(mmc_detect_change); 181 182 return IRQ_HANDLED; 183 } 184 185 static int db1100_mmc_cd_setup(void *mmc_host, int en) 186 { 187 int ret = 0, irq; 188 189 if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100) 190 irq = AU1100_GPIO19_INT; 191 else 192 irq = AU1100_GPIO14_INT; /* PB1100 SD0 CD# */ 193 194 if (en) { 195 irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH); 196 ret = request_irq(irq, db1100_mmc_cd, 0, 197 "sd0_cd", mmc_host); 198 } else 199 free_irq(irq, mmc_host); 200 return ret; 201 } 202 203 static int db1100_mmc1_cd_setup(void *mmc_host, int en) 204 { 205 int ret = 0, irq; 206 207 if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100) 208 irq = AU1100_GPIO20_INT; 209 else 210 irq = AU1100_GPIO15_INT; /* PB1100 SD1 CD# */ 211 212 if (en) { 213 irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH); 214 ret = request_irq(irq, db1100_mmc_cd, 0, 215 "sd1_cd", mmc_host); 216 } else 217 free_irq(irq, mmc_host); 218 return ret; 219 } 220 221 static int db1100_mmc_card_readonly(void *mmc_host) 222 { 223 /* testing suggests that this bit is inverted */ 224 return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 0 : 1; 225 } 226 227 static int db1100_mmc_card_inserted(void *mmc_host) 228 { 229 return !alchemy_gpio_get_value(19); 230 } 231 232 static void db1100_mmc_set_power(void *mmc_host, int state) 233 { 234 int bit; 235 236 if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100) 237 bit = BCSR_BOARD_SD0PWR; 238 else 239 bit = BCSR_BOARD_PB1100_SD0PWR; 240 241 if (state) { 242 bcsr_mod(BCSR_BOARD, 0, bit); 243 msleep(400); /* stabilization time */ 244 } else 245 bcsr_mod(BCSR_BOARD, bit, 0); 246 } 247 248 static void db1100_mmcled_set(struct led_classdev *led, enum led_brightness b) 249 { 250 if (b != LED_OFF) 251 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0); 252 else 253 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0); 254 } 255 256 static struct led_classdev db1100_mmc_led = { 257 .brightness_set = db1100_mmcled_set, 258 }; 259 260 static int db1100_mmc1_card_readonly(void *mmc_host) 261 { 262 return (bcsr_read(BCSR_BOARD) & BCSR_BOARD_SD1WP) ? 1 : 0; 263 } 264 265 static int db1100_mmc1_card_inserted(void *mmc_host) 266 { 267 return !alchemy_gpio_get_value(20); 268 } 269 270 static void db1100_mmc1_set_power(void *mmc_host, int state) 271 { 272 int bit; 273 274 if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100) 275 bit = BCSR_BOARD_SD1PWR; 276 else 277 bit = BCSR_BOARD_PB1100_SD1PWR; 278 279 if (state) { 280 bcsr_mod(BCSR_BOARD, 0, bit); 281 msleep(400); /* stabilization time */ 282 } else 283 bcsr_mod(BCSR_BOARD, bit, 0); 284 } 285 286 static void db1100_mmc1led_set(struct led_classdev *led, enum led_brightness b) 287 { 288 if (b != LED_OFF) 289 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0); 290 else 291 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1); 292 } 293 294 static struct led_classdev db1100_mmc1_led = { 295 .brightness_set = db1100_mmc1led_set, 296 }; 297 298 static struct au1xmmc_platform_data db1100_mmc_platdata[2] = { 299 [0] = { 300 .cd_setup = db1100_mmc_cd_setup, 301 .set_power = db1100_mmc_set_power, 302 .card_inserted = db1100_mmc_card_inserted, 303 .card_readonly = db1100_mmc_card_readonly, 304 .led = &db1100_mmc_led, 305 }, 306 [1] = { 307 .cd_setup = db1100_mmc1_cd_setup, 308 .set_power = db1100_mmc1_set_power, 309 .card_inserted = db1100_mmc1_card_inserted, 310 .card_readonly = db1100_mmc1_card_readonly, 311 .led = &db1100_mmc1_led, 312 }, 313 }; 314 315 static struct resource au1100_mmc0_resources[] = { 316 [0] = { 317 .start = AU1100_SD0_PHYS_ADDR, 318 .end = AU1100_SD0_PHYS_ADDR + 0xfff, 319 .flags = IORESOURCE_MEM, 320 }, 321 [1] = { 322 .start = AU1100_SD_INT, 323 .end = AU1100_SD_INT, 324 .flags = IORESOURCE_IRQ, 325 }, 326 [2] = { 327 .start = DMA_ID_SD0_TX, 328 .end = DMA_ID_SD0_TX, 329 .flags = IORESOURCE_DMA, 330 }, 331 [3] = { 332 .start = DMA_ID_SD0_RX, 333 .end = DMA_ID_SD0_RX, 334 .flags = IORESOURCE_DMA, 335 } 336 }; 337 338 static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); 339 340 static struct platform_device db1100_mmc0_dev = { 341 .name = "au1xxx-mmc", 342 .id = 0, 343 .dev = { 344 .dma_mask = &au1xxx_mmc_dmamask, 345 .coherent_dma_mask = DMA_BIT_MASK(32), 346 .platform_data = &db1100_mmc_platdata[0], 347 }, 348 .num_resources = ARRAY_SIZE(au1100_mmc0_resources), 349 .resource = au1100_mmc0_resources, 350 }; 351 352 static struct resource au1100_mmc1_res[] = { 353 [0] = { 354 .start = AU1100_SD1_PHYS_ADDR, 355 .end = AU1100_SD1_PHYS_ADDR + 0xfff, 356 .flags = IORESOURCE_MEM, 357 }, 358 [1] = { 359 .start = AU1100_SD_INT, 360 .end = AU1100_SD_INT, 361 .flags = IORESOURCE_IRQ, 362 }, 363 [2] = { 364 .start = DMA_ID_SD1_TX, 365 .end = DMA_ID_SD1_TX, 366 .flags = IORESOURCE_DMA, 367 }, 368 [3] = { 369 .start = DMA_ID_SD1_RX, 370 .end = DMA_ID_SD1_RX, 371 .flags = IORESOURCE_DMA, 372 } 373 }; 374 375 static struct platform_device db1100_mmc1_dev = { 376 .name = "au1xxx-mmc", 377 .id = 1, 378 .dev = { 379 .dma_mask = &au1xxx_mmc_dmamask, 380 .coherent_dma_mask = DMA_BIT_MASK(32), 381 .platform_data = &db1100_mmc_platdata[1], 382 }, 383 .num_resources = ARRAY_SIZE(au1100_mmc1_res), 384 .resource = au1100_mmc1_res, 385 }; 386 387 /******************************************************************************/ 388 389 static void db1000_irda_set_phy_mode(int mode) 390 { 391 unsigned short mask = BCSR_RESETS_IRDA_MODE_MASK | BCSR_RESETS_FIR_SEL; 392 393 switch (mode) { 394 case AU1000_IRDA_PHY_MODE_OFF: 395 bcsr_mod(BCSR_RESETS, mask, BCSR_RESETS_IRDA_MODE_OFF); 396 break; 397 case AU1000_IRDA_PHY_MODE_SIR: 398 bcsr_mod(BCSR_RESETS, mask, BCSR_RESETS_IRDA_MODE_FULL); 399 break; 400 case AU1000_IRDA_PHY_MODE_FIR: 401 bcsr_mod(BCSR_RESETS, mask, BCSR_RESETS_IRDA_MODE_FULL | 402 BCSR_RESETS_FIR_SEL); 403 break; 404 } 405 } 406 407 static struct au1k_irda_platform_data db1000_irda_platdata = { 408 .set_phy_mode = db1000_irda_set_phy_mode, 409 }; 410 411 static struct resource au1000_irda_res[] = { 412 [0] = { 413 .start = AU1000_IRDA_PHYS_ADDR, 414 .end = AU1000_IRDA_PHYS_ADDR + 0x0fff, 415 .flags = IORESOURCE_MEM, 416 }, 417 [1] = { 418 .start = AU1000_IRDA_TX_INT, 419 .end = AU1000_IRDA_TX_INT, 420 .flags = IORESOURCE_IRQ, 421 }, 422 [2] = { 423 .start = AU1000_IRDA_RX_INT, 424 .end = AU1000_IRDA_RX_INT, 425 .flags = IORESOURCE_IRQ, 426 }, 427 }; 428 429 static struct platform_device db1000_irda_dev = { 430 .name = "au1000-irda", 431 .id = -1, 432 .dev = { 433 .platform_data = &db1000_irda_platdata, 434 }, 435 .resource = au1000_irda_res, 436 .num_resources = ARRAY_SIZE(au1000_irda_res), 437 }; 438 439 /******************************************************************************/ 440 441 static struct ads7846_platform_data db1100_touch_pd = { 442 .model = 7846, 443 .vref_mv = 3300, 444 .gpio_pendown = 21, 445 }; 446 447 static struct spi_gpio_platform_data db1100_spictl_pd = { 448 .sck = 209, 449 .mosi = 208, 450 .miso = 207, 451 .num_chipselect = 1, 452 }; 453 454 static struct spi_board_info db1100_spi_info[] __initdata = { 455 [0] = { 456 .modalias = "ads7846", 457 .max_speed_hz = 3250000, 458 .bus_num = 0, 459 .chip_select = 0, 460 .mode = 0, 461 .irq = AU1100_GPIO21_INT, 462 .platform_data = &db1100_touch_pd, 463 .controller_data = (void *)210, /* for spi_gpio: CS# GPIO210 */ 464 }, 465 }; 466 467 static struct platform_device db1100_spi_dev = { 468 .name = "spi_gpio", 469 .id = 0, 470 .dev = { 471 .platform_data = &db1100_spictl_pd, 472 }, 473 }; 474 475 476 static struct platform_device *db1x00_devs[] = { 477 &db1x00_codec_dev, 478 &alchemy_ac97c_dma_dev, 479 &alchemy_ac97c_dev, 480 &db1x00_audio_dev, 481 }; 482 483 static struct platform_device *db1000_devs[] = { 484 &db1000_irda_dev, 485 }; 486 487 static struct platform_device *db1100_devs[] = { 488 &au1100_lcd_device, 489 &db1100_mmc0_dev, 490 &db1100_mmc1_dev, 491 &db1000_irda_dev, 492 }; 493 494 int __init db1000_dev_setup(void) 495 { 496 int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)); 497 int c0, c1, d0, d1, s0, s1, flashsize = 32, twosocks = 1; 498 unsigned long pfc; 499 500 if (board == BCSR_WHOAMI_DB1500) { 501 c0 = AU1500_GPIO2_INT; 502 c1 = AU1500_GPIO5_INT; 503 d0 = AU1500_GPIO0_INT; 504 d1 = AU1500_GPIO3_INT; 505 s0 = AU1500_GPIO1_INT; 506 s1 = AU1500_GPIO4_INT; 507 } else if (board == BCSR_WHOAMI_DB1100) { 508 c0 = AU1100_GPIO2_INT; 509 c1 = AU1100_GPIO5_INT; 510 d0 = AU1100_GPIO0_INT; 511 d1 = AU1100_GPIO3_INT; 512 s0 = AU1100_GPIO1_INT; 513 s1 = AU1100_GPIO4_INT; 514 515 gpio_request(19, "sd0_cd"); 516 gpio_request(20, "sd1_cd"); 517 gpio_direction_input(19); /* sd0 cd# */ 518 gpio_direction_input(20); /* sd1 cd# */ 519 520 /* spi_gpio on SSI0 pins */ 521 pfc = __raw_readl((void __iomem *)SYS_PINFUNC); 522 pfc |= (1 << 0); /* SSI0 pins as GPIOs */ 523 __raw_writel(pfc, (void __iomem *)SYS_PINFUNC); 524 wmb(); 525 526 spi_register_board_info(db1100_spi_info, 527 ARRAY_SIZE(db1100_spi_info)); 528 529 platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs)); 530 platform_device_register(&db1100_spi_dev); 531 } else if (board == BCSR_WHOAMI_DB1000) { 532 c0 = AU1000_GPIO2_INT; 533 c1 = AU1000_GPIO5_INT; 534 d0 = AU1000_GPIO0_INT; 535 d1 = AU1000_GPIO3_INT; 536 s0 = AU1000_GPIO1_INT; 537 s1 = AU1000_GPIO4_INT; 538 platform_add_devices(db1000_devs, ARRAY_SIZE(db1000_devs)); 539 } else if ((board == BCSR_WHOAMI_PB1500) || 540 (board == BCSR_WHOAMI_PB1500R2)) { 541 c0 = AU1500_GPIO203_INT; 542 d0 = AU1500_GPIO201_INT; 543 s0 = AU1500_GPIO202_INT; 544 twosocks = 0; 545 flashsize = 64; 546 /* RTC and daughtercard irqs */ 547 irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_LOW); 548 irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW); 549 /* EPSON S1D13806 0x1b000000 550 * SRAM 1MB/2MB 0x1a000000 551 * DS1693 RTC 0x0c000000 552 */ 553 } else if (board == BCSR_WHOAMI_PB1100) { 554 c0 = AU1100_GPIO11_INT; 555 d0 = AU1100_GPIO9_INT; 556 s0 = AU1100_GPIO10_INT; 557 twosocks = 0; 558 flashsize = 64; 559 /* pendown, rtc, daughtercard irqs */ 560 irq_set_irq_type(AU1100_GPIO8_INT, IRQ_TYPE_LEVEL_LOW); 561 irq_set_irq_type(AU1100_GPIO12_INT, IRQ_TYPE_LEVEL_LOW); 562 irq_set_irq_type(AU1100_GPIO13_INT, IRQ_TYPE_LEVEL_LOW); 563 /* EPSON S1D13806 0x1b000000 564 * SRAM 1MB/2MB 0x1a000000 565 * DiskOnChip 0x0d000000 566 * DS1693 RTC 0x0c000000 567 */ 568 platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs)); 569 } else 570 return 0; /* unknown board, no further dev setup to do */ 571 572 irq_set_irq_type(d0, IRQ_TYPE_EDGE_BOTH); 573 irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW); 574 irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW); 575 576 db1x_register_pcmcia_socket( 577 AU1000_PCMCIA_ATTR_PHYS_ADDR, 578 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, 579 AU1000_PCMCIA_MEM_PHYS_ADDR, 580 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, 581 AU1000_PCMCIA_IO_PHYS_ADDR, 582 AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, 583 c0, d0, /*s0*/0, 0, 0); 584 585 if (twosocks) { 586 irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH); 587 irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW); 588 irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW); 589 590 db1x_register_pcmcia_socket( 591 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000, 592 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1, 593 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004000000, 594 AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, 595 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000, 596 AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, 597 c1, d1, /*s1*/0, 0, 1); 598 } 599 600 platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs)); 601 db1x_register_norflash(flashsize << 20, 4 /* 32bit */, F_SWAPPED); 602 return 0; 603 } 604