1 /* 2 * Copyright 2000, 2007-2008 MontaVista Software Inc. 3 * Author: MontaVista Software, Inc. <source@mvista.com 4 * 5 * Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 * 12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 22 * 23 * You should have received a copy of the GNU General Public License along 24 * with this program; if not, write to the Free Software Foundation, Inc., 25 * 675 Mass Ave, Cambridge, MA 02139, USA. 26 */ 27 28 #include <linux/init.h> 29 #include <linux/ioport.h> 30 #include <linux/module.h> 31 #include <linux/pm.h> 32 33 #include <asm/mipsregs.h> 34 #include <asm/reboot.h> 35 #include <asm/time.h> 36 37 #include <au1000.h> 38 39 extern void __init board_setup(void); 40 extern void au1000_restart(char *); 41 extern void au1000_halt(void); 42 extern void au1000_power_off(void); 43 extern void set_cpuspec(void); 44 45 void __init plat_mem_setup(void) 46 { 47 _machine_restart = au1000_restart; 48 _machine_halt = au1000_halt; 49 pm_power_off = au1000_power_off; 50 51 board_setup(); /* board specific setup */ 52 53 if (au1xxx_cpu_needs_config_od()) 54 /* Various early Au1xx0 errata corrected by this */ 55 set_c0_config(1 << 19); /* Set Config[OD] */ 56 else 57 /* Clear to obtain best system bus performance */ 58 clear_c0_config(1 << 19); /* Clear Config[OD] */ 59 60 /* IO/MEM resources. */ 61 set_io_port_base(0); 62 ioport_resource.start = IOPORT_RESOURCE_START; 63 ioport_resource.end = IOPORT_RESOURCE_END; 64 iomem_resource.start = IOMEM_RESOURCE_START; 65 iomem_resource.end = IOMEM_RESOURCE_END; 66 } 67 68 #if defined(CONFIG_64BIT_PHYS_ADDR) 69 /* This routine should be valid for all Au1x based boards */ 70 phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) 71 { 72 /* Don't fixup 36-bit addresses */ 73 if ((phys_addr >> 32) != 0) 74 return phys_addr; 75 76 #ifdef CONFIG_PCI 77 { 78 u32 start = (u32)Au1500_PCI_MEM_START; 79 u32 end = (u32)Au1500_PCI_MEM_END; 80 81 /* Check for PCI memory window */ 82 if (phys_addr >= start && (phys_addr + size - 1) <= end) 83 return (phys_t) 84 ((phys_addr - start) + Au1500_PCI_MEM_START); 85 } 86 #endif 87 88 /* 89 * All Au1xx0 SOCs have a PCMCIA controller. 90 * We setup our 32-bit pseudo addresses to be equal to the 91 * 36-bit addr >> 4, to make it easier to check the address 92 * and fix it. 93 * The PCMCIA socket 0 physical attribute address is 0xF 4000 0000. 94 * The pseudo address we use is 0xF400 0000. Any address over 95 * 0xF400 0000 is a PCMCIA pseudo address. 96 */ 97 if ((phys_addr >= 0xF4000000) && (phys_addr < 0xFFFFFFFF)) 98 return (phys_t)(phys_addr << 4); 99 100 /* default nop */ 101 return phys_addr; 102 } 103 EXPORT_SYMBOL(__fixup_bigphys_addr); 104 #endif 105