1 /* 2 * GPR board platform device registration (Au1550) 3 * 4 * Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19 */ 20 21 #include <linux/delay.h> 22 #include <linux/init.h> 23 #include <linux/interrupt.h> 24 #include <linux/kernel.h> 25 #include <linux/platform_device.h> 26 #include <linux/pm.h> 27 #include <linux/mtd/partitions.h> 28 #include <linux/mtd/physmap.h> 29 #include <linux/leds.h> 30 #include <linux/gpio.h> 31 #include <linux/i2c.h> 32 #include <linux/i2c-gpio.h> 33 #include <asm/bootinfo.h> 34 #include <asm/idle.h> 35 #include <asm/reboot.h> 36 #include <asm/mach-au1x00/au1000.h> 37 #include <asm/mach-au1x00/gpio-au1000.h> 38 #include <prom.h> 39 40 const char *get_system_type(void) 41 { 42 return "GPR"; 43 } 44 45 void __init prom_init(void) 46 { 47 unsigned char *memsize_str; 48 unsigned long memsize; 49 50 prom_argc = fw_arg0; 51 prom_argv = (char **)fw_arg1; 52 prom_envp = (char **)fw_arg2; 53 54 prom_init_cmdline(); 55 56 memsize_str = prom_getenv("memsize"); 57 if (!memsize_str || kstrtoul(memsize_str, 0, &memsize)) 58 memsize = 0x04000000; 59 add_memory_region(0, memsize, BOOT_MEM_RAM); 60 } 61 62 void prom_putchar(unsigned char c) 63 { 64 alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c); 65 } 66 67 static void gpr_reset(char *c) 68 { 69 /* switch System-LED to orange (red# and green# on) */ 70 alchemy_gpio_direction_output(4, 0); 71 alchemy_gpio_direction_output(5, 0); 72 73 /* trigger watchdog to reset board in 200ms */ 74 printk(KERN_EMERG "Triggering watchdog soft reset...\n"); 75 raw_local_irq_disable(); 76 alchemy_gpio_direction_output(1, 0); 77 udelay(1); 78 alchemy_gpio_set_value(1, 1); 79 while (1) 80 cpu_wait(); 81 } 82 83 static void gpr_power_off(void) 84 { 85 while (1) 86 cpu_wait(); 87 } 88 89 void __init board_setup(void) 90 { 91 printk(KERN_INFO "Trapeze ITS GPR board\n"); 92 93 pm_power_off = gpr_power_off; 94 _machine_halt = gpr_power_off; 95 _machine_restart = gpr_reset; 96 97 /* Enable UART1/3 */ 98 alchemy_uart_enable(AU1000_UART3_PHYS_ADDR); 99 alchemy_uart_enable(AU1000_UART1_PHYS_ADDR); 100 101 /* Take away Reset of UMTS-card */ 102 alchemy_gpio_direction_output(215, 1); 103 } 104 105 /* 106 * Watchdog 107 */ 108 static struct resource gpr_wdt_resource[] = { 109 [0] = { 110 .start = 1, 111 .end = 1, 112 .name = "gpr-adm6320-wdt", 113 .flags = IORESOURCE_IRQ, 114 } 115 }; 116 117 static struct platform_device gpr_wdt_device = { 118 .name = "adm6320-wdt", 119 .id = 0, 120 .num_resources = ARRAY_SIZE(gpr_wdt_resource), 121 .resource = gpr_wdt_resource, 122 }; 123 124 /* 125 * FLASH 126 * 127 * 0x00000000-0x00200000 : "kernel" 128 * 0x00200000-0x00a00000 : "rootfs" 129 * 0x01d00000-0x01f00000 : "config" 130 * 0x01c00000-0x01d00000 : "yamon" 131 * 0x01d00000-0x01d40000 : "yamon env vars" 132 * 0x00000000-0x00a00000 : "kernel+rootfs" 133 */ 134 static struct mtd_partition gpr_mtd_partitions[] = { 135 { 136 .name = "kernel", 137 .size = 0x00200000, 138 .offset = 0, 139 }, 140 { 141 .name = "rootfs", 142 .size = 0x00800000, 143 .offset = MTDPART_OFS_APPEND, 144 .mask_flags = MTD_WRITEABLE, 145 }, 146 { 147 .name = "config", 148 .size = 0x00200000, 149 .offset = 0x01d00000, 150 }, 151 { 152 .name = "yamon", 153 .size = 0x00100000, 154 .offset = 0x01c00000, 155 }, 156 { 157 .name = "yamon env vars", 158 .size = 0x00040000, 159 .offset = MTDPART_OFS_APPEND, 160 }, 161 { 162 .name = "kernel+rootfs", 163 .size = 0x00a00000, 164 .offset = 0, 165 }, 166 }; 167 168 static struct physmap_flash_data gpr_flash_data = { 169 .width = 4, 170 .nr_parts = ARRAY_SIZE(gpr_mtd_partitions), 171 .parts = gpr_mtd_partitions, 172 }; 173 174 static struct resource gpr_mtd_resource = { 175 .start = 0x1e000000, 176 .end = 0x1fffffff, 177 .flags = IORESOURCE_MEM, 178 }; 179 180 static struct platform_device gpr_mtd_device = { 181 .name = "physmap-flash", 182 .dev = { 183 .platform_data = &gpr_flash_data, 184 }, 185 .num_resources = 1, 186 .resource = &gpr_mtd_resource, 187 }; 188 189 /* 190 * LEDs 191 */ 192 static struct gpio_led gpr_gpio_leds[] = { 193 { /* green */ 194 .name = "gpr:green", 195 .gpio = 4, 196 .active_low = 1, 197 }, 198 { /* red */ 199 .name = "gpr:red", 200 .gpio = 5, 201 .active_low = 1, 202 } 203 }; 204 205 static struct gpio_led_platform_data gpr_led_data = { 206 .num_leds = ARRAY_SIZE(gpr_gpio_leds), 207 .leds = gpr_gpio_leds, 208 }; 209 210 static struct platform_device gpr_led_devices = { 211 .name = "leds-gpio", 212 .id = -1, 213 .dev = { 214 .platform_data = &gpr_led_data, 215 } 216 }; 217 218 /* 219 * I2C 220 */ 221 static struct i2c_gpio_platform_data gpr_i2c_data = { 222 .sda_pin = 209, 223 .sda_is_open_drain = 1, 224 .scl_pin = 210, 225 .scl_is_open_drain = 1, 226 .udelay = 2, /* ~100 kHz */ 227 .timeout = HZ, 228 }; 229 230 static struct platform_device gpr_i2c_device = { 231 .name = "i2c-gpio", 232 .id = -1, 233 .dev.platform_data = &gpr_i2c_data, 234 }; 235 236 static struct i2c_board_info gpr_i2c_info[] __initdata = { 237 { 238 I2C_BOARD_INFO("lm83", 0x18), 239 .type = "lm83" 240 } 241 }; 242 243 244 245 static struct resource alchemy_pci_host_res[] = { 246 [0] = { 247 .start = AU1500_PCI_PHYS_ADDR, 248 .end = AU1500_PCI_PHYS_ADDR + 0xfff, 249 .flags = IORESOURCE_MEM, 250 }, 251 }; 252 253 static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin) 254 { 255 if ((slot == 0) && (pin == 1)) 256 return AU1550_PCI_INTA; 257 else if ((slot == 0) && (pin == 2)) 258 return AU1550_PCI_INTB; 259 260 return 0xff; 261 } 262 263 static struct alchemy_pci_platdata gpr_pci_pd = { 264 .board_map_irq = gpr_map_pci_irq, 265 .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H | 266 PCI_CONFIG_CH | 267 #if defined(__MIPSEB__) 268 PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM, 269 #else 270 0, 271 #endif 272 }; 273 274 static struct platform_device gpr_pci_host_dev = { 275 .dev.platform_data = &gpr_pci_pd, 276 .name = "alchemy-pci", 277 .id = 0, 278 .num_resources = ARRAY_SIZE(alchemy_pci_host_res), 279 .resource = alchemy_pci_host_res, 280 }; 281 282 static struct platform_device *gpr_devices[] __initdata = { 283 &gpr_wdt_device, 284 &gpr_mtd_device, 285 &gpr_i2c_device, 286 &gpr_led_devices, 287 }; 288 289 static int __init gpr_pci_init(void) 290 { 291 return platform_device_register(&gpr_pci_host_dev); 292 } 293 /* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */ 294 arch_initcall(gpr_pci_init); 295 296 297 static int __init gpr_dev_init(void) 298 { 299 i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info)); 300 301 return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices)); 302 } 303 device_initcall(gpr_dev_init); 304