xref: /openbmc/linux/arch/mips/Kconfig (revision f5ad1c74)
1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3	bool
4	default y
5	select ARCH_32BIT_OFF_T if !64BIT
6	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7	select ARCH_HAS_FORTIFY_SOURCE
8	select ARCH_HAS_KCOV
9	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
10	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
11	select ARCH_HAS_UBSAN_SANITIZE_ALL
12	select ARCH_SUPPORTS_UPROBES
13	select ARCH_USE_BUILTIN_BSWAP
14	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
15	select ARCH_USE_QUEUED_RWLOCKS
16	select ARCH_USE_QUEUED_SPINLOCKS
17	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
18	select ARCH_WANT_IPC_PARSE_VERSION
19	select BUILDTIME_TABLE_SORT
20	select CLONE_BACKWARDS
21	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
22	select CPU_PM if CPU_IDLE
23	select GENERIC_ATOMIC64 if !64BIT
24	select GENERIC_CLOCKEVENTS
25	select GENERIC_CMOS_UPDATE
26	select GENERIC_CPU_AUTOPROBE
27	select GENERIC_GETTIMEOFDAY
28	select GENERIC_IOMAP
29	select GENERIC_IRQ_PROBE
30	select GENERIC_IRQ_SHOW
31	select GENERIC_ISA_DMA if EISA
32	select GENERIC_LIB_ASHLDI3
33	select GENERIC_LIB_ASHRDI3
34	select GENERIC_LIB_CMPDI2
35	select GENERIC_LIB_LSHRDI3
36	select GENERIC_LIB_UCMPDI2
37	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
38	select GENERIC_SMP_IDLE_THREAD
39	select GENERIC_TIME_VSYSCALL
40	select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
41	select HANDLE_DOMAIN_IRQ
42	select HAVE_ARCH_COMPILER_H
43	select HAVE_ARCH_JUMP_LABEL
44	select HAVE_ARCH_KGDB
45	select HAVE_ARCH_MMAP_RND_BITS if MMU
46	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
47	select HAVE_ARCH_SECCOMP_FILTER
48	select HAVE_ARCH_TRACEHOOK
49	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
50	select HAVE_ASM_MODVERSIONS
51	select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
52	select HAVE_CONTEXT_TRACKING
53	select HAVE_TIF_NOHZ
54	select HAVE_C_RECORDMCOUNT
55	select HAVE_DEBUG_KMEMLEAK
56	select HAVE_DEBUG_STACKOVERFLOW
57	select HAVE_DMA_CONTIGUOUS
58	select HAVE_DYNAMIC_FTRACE
59	select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
60	select HAVE_EXIT_THREAD
61	select HAVE_FAST_GUP
62	select HAVE_FTRACE_MCOUNT_RECORD
63	select HAVE_FUNCTION_GRAPH_TRACER
64	select HAVE_FUNCTION_TRACER
65	select HAVE_GCC_PLUGINS
66	select HAVE_GENERIC_VDSO
67	select HAVE_IDE
68	select HAVE_IOREMAP_PROT
69	select HAVE_IRQ_EXIT_ON_IRQ_STACK
70	select HAVE_IRQ_TIME_ACCOUNTING
71	select HAVE_KPROBES
72	select HAVE_KRETPROBES
73	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
74	select HAVE_MOD_ARCH_SPECIFIC
75	select HAVE_NMI
76	select HAVE_OPROFILE
77	select HAVE_PERF_EVENTS
78	select HAVE_REGS_AND_STACK_ACCESS_API
79	select HAVE_RSEQ
80	select HAVE_SPARSE_SYSCALL_NR
81	select HAVE_STACKPROTECTOR
82	select HAVE_SYSCALL_TRACEPOINTS
83	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
84	select IRQ_FORCED_THREADING
85	select ISA if EISA
86	select MODULES_USE_ELF_REL if MODULES
87	select MODULES_USE_ELF_RELA if MODULES && 64BIT
88	select PERF_USE_VMALLOC
89	select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
90	select RTC_LIB
91	select SET_FS
92	select SYSCTL_EXCEPTION_TRACE
93	select VIRT_TO_BUS
94
95config MIPS_FIXUP_BIGPHYS_ADDR
96	bool
97
98config MIPS_GENERIC
99	bool
100
101config MACH_INGENIC
102	bool
103	select SYS_SUPPORTS_32BIT_KERNEL
104	select SYS_SUPPORTS_LITTLE_ENDIAN
105	select SYS_SUPPORTS_ZBOOT
106	select DMA_NONCOHERENT
107	select IRQ_MIPS_CPU
108	select PINCTRL
109	select GPIOLIB
110	select COMMON_CLK
111	select GENERIC_IRQ_CHIP
112	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
113	select USE_OF
114	select CPU_SUPPORTS_CPUFREQ
115	select MIPS_EXTERNAL_TIMER
116
117menu "Machine selection"
118
119choice
120	prompt "System type"
121	default MIPS_GENERIC_KERNEL
122
123config MIPS_GENERIC_KERNEL
124	bool "Generic board-agnostic MIPS kernel"
125	select MIPS_GENERIC
126	select BOOT_RAW
127	select BUILTIN_DTB
128	select CEVT_R4K
129	select CLKSRC_MIPS_GIC
130	select COMMON_CLK
131	select CPU_MIPSR2_IRQ_EI
132	select CPU_MIPSR2_IRQ_VI
133	select CSRC_R4K
134	select DMA_PERDEV_COHERENT
135	select HAVE_PCI
136	select IRQ_MIPS_CPU
137	select MIPS_AUTO_PFN_OFFSET
138	select MIPS_CPU_SCACHE
139	select MIPS_GIC
140	select MIPS_L1_CACHE_SHIFT_7
141	select NO_EXCEPT_FILL
142	select PCI_DRIVERS_GENERIC
143	select SMP_UP if SMP
144	select SWAP_IO_SPACE
145	select SYS_HAS_CPU_MIPS32_R1
146	select SYS_HAS_CPU_MIPS32_R2
147	select SYS_HAS_CPU_MIPS32_R6
148	select SYS_HAS_CPU_MIPS64_R1
149	select SYS_HAS_CPU_MIPS64_R2
150	select SYS_HAS_CPU_MIPS64_R6
151	select SYS_SUPPORTS_32BIT_KERNEL
152	select SYS_SUPPORTS_64BIT_KERNEL
153	select SYS_SUPPORTS_BIG_ENDIAN
154	select SYS_SUPPORTS_HIGHMEM
155	select SYS_SUPPORTS_LITTLE_ENDIAN
156	select SYS_SUPPORTS_MICROMIPS
157	select SYS_SUPPORTS_MIPS16
158	select SYS_SUPPORTS_MIPS_CPS
159	select SYS_SUPPORTS_MULTITHREADING
160	select SYS_SUPPORTS_RELOCATABLE
161	select SYS_SUPPORTS_SMARTMIPS
162	select SYS_SUPPORTS_ZBOOT
163	select UHI_BOOT
164	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
165	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
166	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
167	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
168	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
169	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
170	select USE_OF
171	help
172	  Select this to build a kernel which aims to support multiple boards,
173	  generally using a flattened device tree passed from the bootloader
174	  using the boot protocol defined in the UHI (Unified Hosting
175	  Interface) specification.
176
177config MIPS_ALCHEMY
178	bool "Alchemy processor based machines"
179	select PHYS_ADDR_T_64BIT
180	select CEVT_R4K
181	select CSRC_R4K
182	select IRQ_MIPS_CPU
183	select DMA_MAYBE_COHERENT	# Au1000,1500,1100 aren't, rest is
184	select MIPS_FIXUP_BIGPHYS_ADDR if PCI
185	select SYS_HAS_CPU_MIPS32_R1
186	select SYS_SUPPORTS_32BIT_KERNEL
187	select SYS_SUPPORTS_APM_EMULATION
188	select GPIOLIB
189	select SYS_SUPPORTS_ZBOOT
190	select COMMON_CLK
191
192config AR7
193	bool "Texas Instruments AR7"
194	select BOOT_ELF32
195	select DMA_NONCOHERENT
196	select CEVT_R4K
197	select CSRC_R4K
198	select IRQ_MIPS_CPU
199	select NO_EXCEPT_FILL
200	select SWAP_IO_SPACE
201	select SYS_HAS_CPU_MIPS32_R1
202	select SYS_HAS_EARLY_PRINTK
203	select SYS_SUPPORTS_32BIT_KERNEL
204	select SYS_SUPPORTS_LITTLE_ENDIAN
205	select SYS_SUPPORTS_MIPS16
206	select SYS_SUPPORTS_ZBOOT_UART16550
207	select GPIOLIB
208	select VLYNQ
209	select HAVE_LEGACY_CLK
210	help
211	  Support for the Texas Instruments AR7 System-on-a-Chip
212	  family: TNETD7100, 7200 and 7300.
213
214config ATH25
215	bool "Atheros AR231x/AR531x SoC support"
216	select CEVT_R4K
217	select CSRC_R4K
218	select DMA_NONCOHERENT
219	select IRQ_MIPS_CPU
220	select IRQ_DOMAIN
221	select SYS_HAS_CPU_MIPS32_R1
222	select SYS_SUPPORTS_BIG_ENDIAN
223	select SYS_SUPPORTS_32BIT_KERNEL
224	select SYS_HAS_EARLY_PRINTK
225	help
226	  Support for Atheros AR231x and Atheros AR531x based boards
227
228config ATH79
229	bool "Atheros AR71XX/AR724X/AR913X based boards"
230	select ARCH_HAS_RESET_CONTROLLER
231	select BOOT_RAW
232	select CEVT_R4K
233	select CSRC_R4K
234	select DMA_NONCOHERENT
235	select GPIOLIB
236	select PINCTRL
237	select COMMON_CLK
238	select IRQ_MIPS_CPU
239	select SYS_HAS_CPU_MIPS32_R2
240	select SYS_HAS_EARLY_PRINTK
241	select SYS_SUPPORTS_32BIT_KERNEL
242	select SYS_SUPPORTS_BIG_ENDIAN
243	select SYS_SUPPORTS_MIPS16
244	select SYS_SUPPORTS_ZBOOT_UART_PROM
245	select USE_OF
246	select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
247	help
248	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
249
250config BMIPS_GENERIC
251	bool "Broadcom Generic BMIPS kernel"
252	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
253	select ARCH_HAS_PHYS_TO_DMA
254	select BOOT_RAW
255	select NO_EXCEPT_FILL
256	select USE_OF
257	select CEVT_R4K
258	select CSRC_R4K
259	select SYNC_R4K
260	select COMMON_CLK
261	select BCM6345_L1_IRQ
262	select BCM7038_L1_IRQ
263	select BCM7120_L2_IRQ
264	select BRCMSTB_L2_IRQ
265	select IRQ_MIPS_CPU
266	select DMA_NONCOHERENT
267	select SYS_SUPPORTS_32BIT_KERNEL
268	select SYS_SUPPORTS_LITTLE_ENDIAN
269	select SYS_SUPPORTS_BIG_ENDIAN
270	select SYS_SUPPORTS_HIGHMEM
271	select SYS_HAS_CPU_BMIPS32_3300
272	select SYS_HAS_CPU_BMIPS4350
273	select SYS_HAS_CPU_BMIPS4380
274	select SYS_HAS_CPU_BMIPS5000
275	select SWAP_IO_SPACE
276	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
277	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
278	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
279	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
280	select HARDIRQS_SW_RESEND
281	help
282	  Build a generic DT-based kernel image that boots on select
283	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
284	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
285	  must be set appropriately for your board.
286
287config BCM47XX
288	bool "Broadcom BCM47XX based boards"
289	select BOOT_RAW
290	select CEVT_R4K
291	select CSRC_R4K
292	select DMA_NONCOHERENT
293	select HAVE_PCI
294	select IRQ_MIPS_CPU
295	select SYS_HAS_CPU_MIPS32_R1
296	select NO_EXCEPT_FILL
297	select SYS_SUPPORTS_32BIT_KERNEL
298	select SYS_SUPPORTS_LITTLE_ENDIAN
299	select SYS_SUPPORTS_MIPS16
300	select SYS_SUPPORTS_ZBOOT
301	select SYS_HAS_EARLY_PRINTK
302	select USE_GENERIC_EARLY_PRINTK_8250
303	select GPIOLIB
304	select LEDS_GPIO_REGISTER
305	select BCM47XX_NVRAM
306	select BCM47XX_SPROM
307	select BCM47XX_SSB if !BCM47XX_BCMA
308	help
309	  Support for BCM47XX based boards
310
311config BCM63XX
312	bool "Broadcom BCM63XX based boards"
313	select BOOT_RAW
314	select CEVT_R4K
315	select CSRC_R4K
316	select SYNC_R4K
317	select DMA_NONCOHERENT
318	select IRQ_MIPS_CPU
319	select SYS_SUPPORTS_32BIT_KERNEL
320	select SYS_SUPPORTS_BIG_ENDIAN
321	select SYS_HAS_EARLY_PRINTK
322	select SWAP_IO_SPACE
323	select GPIOLIB
324	select MIPS_L1_CACHE_SHIFT_4
325	select CLKDEV_LOOKUP
326	select HAVE_LEGACY_CLK
327	help
328	  Support for BCM63XX based boards
329
330config MIPS_COBALT
331	bool "Cobalt Server"
332	select CEVT_R4K
333	select CSRC_R4K
334	select CEVT_GT641XX
335	select DMA_NONCOHERENT
336	select FORCE_PCI
337	select I8253
338	select I8259
339	select IRQ_MIPS_CPU
340	select IRQ_GT641XX
341	select PCI_GT64XXX_PCI0
342	select SYS_HAS_CPU_NEVADA
343	select SYS_HAS_EARLY_PRINTK
344	select SYS_SUPPORTS_32BIT_KERNEL
345	select SYS_SUPPORTS_64BIT_KERNEL
346	select SYS_SUPPORTS_LITTLE_ENDIAN
347	select USE_GENERIC_EARLY_PRINTK_8250
348
349config MACH_DECSTATION
350	bool "DECstations"
351	select BOOT_ELF32
352	select CEVT_DS1287
353	select CEVT_R4K if CPU_R4X00
354	select CSRC_IOASIC
355	select CSRC_R4K if CPU_R4X00
356	select CPU_DADDI_WORKAROUNDS if 64BIT
357	select CPU_R4000_WORKAROUNDS if 64BIT
358	select CPU_R4400_WORKAROUNDS if 64BIT
359	select DMA_NONCOHERENT
360	select NO_IOPORT_MAP
361	select IRQ_MIPS_CPU
362	select SYS_HAS_CPU_R3000
363	select SYS_HAS_CPU_R4X00
364	select SYS_SUPPORTS_32BIT_KERNEL
365	select SYS_SUPPORTS_64BIT_KERNEL
366	select SYS_SUPPORTS_LITTLE_ENDIAN
367	select SYS_SUPPORTS_128HZ
368	select SYS_SUPPORTS_256HZ
369	select SYS_SUPPORTS_1024HZ
370	select MIPS_L1_CACHE_SHIFT_4
371	help
372	  This enables support for DEC's MIPS based workstations.  For details
373	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
374	  DECstation porting pages on <http://decstation.unix-ag.org/>.
375
376	  If you have one of the following DECstation Models you definitely
377	  want to choose R4xx0 for the CPU Type:
378
379		DECstation 5000/50
380		DECstation 5000/150
381		DECstation 5000/260
382		DECsystem 5900/260
383
384	  otherwise choose R3000.
385
386config MACH_JAZZ
387	bool "Jazz family of machines"
388	select ARC_MEMORY
389	select ARC_PROMLIB
390	select ARCH_MIGHT_HAVE_PC_PARPORT
391	select ARCH_MIGHT_HAVE_PC_SERIO
392	select DMA_OPS
393	select FW_ARC
394	select FW_ARC32
395	select ARCH_MAY_HAVE_PC_FDC
396	select CEVT_R4K
397	select CSRC_R4K
398	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
399	select GENERIC_ISA_DMA
400	select HAVE_PCSPKR_PLATFORM
401	select IRQ_MIPS_CPU
402	select I8253
403	select I8259
404	select ISA
405	select SYS_HAS_CPU_R4X00
406	select SYS_SUPPORTS_32BIT_KERNEL
407	select SYS_SUPPORTS_64BIT_KERNEL
408	select SYS_SUPPORTS_100HZ
409	help
410	  This a family of machines based on the MIPS R4030 chipset which was
411	  used by several vendors to build RISC/os and Windows NT workstations.
412	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
413	  Olivetti M700-10 workstations.
414
415config MACH_INGENIC_SOC
416	bool "Ingenic SoC based machines"
417	select MIPS_GENERIC
418	select MACH_INGENIC
419	select SYS_SUPPORTS_ZBOOT_UART16550
420
421config LANTIQ
422	bool "Lantiq based platforms"
423	select DMA_NONCOHERENT
424	select IRQ_MIPS_CPU
425	select CEVT_R4K
426	select CSRC_R4K
427	select SYS_HAS_CPU_MIPS32_R1
428	select SYS_HAS_CPU_MIPS32_R2
429	select SYS_SUPPORTS_BIG_ENDIAN
430	select SYS_SUPPORTS_32BIT_KERNEL
431	select SYS_SUPPORTS_MIPS16
432	select SYS_SUPPORTS_MULTITHREADING
433	select SYS_SUPPORTS_VPE_LOADER
434	select SYS_HAS_EARLY_PRINTK
435	select GPIOLIB
436	select SWAP_IO_SPACE
437	select BOOT_RAW
438	select CLKDEV_LOOKUP
439	select HAVE_LEGACY_CLK
440	select USE_OF
441	select PINCTRL
442	select PINCTRL_LANTIQ
443	select ARCH_HAS_RESET_CONTROLLER
444	select RESET_CONTROLLER
445
446config MACH_LOONGSON32
447	bool "Loongson 32-bit family of machines"
448	select SYS_SUPPORTS_ZBOOT
449	help
450	  This enables support for the Loongson-1 family of machines.
451
452	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
453	  the Institute of Computing Technology (ICT), Chinese Academy of
454	  Sciences (CAS).
455
456config MACH_LOONGSON2EF
457	bool "Loongson-2E/F family of machines"
458	select SYS_SUPPORTS_ZBOOT
459	help
460	  This enables the support of early Loongson-2E/F family of machines.
461
462config MACH_LOONGSON64
463	bool "Loongson 64-bit family of machines"
464	select ARCH_SPARSEMEM_ENABLE
465	select ARCH_MIGHT_HAVE_PC_PARPORT
466	select ARCH_MIGHT_HAVE_PC_SERIO
467	select GENERIC_ISA_DMA_SUPPORT_BROKEN
468	select BOOT_ELF32
469	select BOARD_SCACHE
470	select CSRC_R4K
471	select CEVT_R4K
472	select CPU_HAS_WB
473	select FORCE_PCI
474	select ISA
475	select I8259
476	select IRQ_MIPS_CPU
477	select NO_EXCEPT_FILL
478	select NR_CPUS_DEFAULT_64
479	select USE_GENERIC_EARLY_PRINTK_8250
480	select PCI_DRIVERS_GENERIC
481	select SYS_HAS_CPU_LOONGSON64
482	select SYS_HAS_EARLY_PRINTK
483	select SYS_SUPPORTS_SMP
484	select SYS_SUPPORTS_HOTPLUG_CPU
485	select SYS_SUPPORTS_NUMA
486	select SYS_SUPPORTS_64BIT_KERNEL
487	select SYS_SUPPORTS_HIGHMEM
488	select SYS_SUPPORTS_LITTLE_ENDIAN
489	select SYS_SUPPORTS_ZBOOT
490	select ZONE_DMA32
491	select NUMA
492	select SMP
493	select COMMON_CLK
494	select USE_OF
495	select BUILTIN_DTB
496	select PCI_HOST_GENERIC
497	help
498	  This enables the support of Loongson-2/3 family of machines.
499
500	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
501	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
502	  and Loongson-2F which will be removed), developed by the Institute
503	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
504
505config MACH_PISTACHIO
506	bool "IMG Pistachio SoC based boards"
507	select BOOT_ELF32
508	select BOOT_RAW
509	select CEVT_R4K
510	select CLKSRC_MIPS_GIC
511	select COMMON_CLK
512	select CSRC_R4K
513	select DMA_NONCOHERENT
514	select GPIOLIB
515	select IRQ_MIPS_CPU
516	select MFD_SYSCON
517	select MIPS_CPU_SCACHE
518	select MIPS_GIC
519	select PINCTRL
520	select REGULATOR
521	select SYS_HAS_CPU_MIPS32_R2
522	select SYS_SUPPORTS_32BIT_KERNEL
523	select SYS_SUPPORTS_LITTLE_ENDIAN
524	select SYS_SUPPORTS_MIPS_CPS
525	select SYS_SUPPORTS_MULTITHREADING
526	select SYS_SUPPORTS_RELOCATABLE
527	select SYS_SUPPORTS_ZBOOT
528	select SYS_HAS_EARLY_PRINTK
529	select USE_GENERIC_EARLY_PRINTK_8250
530	select USE_OF
531	help
532	  This enables support for the IMG Pistachio SoC platform.
533
534config MIPS_MALTA
535	bool "MIPS Malta board"
536	select ARCH_MAY_HAVE_PC_FDC
537	select ARCH_MIGHT_HAVE_PC_PARPORT
538	select ARCH_MIGHT_HAVE_PC_SERIO
539	select BOOT_ELF32
540	select BOOT_RAW
541	select BUILTIN_DTB
542	select CEVT_R4K
543	select CLKSRC_MIPS_GIC
544	select COMMON_CLK
545	select CSRC_R4K
546	select DMA_MAYBE_COHERENT
547	select GENERIC_ISA_DMA
548	select HAVE_PCSPKR_PLATFORM
549	select HAVE_PCI
550	select I8253
551	select I8259
552	select IRQ_MIPS_CPU
553	select MIPS_BONITO64
554	select MIPS_CPU_SCACHE
555	select MIPS_GIC
556	select MIPS_L1_CACHE_SHIFT_6
557	select MIPS_MSC
558	select PCI_GT64XXX_PCI0
559	select SMP_UP if SMP
560	select SWAP_IO_SPACE
561	select SYS_HAS_CPU_MIPS32_R1
562	select SYS_HAS_CPU_MIPS32_R2
563	select SYS_HAS_CPU_MIPS32_R3_5
564	select SYS_HAS_CPU_MIPS32_R5
565	select SYS_HAS_CPU_MIPS32_R6
566	select SYS_HAS_CPU_MIPS64_R1
567	select SYS_HAS_CPU_MIPS64_R2
568	select SYS_HAS_CPU_MIPS64_R6
569	select SYS_HAS_CPU_NEVADA
570	select SYS_HAS_CPU_RM7000
571	select SYS_SUPPORTS_32BIT_KERNEL
572	select SYS_SUPPORTS_64BIT_KERNEL
573	select SYS_SUPPORTS_BIG_ENDIAN
574	select SYS_SUPPORTS_HIGHMEM
575	select SYS_SUPPORTS_LITTLE_ENDIAN
576	select SYS_SUPPORTS_MICROMIPS
577	select SYS_SUPPORTS_MIPS16
578	select SYS_SUPPORTS_MIPS_CMP
579	select SYS_SUPPORTS_MIPS_CPS
580	select SYS_SUPPORTS_MULTITHREADING
581	select SYS_SUPPORTS_RELOCATABLE
582	select SYS_SUPPORTS_SMARTMIPS
583	select SYS_SUPPORTS_VPE_LOADER
584	select SYS_SUPPORTS_ZBOOT
585	select USE_OF
586	select WAR_ICACHE_REFILLS
587	select ZONE_DMA32 if 64BIT
588	help
589	  This enables support for the MIPS Technologies Malta evaluation
590	  board.
591
592config MACH_PIC32
593	bool "Microchip PIC32 Family"
594	help
595	  This enables support for the Microchip PIC32 family of platforms.
596
597	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
598	  microcontrollers.
599
600config MACH_VR41XX
601	bool "NEC VR4100 series based machines"
602	select CEVT_R4K
603	select CSRC_R4K
604	select SYS_HAS_CPU_VR41XX
605	select SYS_SUPPORTS_MIPS16
606	select GPIOLIB
607
608config RALINK
609	bool "Ralink based machines"
610	select CEVT_R4K
611	select CSRC_R4K
612	select BOOT_RAW
613	select DMA_NONCOHERENT
614	select IRQ_MIPS_CPU
615	select USE_OF
616	select SYS_HAS_CPU_MIPS32_R1
617	select SYS_HAS_CPU_MIPS32_R2
618	select SYS_SUPPORTS_32BIT_KERNEL
619	select SYS_SUPPORTS_LITTLE_ENDIAN
620	select SYS_SUPPORTS_MIPS16
621	select SYS_SUPPORTS_ZBOOT
622	select SYS_HAS_EARLY_PRINTK
623	select CLKDEV_LOOKUP
624	select ARCH_HAS_RESET_CONTROLLER
625	select RESET_CONTROLLER
626
627config SGI_IP22
628	bool "SGI IP22 (Indy/Indigo2)"
629	select ARC_MEMORY
630	select ARC_PROMLIB
631	select FW_ARC
632	select FW_ARC32
633	select ARCH_MIGHT_HAVE_PC_SERIO
634	select BOOT_ELF32
635	select CEVT_R4K
636	select CSRC_R4K
637	select DEFAULT_SGI_PARTITION
638	select DMA_NONCOHERENT
639	select HAVE_EISA
640	select I8253
641	select I8259
642	select IP22_CPU_SCACHE
643	select IRQ_MIPS_CPU
644	select GENERIC_ISA_DMA_SUPPORT_BROKEN
645	select SGI_HAS_I8042
646	select SGI_HAS_INDYDOG
647	select SGI_HAS_HAL2
648	select SGI_HAS_SEEQ
649	select SGI_HAS_WD93
650	select SGI_HAS_ZILOG
651	select SWAP_IO_SPACE
652	select SYS_HAS_CPU_R4X00
653	select SYS_HAS_CPU_R5000
654	select SYS_HAS_EARLY_PRINTK
655	select SYS_SUPPORTS_32BIT_KERNEL
656	select SYS_SUPPORTS_64BIT_KERNEL
657	select SYS_SUPPORTS_BIG_ENDIAN
658	select WAR_R4600_V1_INDEX_ICACHEOP
659	select WAR_R4600_V1_HIT_CACHEOP
660	select WAR_R4600_V2_HIT_CACHEOP
661	select MIPS_L1_CACHE_SHIFT_7
662	help
663	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
664	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
665	  that runs on these, say Y here.
666
667config SGI_IP27
668	bool "SGI IP27 (Origin200/2000)"
669	select ARCH_HAS_PHYS_TO_DMA
670	select ARCH_SPARSEMEM_ENABLE
671	select FW_ARC
672	select FW_ARC64
673	select ARC_CMDLINE_ONLY
674	select BOOT_ELF64
675	select DEFAULT_SGI_PARTITION
676	select SYS_HAS_EARLY_PRINTK
677	select HAVE_PCI
678	select IRQ_MIPS_CPU
679	select IRQ_DOMAIN_HIERARCHY
680	select NR_CPUS_DEFAULT_64
681	select PCI_DRIVERS_GENERIC
682	select PCI_XTALK_BRIDGE
683	select SYS_HAS_CPU_R10000
684	select SYS_SUPPORTS_64BIT_KERNEL
685	select SYS_SUPPORTS_BIG_ENDIAN
686	select SYS_SUPPORTS_NUMA
687	select SYS_SUPPORTS_SMP
688	select WAR_R10000_LLSC
689	select MIPS_L1_CACHE_SHIFT_7
690	select NUMA
691	help
692	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
693	  workstations.  To compile a Linux kernel that runs on these, say Y
694	  here.
695
696config SGI_IP28
697	bool "SGI IP28 (Indigo2 R10k)"
698	select ARC_MEMORY
699	select ARC_PROMLIB
700	select FW_ARC
701	select FW_ARC64
702	select ARCH_MIGHT_HAVE_PC_SERIO
703	select BOOT_ELF64
704	select CEVT_R4K
705	select CSRC_R4K
706	select DEFAULT_SGI_PARTITION
707	select DMA_NONCOHERENT
708	select GENERIC_ISA_DMA_SUPPORT_BROKEN
709	select IRQ_MIPS_CPU
710	select HAVE_EISA
711	select I8253
712	select I8259
713	select SGI_HAS_I8042
714	select SGI_HAS_INDYDOG
715	select SGI_HAS_HAL2
716	select SGI_HAS_SEEQ
717	select SGI_HAS_WD93
718	select SGI_HAS_ZILOG
719	select SWAP_IO_SPACE
720	select SYS_HAS_CPU_R10000
721	select SYS_HAS_EARLY_PRINTK
722	select SYS_SUPPORTS_64BIT_KERNEL
723	select SYS_SUPPORTS_BIG_ENDIAN
724	select WAR_R10000_LLSC
725	select MIPS_L1_CACHE_SHIFT_7
726	help
727	  This is the SGI Indigo2 with R10000 processor.  To compile a Linux
728	  kernel that runs on these, say Y here.
729
730config SGI_IP30
731	bool "SGI IP30 (Octane/Octane2)"
732	select ARCH_HAS_PHYS_TO_DMA
733	select FW_ARC
734	select FW_ARC64
735	select BOOT_ELF64
736	select CEVT_R4K
737	select CSRC_R4K
738	select SYNC_R4K if SMP
739	select ZONE_DMA32
740	select HAVE_PCI
741	select IRQ_MIPS_CPU
742	select IRQ_DOMAIN_HIERARCHY
743	select NR_CPUS_DEFAULT_2
744	select PCI_DRIVERS_GENERIC
745	select PCI_XTALK_BRIDGE
746	select SYS_HAS_EARLY_PRINTK
747	select SYS_HAS_CPU_R10000
748	select SYS_SUPPORTS_64BIT_KERNEL
749	select SYS_SUPPORTS_BIG_ENDIAN
750	select SYS_SUPPORTS_SMP
751	select WAR_R10000_LLSC
752	select MIPS_L1_CACHE_SHIFT_7
753	select ARC_MEMORY
754	help
755	  These are the SGI Octane and Octane2 graphics workstations.  To
756	  compile a Linux kernel that runs on these, say Y here.
757
758config SGI_IP32
759	bool "SGI IP32 (O2)"
760	select ARC_MEMORY
761	select ARC_PROMLIB
762	select ARCH_HAS_PHYS_TO_DMA
763	select FW_ARC
764	select FW_ARC32
765	select BOOT_ELF32
766	select CEVT_R4K
767	select CSRC_R4K
768	select DMA_NONCOHERENT
769	select HAVE_PCI
770	select IRQ_MIPS_CPU
771	select R5000_CPU_SCACHE
772	select RM7000_CPU_SCACHE
773	select SYS_HAS_CPU_R5000
774	select SYS_HAS_CPU_R10000 if BROKEN
775	select SYS_HAS_CPU_RM7000
776	select SYS_HAS_CPU_NEVADA
777	select SYS_SUPPORTS_64BIT_KERNEL
778	select SYS_SUPPORTS_BIG_ENDIAN
779	select WAR_ICACHE_REFILLS
780	help
781	  If you want this kernel to run on SGI O2 workstation, say Y here.
782
783config SIBYTE_CRHINE
784	bool "Sibyte BCM91120C-CRhine"
785	select BOOT_ELF32
786	select SIBYTE_BCM1120
787	select SWAP_IO_SPACE
788	select SYS_HAS_CPU_SB1
789	select SYS_SUPPORTS_BIG_ENDIAN
790	select SYS_SUPPORTS_LITTLE_ENDIAN
791
792config SIBYTE_CARMEL
793	bool "Sibyte BCM91120x-Carmel"
794	select BOOT_ELF32
795	select SIBYTE_BCM1120
796	select SWAP_IO_SPACE
797	select SYS_HAS_CPU_SB1
798	select SYS_SUPPORTS_BIG_ENDIAN
799	select SYS_SUPPORTS_LITTLE_ENDIAN
800
801config SIBYTE_CRHONE
802	bool "Sibyte BCM91125C-CRhone"
803	select BOOT_ELF32
804	select SIBYTE_BCM1125
805	select SWAP_IO_SPACE
806	select SYS_HAS_CPU_SB1
807	select SYS_SUPPORTS_BIG_ENDIAN
808	select SYS_SUPPORTS_HIGHMEM
809	select SYS_SUPPORTS_LITTLE_ENDIAN
810
811config SIBYTE_RHONE
812	bool "Sibyte BCM91125E-Rhone"
813	select BOOT_ELF32
814	select SIBYTE_BCM1125H
815	select SWAP_IO_SPACE
816	select SYS_HAS_CPU_SB1
817	select SYS_SUPPORTS_BIG_ENDIAN
818	select SYS_SUPPORTS_LITTLE_ENDIAN
819
820config SIBYTE_SWARM
821	bool "Sibyte BCM91250A-SWARM"
822	select BOOT_ELF32
823	select HAVE_PATA_PLATFORM
824	select SIBYTE_SB1250
825	select SWAP_IO_SPACE
826	select SYS_HAS_CPU_SB1
827	select SYS_SUPPORTS_BIG_ENDIAN
828	select SYS_SUPPORTS_HIGHMEM
829	select SYS_SUPPORTS_LITTLE_ENDIAN
830	select ZONE_DMA32 if 64BIT
831	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
832
833config SIBYTE_LITTLESUR
834	bool "Sibyte BCM91250C2-LittleSur"
835	select BOOT_ELF32
836	select HAVE_PATA_PLATFORM
837	select SIBYTE_SB1250
838	select SWAP_IO_SPACE
839	select SYS_HAS_CPU_SB1
840	select SYS_SUPPORTS_BIG_ENDIAN
841	select SYS_SUPPORTS_HIGHMEM
842	select SYS_SUPPORTS_LITTLE_ENDIAN
843	select ZONE_DMA32 if 64BIT
844
845config SIBYTE_SENTOSA
846	bool "Sibyte BCM91250E-Sentosa"
847	select BOOT_ELF32
848	select SIBYTE_SB1250
849	select SWAP_IO_SPACE
850	select SYS_HAS_CPU_SB1
851	select SYS_SUPPORTS_BIG_ENDIAN
852	select SYS_SUPPORTS_LITTLE_ENDIAN
853	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
854
855config SIBYTE_BIGSUR
856	bool "Sibyte BCM91480B-BigSur"
857	select BOOT_ELF32
858	select NR_CPUS_DEFAULT_4
859	select SIBYTE_BCM1x80
860	select SWAP_IO_SPACE
861	select SYS_HAS_CPU_SB1
862	select SYS_SUPPORTS_BIG_ENDIAN
863	select SYS_SUPPORTS_HIGHMEM
864	select SYS_SUPPORTS_LITTLE_ENDIAN
865	select ZONE_DMA32 if 64BIT
866	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
867
868config SNI_RM
869	bool "SNI RM200/300/400"
870	select ARC_MEMORY
871	select ARC_PROMLIB
872	select FW_ARC if CPU_LITTLE_ENDIAN
873	select FW_ARC32 if CPU_LITTLE_ENDIAN
874	select FW_SNIPROM if CPU_BIG_ENDIAN
875	select ARCH_MAY_HAVE_PC_FDC
876	select ARCH_MIGHT_HAVE_PC_PARPORT
877	select ARCH_MIGHT_HAVE_PC_SERIO
878	select BOOT_ELF32
879	select CEVT_R4K
880	select CSRC_R4K
881	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
882	select DMA_NONCOHERENT
883	select GENERIC_ISA_DMA
884	select HAVE_EISA
885	select HAVE_PCSPKR_PLATFORM
886	select HAVE_PCI
887	select IRQ_MIPS_CPU
888	select I8253
889	select I8259
890	select ISA
891	select MIPS_L1_CACHE_SHIFT_6
892	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
893	select SYS_HAS_CPU_R4X00
894	select SYS_HAS_CPU_R5000
895	select SYS_HAS_CPU_R10000
896	select R5000_CPU_SCACHE
897	select SYS_HAS_EARLY_PRINTK
898	select SYS_SUPPORTS_32BIT_KERNEL
899	select SYS_SUPPORTS_64BIT_KERNEL
900	select SYS_SUPPORTS_BIG_ENDIAN
901	select SYS_SUPPORTS_HIGHMEM
902	select SYS_SUPPORTS_LITTLE_ENDIAN
903	select WAR_R4600_V2_HIT_CACHEOP
904	help
905	  The SNI RM200/300/400 are MIPS-based machines manufactured by
906	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
907	  Technology and now in turn merged with Fujitsu.  Say Y here to
908	  support this machine type.
909
910config MACH_TX39XX
911	bool "Toshiba TX39 series based machines"
912
913config MACH_TX49XX
914	bool "Toshiba TX49 series based machines"
915	select WAR_TX49XX_ICACHE_INDEX_INV
916
917config MIKROTIK_RB532
918	bool "Mikrotik RB532 boards"
919	select CEVT_R4K
920	select CSRC_R4K
921	select DMA_NONCOHERENT
922	select HAVE_PCI
923	select IRQ_MIPS_CPU
924	select SYS_HAS_CPU_MIPS32_R1
925	select SYS_SUPPORTS_32BIT_KERNEL
926	select SYS_SUPPORTS_LITTLE_ENDIAN
927	select SWAP_IO_SPACE
928	select BOOT_RAW
929	select GPIOLIB
930	select MIPS_L1_CACHE_SHIFT_4
931	help
932	  Support the Mikrotik(tm) RouterBoard 532 series,
933	  based on the IDT RC32434 SoC.
934
935config CAVIUM_OCTEON_SOC
936	bool "Cavium Networks Octeon SoC based boards"
937	select CEVT_R4K
938	select ARCH_HAS_PHYS_TO_DMA
939	select HAVE_RAPIDIO
940	select PHYS_ADDR_T_64BIT
941	select SYS_SUPPORTS_64BIT_KERNEL
942	select SYS_SUPPORTS_BIG_ENDIAN
943	select EDAC_SUPPORT
944	select EDAC_ATOMIC_SCRUB
945	select SYS_SUPPORTS_LITTLE_ENDIAN
946	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
947	select SYS_HAS_EARLY_PRINTK
948	select SYS_HAS_CPU_CAVIUM_OCTEON
949	select HAVE_PCI
950	select HAVE_PLAT_DELAY
951	select HAVE_PLAT_FW_INIT_CMDLINE
952	select HAVE_PLAT_MEMCPY
953	select ZONE_DMA32
954	select HOLES_IN_ZONE
955	select GPIOLIB
956	select USE_OF
957	select ARCH_SPARSEMEM_ENABLE
958	select SYS_SUPPORTS_SMP
959	select NR_CPUS_DEFAULT_64
960	select MIPS_NR_CPU_NR_MAP_1024
961	select BUILTIN_DTB
962	select MTD_COMPLEX_MAPPINGS
963	select SWIOTLB
964	select SYS_SUPPORTS_RELOCATABLE
965	help
966	  This option supports all of the Octeon reference boards from Cavium
967	  Networks. It builds a kernel that dynamically determines the Octeon
968	  CPU type and supports all known board reference implementations.
969	  Some of the supported boards are:
970		EBT3000
971		EBH3000
972		EBH3100
973		Thunder
974		Kodama
975		Hikari
976	  Say Y here for most Octeon reference boards.
977
978config NLM_XLR_BOARD
979	bool "Netlogic XLR/XLS based systems"
980	select BOOT_ELF32
981	select NLM_COMMON
982	select SYS_HAS_CPU_XLR
983	select SYS_SUPPORTS_SMP
984	select HAVE_PCI
985	select SWAP_IO_SPACE
986	select SYS_SUPPORTS_32BIT_KERNEL
987	select SYS_SUPPORTS_64BIT_KERNEL
988	select PHYS_ADDR_T_64BIT
989	select SYS_SUPPORTS_BIG_ENDIAN
990	select SYS_SUPPORTS_HIGHMEM
991	select NR_CPUS_DEFAULT_32
992	select CEVT_R4K
993	select CSRC_R4K
994	select IRQ_MIPS_CPU
995	select ZONE_DMA32 if 64BIT
996	select SYNC_R4K
997	select SYS_HAS_EARLY_PRINTK
998	select SYS_SUPPORTS_ZBOOT
999	select SYS_SUPPORTS_ZBOOT_UART16550
1000	help
1001	  Support for systems based on Netlogic XLR and XLS processors.
1002	  Say Y here if you have a XLR or XLS based board.
1003
1004config NLM_XLP_BOARD
1005	bool "Netlogic XLP based systems"
1006	select BOOT_ELF32
1007	select NLM_COMMON
1008	select SYS_HAS_CPU_XLP
1009	select SYS_SUPPORTS_SMP
1010	select HAVE_PCI
1011	select SYS_SUPPORTS_32BIT_KERNEL
1012	select SYS_SUPPORTS_64BIT_KERNEL
1013	select PHYS_ADDR_T_64BIT
1014	select GPIOLIB
1015	select SYS_SUPPORTS_BIG_ENDIAN
1016	select SYS_SUPPORTS_LITTLE_ENDIAN
1017	select SYS_SUPPORTS_HIGHMEM
1018	select NR_CPUS_DEFAULT_32
1019	select CEVT_R4K
1020	select CSRC_R4K
1021	select IRQ_MIPS_CPU
1022	select ZONE_DMA32 if 64BIT
1023	select SYNC_R4K
1024	select SYS_HAS_EARLY_PRINTK
1025	select USE_OF
1026	select SYS_SUPPORTS_ZBOOT
1027	select SYS_SUPPORTS_ZBOOT_UART16550
1028	help
1029	  This board is based on Netlogic XLP Processor.
1030	  Say Y here if you have a XLP based board.
1031
1032endchoice
1033
1034source "arch/mips/alchemy/Kconfig"
1035source "arch/mips/ath25/Kconfig"
1036source "arch/mips/ath79/Kconfig"
1037source "arch/mips/bcm47xx/Kconfig"
1038source "arch/mips/bcm63xx/Kconfig"
1039source "arch/mips/bmips/Kconfig"
1040source "arch/mips/generic/Kconfig"
1041source "arch/mips/ingenic/Kconfig"
1042source "arch/mips/jazz/Kconfig"
1043source "arch/mips/lantiq/Kconfig"
1044source "arch/mips/pic32/Kconfig"
1045source "arch/mips/pistachio/Kconfig"
1046source "arch/mips/ralink/Kconfig"
1047source "arch/mips/sgi-ip27/Kconfig"
1048source "arch/mips/sibyte/Kconfig"
1049source "arch/mips/txx9/Kconfig"
1050source "arch/mips/vr41xx/Kconfig"
1051source "arch/mips/cavium-octeon/Kconfig"
1052source "arch/mips/loongson2ef/Kconfig"
1053source "arch/mips/loongson32/Kconfig"
1054source "arch/mips/loongson64/Kconfig"
1055source "arch/mips/netlogic/Kconfig"
1056
1057endmenu
1058
1059config GENERIC_HWEIGHT
1060	bool
1061	default y
1062
1063config GENERIC_CALIBRATE_DELAY
1064	bool
1065	default y
1066
1067config SCHED_OMIT_FRAME_POINTER
1068	bool
1069	default y
1070
1071#
1072# Select some configuration options automatically based on user selections.
1073#
1074config FW_ARC
1075	bool
1076
1077config ARCH_MAY_HAVE_PC_FDC
1078	bool
1079
1080config BOOT_RAW
1081	bool
1082
1083config CEVT_BCM1480
1084	bool
1085
1086config CEVT_DS1287
1087	bool
1088
1089config CEVT_GT641XX
1090	bool
1091
1092config CEVT_R4K
1093	bool
1094
1095config CEVT_SB1250
1096	bool
1097
1098config CEVT_TXX9
1099	bool
1100
1101config CSRC_BCM1480
1102	bool
1103
1104config CSRC_IOASIC
1105	bool
1106
1107config CSRC_R4K
1108	select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1109	bool
1110
1111config CSRC_SB1250
1112	bool
1113
1114config MIPS_CLOCK_VSYSCALL
1115	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1116
1117config GPIO_TXX9
1118	select GPIOLIB
1119	bool
1120
1121config FW_CFE
1122	bool
1123
1124config ARCH_SUPPORTS_UPROBES
1125	bool
1126
1127config DMA_MAYBE_COHERENT
1128	select ARCH_HAS_DMA_COHERENCE_H
1129	select DMA_NONCOHERENT
1130	bool
1131
1132config DMA_PERDEV_COHERENT
1133	bool
1134	select ARCH_HAS_SETUP_DMA_OPS
1135	select DMA_NONCOHERENT
1136
1137config DMA_NONCOHERENT
1138	bool
1139	#
1140	# MIPS allows mixing "slightly different" Cacheability and Coherency
1141	# Attribute bits.  It is believed that the uncached access through
1142	# KSEG1 and the implementation specific "uncached accelerated" used
1143	# by pgprot_writcombine can be mixed, and the latter sometimes provides
1144	# significant advantages.
1145	#
1146	select ARCH_HAS_DMA_WRITE_COMBINE
1147	select ARCH_HAS_DMA_PREP_COHERENT
1148	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1149	select ARCH_HAS_DMA_SET_UNCACHED
1150	select DMA_NONCOHERENT_MMAP
1151	select NEED_DMA_MAP_STATE
1152
1153config SYS_HAS_EARLY_PRINTK
1154	bool
1155
1156config SYS_SUPPORTS_HOTPLUG_CPU
1157	bool
1158
1159config MIPS_BONITO64
1160	bool
1161
1162config MIPS_MSC
1163	bool
1164
1165config SYNC_R4K
1166	bool
1167
1168config NO_IOPORT_MAP
1169	def_bool n
1170
1171config GENERIC_CSUM
1172	def_bool CPU_NO_LOAD_STORE_LR
1173
1174config GENERIC_ISA_DMA
1175	bool
1176	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1177	select ISA_DMA_API
1178
1179config GENERIC_ISA_DMA_SUPPORT_BROKEN
1180	bool
1181	select GENERIC_ISA_DMA
1182
1183config HAVE_PLAT_DELAY
1184	bool
1185
1186config HAVE_PLAT_FW_INIT_CMDLINE
1187	bool
1188
1189config HAVE_PLAT_MEMCPY
1190	bool
1191
1192config ISA_DMA_API
1193	bool
1194
1195config HOLES_IN_ZONE
1196	bool
1197
1198config SYS_SUPPORTS_RELOCATABLE
1199	bool
1200	help
1201	  Selected if the platform supports relocating the kernel.
1202	  The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1203	  to allow access to command line and entropy sources.
1204
1205config MIPS_CBPF_JIT
1206	def_bool y
1207	depends on BPF_JIT && HAVE_CBPF_JIT
1208
1209config MIPS_EBPF_JIT
1210	def_bool y
1211	depends on BPF_JIT && HAVE_EBPF_JIT
1212
1213
1214#
1215# Endianness selection.  Sufficiently obscure so many users don't know what to
1216# answer,so we try hard to limit the available choices.  Also the use of a
1217# choice statement should be more obvious to the user.
1218#
1219choice
1220	prompt "Endianness selection"
1221	help
1222	  Some MIPS machines can be configured for either little or big endian
1223	  byte order. These modes require different kernels and a different
1224	  Linux distribution.  In general there is one preferred byteorder for a
1225	  particular system but some systems are just as commonly used in the
1226	  one or the other endianness.
1227
1228config CPU_BIG_ENDIAN
1229	bool "Big endian"
1230	depends on SYS_SUPPORTS_BIG_ENDIAN
1231
1232config CPU_LITTLE_ENDIAN
1233	bool "Little endian"
1234	depends on SYS_SUPPORTS_LITTLE_ENDIAN
1235
1236endchoice
1237
1238config EXPORT_UASM
1239	bool
1240
1241config SYS_SUPPORTS_APM_EMULATION
1242	bool
1243
1244config SYS_SUPPORTS_BIG_ENDIAN
1245	bool
1246
1247config SYS_SUPPORTS_LITTLE_ENDIAN
1248	bool
1249
1250config SYS_SUPPORTS_HUGETLBFS
1251	bool
1252	depends on CPU_SUPPORTS_HUGEPAGES
1253	default y
1254
1255config MIPS_HUGE_TLB_SUPPORT
1256	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1257
1258config IRQ_CPU_RM7K
1259	bool
1260
1261config IRQ_MSP_SLP
1262	bool
1263
1264config IRQ_MSP_CIC
1265	bool
1266
1267config IRQ_TXX9
1268	bool
1269
1270config IRQ_GT641XX
1271	bool
1272
1273config PCI_GT64XXX_PCI0
1274	bool
1275
1276config PCI_XTALK_BRIDGE
1277	bool
1278
1279config NO_EXCEPT_FILL
1280	bool
1281
1282config MIPS_SPRAM
1283	bool
1284
1285config SWAP_IO_SPACE
1286	bool
1287
1288config SGI_HAS_INDYDOG
1289	bool
1290
1291config SGI_HAS_HAL2
1292	bool
1293
1294config SGI_HAS_SEEQ
1295	bool
1296
1297config SGI_HAS_WD93
1298	bool
1299
1300config SGI_HAS_ZILOG
1301	bool
1302
1303config SGI_HAS_I8042
1304	bool
1305
1306config DEFAULT_SGI_PARTITION
1307	bool
1308
1309config FW_ARC32
1310	bool
1311
1312config FW_SNIPROM
1313	bool
1314
1315config BOOT_ELF32
1316	bool
1317
1318config MIPS_L1_CACHE_SHIFT_4
1319	bool
1320
1321config MIPS_L1_CACHE_SHIFT_5
1322	bool
1323
1324config MIPS_L1_CACHE_SHIFT_6
1325	bool
1326
1327config MIPS_L1_CACHE_SHIFT_7
1328	bool
1329
1330config MIPS_L1_CACHE_SHIFT
1331	int
1332	default "7" if MIPS_L1_CACHE_SHIFT_7
1333	default "6" if MIPS_L1_CACHE_SHIFT_6
1334	default "5" if MIPS_L1_CACHE_SHIFT_5
1335	default "4" if MIPS_L1_CACHE_SHIFT_4
1336	default "5"
1337
1338config ARC_CMDLINE_ONLY
1339	bool
1340
1341config ARC_CONSOLE
1342	bool "ARC console support"
1343	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1344
1345config ARC_MEMORY
1346	bool
1347
1348config ARC_PROMLIB
1349	bool
1350
1351config FW_ARC64
1352	bool
1353
1354config BOOT_ELF64
1355	bool
1356
1357menu "CPU selection"
1358
1359choice
1360	prompt "CPU type"
1361	default CPU_R4X00
1362
1363config CPU_LOONGSON64
1364	bool "Loongson 64-bit CPU"
1365	depends on SYS_HAS_CPU_LOONGSON64
1366	select ARCH_HAS_PHYS_TO_DMA
1367	select CPU_MIPSR2
1368	select CPU_HAS_PREFETCH
1369	select CPU_SUPPORTS_64BIT_KERNEL
1370	select CPU_SUPPORTS_HIGHMEM
1371	select CPU_SUPPORTS_HUGEPAGES
1372	select CPU_SUPPORTS_MSA
1373	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1374	select CPU_MIPSR2_IRQ_VI
1375	select WEAK_ORDERING
1376	select WEAK_REORDERING_BEYOND_LLSC
1377	select MIPS_ASID_BITS_VARIABLE
1378	select MIPS_PGD_C0_CONTEXT
1379	select MIPS_L1_CACHE_SHIFT_6
1380	select GPIOLIB
1381	select SWIOTLB
1382	select HAVE_KVM
1383	help
1384		The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1385		cores implements the MIPS64R2 instruction set with many extensions,
1386		including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1387		3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1388		Loongson-2E/2F is not covered here and will be removed in future.
1389
1390config LOONGSON3_ENHANCEMENT
1391	bool "New Loongson-3 CPU Enhancements"
1392	default n
1393	depends on CPU_LOONGSON64
1394	help
1395	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1396	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1397	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1398	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1399	  Fast TLB refill support, etc.
1400
1401	  This option enable those enhancements which are not probed at run
1402	  time. If you want a generic kernel to run on all Loongson 3 machines,
1403	  please say 'N' here. If you want a high-performance kernel to run on
1404	  new Loongson-3 machines only, please say 'Y' here.
1405
1406config CPU_LOONGSON3_WORKAROUNDS
1407	bool "Old Loongson-3 LLSC Workarounds"
1408	default y if SMP
1409	depends on CPU_LOONGSON64
1410	help
1411	  Loongson-3 processors have the llsc issues which require workarounds.
1412	  Without workarounds the system may hang unexpectedly.
1413
1414	  Newer Loongson-3 will fix these issues and no workarounds are needed.
1415	  The workarounds have no significant side effect on them but may
1416	  decrease the performance of the system so this option should be
1417	  disabled unless the kernel is intended to be run on old systems.
1418
1419	  If unsure, please say Y.
1420
1421config CPU_LOONGSON3_CPUCFG_EMULATION
1422	bool "Emulate the CPUCFG instruction on older Loongson cores"
1423	default y
1424	depends on CPU_LOONGSON64
1425	help
1426	  Loongson-3A R4 and newer have the CPUCFG instruction available for
1427	  userland to query CPU capabilities, much like CPUID on x86. This
1428	  option provides emulation of the instruction on older Loongson
1429	  cores, back to Loongson-3A1000.
1430
1431	  If unsure, please say Y.
1432
1433config CPU_LOONGSON2E
1434	bool "Loongson 2E"
1435	depends on SYS_HAS_CPU_LOONGSON2E
1436	select CPU_LOONGSON2EF
1437	help
1438	  The Loongson 2E processor implements the MIPS III instruction set
1439	  with many extensions.
1440
1441	  It has an internal FPGA northbridge, which is compatible to
1442	  bonito64.
1443
1444config CPU_LOONGSON2F
1445	bool "Loongson 2F"
1446	depends on SYS_HAS_CPU_LOONGSON2F
1447	select CPU_LOONGSON2EF
1448	select GPIOLIB
1449	help
1450	  The Loongson 2F processor implements the MIPS III instruction set
1451	  with many extensions.
1452
1453	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1454	  have a similar programming interface with FPGA northbridge used in
1455	  Loongson2E.
1456
1457config CPU_LOONGSON1B
1458	bool "Loongson 1B"
1459	depends on SYS_HAS_CPU_LOONGSON1B
1460	select CPU_LOONGSON32
1461	select LEDS_GPIO_REGISTER
1462	help
1463	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1464	  Release 1 instruction set and part of the MIPS32 Release 2
1465	  instruction set.
1466
1467config CPU_LOONGSON1C
1468	bool "Loongson 1C"
1469	depends on SYS_HAS_CPU_LOONGSON1C
1470	select CPU_LOONGSON32
1471	select LEDS_GPIO_REGISTER
1472	help
1473	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1474	  Release 1 instruction set and part of the MIPS32 Release 2
1475	  instruction set.
1476
1477config CPU_MIPS32_R1
1478	bool "MIPS32 Release 1"
1479	depends on SYS_HAS_CPU_MIPS32_R1
1480	select CPU_HAS_PREFETCH
1481	select CPU_SUPPORTS_32BIT_KERNEL
1482	select CPU_SUPPORTS_HIGHMEM
1483	help
1484	  Choose this option to build a kernel for release 1 or later of the
1485	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1486	  MIPS processor are based on a MIPS32 processor.  If you know the
1487	  specific type of processor in your system, choose those that one
1488	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1489	  Release 2 of the MIPS32 architecture is available since several
1490	  years so chances are you even have a MIPS32 Release 2 processor
1491	  in which case you should choose CPU_MIPS32_R2 instead for better
1492	  performance.
1493
1494config CPU_MIPS32_R2
1495	bool "MIPS32 Release 2"
1496	depends on SYS_HAS_CPU_MIPS32_R2
1497	select CPU_HAS_PREFETCH
1498	select CPU_SUPPORTS_32BIT_KERNEL
1499	select CPU_SUPPORTS_HIGHMEM
1500	select CPU_SUPPORTS_MSA
1501	select HAVE_KVM
1502	help
1503	  Choose this option to build a kernel for release 2 or later of the
1504	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1505	  MIPS processor are based on a MIPS32 processor.  If you know the
1506	  specific type of processor in your system, choose those that one
1507	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1508
1509config CPU_MIPS32_R5
1510	bool "MIPS32 Release 5"
1511	depends on SYS_HAS_CPU_MIPS32_R5
1512	select CPU_HAS_PREFETCH
1513	select CPU_SUPPORTS_32BIT_KERNEL
1514	select CPU_SUPPORTS_HIGHMEM
1515	select CPU_SUPPORTS_MSA
1516	select HAVE_KVM
1517	select MIPS_O32_FP64_SUPPORT
1518	help
1519	  Choose this option to build a kernel for release 5 or later of the
1520	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1521	  family, are based on a MIPS32r5 processor. If you own an older
1522	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1523
1524config CPU_MIPS32_R6
1525	bool "MIPS32 Release 6"
1526	depends on SYS_HAS_CPU_MIPS32_R6
1527	select CPU_HAS_PREFETCH
1528	select CPU_NO_LOAD_STORE_LR
1529	select CPU_SUPPORTS_32BIT_KERNEL
1530	select CPU_SUPPORTS_HIGHMEM
1531	select CPU_SUPPORTS_MSA
1532	select HAVE_KVM
1533	select MIPS_O32_FP64_SUPPORT
1534	help
1535	  Choose this option to build a kernel for release 6 or later of the
1536	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1537	  family, are based on a MIPS32r6 processor. If you own an older
1538	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1539
1540config CPU_MIPS64_R1
1541	bool "MIPS64 Release 1"
1542	depends on SYS_HAS_CPU_MIPS64_R1
1543	select CPU_HAS_PREFETCH
1544	select CPU_SUPPORTS_32BIT_KERNEL
1545	select CPU_SUPPORTS_64BIT_KERNEL
1546	select CPU_SUPPORTS_HIGHMEM
1547	select CPU_SUPPORTS_HUGEPAGES
1548	help
1549	  Choose this option to build a kernel for release 1 or later of the
1550	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1551	  MIPS processor are based on a MIPS64 processor.  If you know the
1552	  specific type of processor in your system, choose those that one
1553	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1554	  Release 2 of the MIPS64 architecture is available since several
1555	  years so chances are you even have a MIPS64 Release 2 processor
1556	  in which case you should choose CPU_MIPS64_R2 instead for better
1557	  performance.
1558
1559config CPU_MIPS64_R2
1560	bool "MIPS64 Release 2"
1561	depends on SYS_HAS_CPU_MIPS64_R2
1562	select CPU_HAS_PREFETCH
1563	select CPU_SUPPORTS_32BIT_KERNEL
1564	select CPU_SUPPORTS_64BIT_KERNEL
1565	select CPU_SUPPORTS_HIGHMEM
1566	select CPU_SUPPORTS_HUGEPAGES
1567	select CPU_SUPPORTS_MSA
1568	select HAVE_KVM
1569	help
1570	  Choose this option to build a kernel for release 2 or later of the
1571	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1572	  MIPS processor are based on a MIPS64 processor.  If you know the
1573	  specific type of processor in your system, choose those that one
1574	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1575
1576config CPU_MIPS64_R5
1577	bool "MIPS64 Release 5"
1578	depends on SYS_HAS_CPU_MIPS64_R5
1579	select CPU_HAS_PREFETCH
1580	select CPU_SUPPORTS_32BIT_KERNEL
1581	select CPU_SUPPORTS_64BIT_KERNEL
1582	select CPU_SUPPORTS_HIGHMEM
1583	select CPU_SUPPORTS_HUGEPAGES
1584	select CPU_SUPPORTS_MSA
1585	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1586	select HAVE_KVM
1587	help
1588	  Choose this option to build a kernel for release 5 or later of the
1589	  MIPS64 architecture.  This is a intermediate MIPS architecture
1590	  release partly implementing release 6 features. Though there is no
1591	  any hardware known to be based on this release.
1592
1593config CPU_MIPS64_R6
1594	bool "MIPS64 Release 6"
1595	depends on SYS_HAS_CPU_MIPS64_R6
1596	select CPU_HAS_PREFETCH
1597	select CPU_NO_LOAD_STORE_LR
1598	select CPU_SUPPORTS_32BIT_KERNEL
1599	select CPU_SUPPORTS_64BIT_KERNEL
1600	select CPU_SUPPORTS_HIGHMEM
1601	select CPU_SUPPORTS_HUGEPAGES
1602	select CPU_SUPPORTS_MSA
1603	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1604	select HAVE_KVM
1605	help
1606	  Choose this option to build a kernel for release 6 or later of the
1607	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
1608	  family, are based on a MIPS64r6 processor. If you own an older
1609	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1610
1611config CPU_P5600
1612	bool "MIPS Warrior P5600"
1613	depends on SYS_HAS_CPU_P5600
1614	select CPU_HAS_PREFETCH
1615	select CPU_SUPPORTS_32BIT_KERNEL
1616	select CPU_SUPPORTS_HIGHMEM
1617	select CPU_SUPPORTS_MSA
1618	select CPU_SUPPORTS_CPUFREQ
1619	select CPU_MIPSR2_IRQ_VI
1620	select CPU_MIPSR2_IRQ_EI
1621	select HAVE_KVM
1622	select MIPS_O32_FP64_SUPPORT
1623	help
1624	  Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1625	  It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1626	  MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1627	  level features like up to six P5600 calculation cores, CM2 with L2
1628	  cache, IOCU/IOMMU (though might be unused depending on the system-
1629	  specific IP core configuration), GIC, CPC, virtualisation module,
1630	  eJTAG and PDtrace.
1631
1632config CPU_R3000
1633	bool "R3000"
1634	depends on SYS_HAS_CPU_R3000
1635	select CPU_HAS_WB
1636	select CPU_R3K_TLB
1637	select CPU_SUPPORTS_32BIT_KERNEL
1638	select CPU_SUPPORTS_HIGHMEM
1639	help
1640	  Please make sure to pick the right CPU type. Linux/MIPS is not
1641	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1642	  *not* work on R4000 machines and vice versa.  However, since most
1643	  of the supported machines have an R4000 (or similar) CPU, R4x00
1644	  might be a safe bet.  If the resulting kernel does not work,
1645	  try to recompile with R3000.
1646
1647config CPU_TX39XX
1648	bool "R39XX"
1649	depends on SYS_HAS_CPU_TX39XX
1650	select CPU_SUPPORTS_32BIT_KERNEL
1651	select CPU_R3K_TLB
1652
1653config CPU_VR41XX
1654	bool "R41xx"
1655	depends on SYS_HAS_CPU_VR41XX
1656	select CPU_SUPPORTS_32BIT_KERNEL
1657	select CPU_SUPPORTS_64BIT_KERNEL
1658	help
1659	  The options selects support for the NEC VR4100 series of processors.
1660	  Only choose this option if you have one of these processors as a
1661	  kernel built with this option will not run on any other type of
1662	  processor or vice versa.
1663
1664config CPU_R4X00
1665	bool "R4x00"
1666	depends on SYS_HAS_CPU_R4X00
1667	select CPU_SUPPORTS_32BIT_KERNEL
1668	select CPU_SUPPORTS_64BIT_KERNEL
1669	select CPU_SUPPORTS_HUGEPAGES
1670	help
1671	  MIPS Technologies R4000-series processors other than 4300, including
1672	  the R4000, R4400, R4600, and 4700.
1673
1674config CPU_TX49XX
1675	bool "R49XX"
1676	depends on SYS_HAS_CPU_TX49XX
1677	select CPU_HAS_PREFETCH
1678	select CPU_SUPPORTS_32BIT_KERNEL
1679	select CPU_SUPPORTS_64BIT_KERNEL
1680	select CPU_SUPPORTS_HUGEPAGES
1681
1682config CPU_R5000
1683	bool "R5000"
1684	depends on SYS_HAS_CPU_R5000
1685	select CPU_SUPPORTS_32BIT_KERNEL
1686	select CPU_SUPPORTS_64BIT_KERNEL
1687	select CPU_SUPPORTS_HUGEPAGES
1688	help
1689	  MIPS Technologies R5000-series processors other than the Nevada.
1690
1691config CPU_R5500
1692	bool "R5500"
1693	depends on SYS_HAS_CPU_R5500
1694	select CPU_SUPPORTS_32BIT_KERNEL
1695	select CPU_SUPPORTS_64BIT_KERNEL
1696	select CPU_SUPPORTS_HUGEPAGES
1697	help
1698	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1699	  instruction set.
1700
1701config CPU_NEVADA
1702	bool "RM52xx"
1703	depends on SYS_HAS_CPU_NEVADA
1704	select CPU_SUPPORTS_32BIT_KERNEL
1705	select CPU_SUPPORTS_64BIT_KERNEL
1706	select CPU_SUPPORTS_HUGEPAGES
1707	help
1708	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1709
1710config CPU_R10000
1711	bool "R10000"
1712	depends on SYS_HAS_CPU_R10000
1713	select CPU_HAS_PREFETCH
1714	select CPU_SUPPORTS_32BIT_KERNEL
1715	select CPU_SUPPORTS_64BIT_KERNEL
1716	select CPU_SUPPORTS_HIGHMEM
1717	select CPU_SUPPORTS_HUGEPAGES
1718	help
1719	  MIPS Technologies R10000-series processors.
1720
1721config CPU_RM7000
1722	bool "RM7000"
1723	depends on SYS_HAS_CPU_RM7000
1724	select CPU_HAS_PREFETCH
1725	select CPU_SUPPORTS_32BIT_KERNEL
1726	select CPU_SUPPORTS_64BIT_KERNEL
1727	select CPU_SUPPORTS_HIGHMEM
1728	select CPU_SUPPORTS_HUGEPAGES
1729
1730config CPU_SB1
1731	bool "SB1"
1732	depends on SYS_HAS_CPU_SB1
1733	select CPU_SUPPORTS_32BIT_KERNEL
1734	select CPU_SUPPORTS_64BIT_KERNEL
1735	select CPU_SUPPORTS_HIGHMEM
1736	select CPU_SUPPORTS_HUGEPAGES
1737	select WEAK_ORDERING
1738
1739config CPU_CAVIUM_OCTEON
1740	bool "Cavium Octeon processor"
1741	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1742	select CPU_HAS_PREFETCH
1743	select CPU_SUPPORTS_64BIT_KERNEL
1744	select WEAK_ORDERING
1745	select CPU_SUPPORTS_HIGHMEM
1746	select CPU_SUPPORTS_HUGEPAGES
1747	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1748	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1749	select MIPS_L1_CACHE_SHIFT_7
1750	select HAVE_KVM
1751	help
1752	  The Cavium Octeon processor is a highly integrated chip containing
1753	  many ethernet hardware widgets for networking tasks. The processor
1754	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1755	  Full details can be found at http://www.caviumnetworks.com.
1756
1757config CPU_BMIPS
1758	bool "Broadcom BMIPS"
1759	depends on SYS_HAS_CPU_BMIPS
1760	select CPU_MIPS32
1761	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1762	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1763	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1764	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1765	select CPU_SUPPORTS_32BIT_KERNEL
1766	select DMA_NONCOHERENT
1767	select IRQ_MIPS_CPU
1768	select SWAP_IO_SPACE
1769	select WEAK_ORDERING
1770	select CPU_SUPPORTS_HIGHMEM
1771	select CPU_HAS_PREFETCH
1772	select CPU_SUPPORTS_CPUFREQ
1773	select MIPS_EXTERNAL_TIMER
1774	help
1775	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1776
1777config CPU_XLR
1778	bool "Netlogic XLR SoC"
1779	depends on SYS_HAS_CPU_XLR
1780	select CPU_SUPPORTS_32BIT_KERNEL
1781	select CPU_SUPPORTS_64BIT_KERNEL
1782	select CPU_SUPPORTS_HIGHMEM
1783	select CPU_SUPPORTS_HUGEPAGES
1784	select WEAK_ORDERING
1785	select WEAK_REORDERING_BEYOND_LLSC
1786	help
1787	  Netlogic Microsystems XLR/XLS processors.
1788
1789config CPU_XLP
1790	bool "Netlogic XLP SoC"
1791	depends on SYS_HAS_CPU_XLP
1792	select CPU_SUPPORTS_32BIT_KERNEL
1793	select CPU_SUPPORTS_64BIT_KERNEL
1794	select CPU_SUPPORTS_HIGHMEM
1795	select WEAK_ORDERING
1796	select WEAK_REORDERING_BEYOND_LLSC
1797	select CPU_HAS_PREFETCH
1798	select CPU_MIPSR2
1799	select CPU_SUPPORTS_HUGEPAGES
1800	select MIPS_ASID_BITS_VARIABLE
1801	help
1802	  Netlogic Microsystems XLP processors.
1803endchoice
1804
1805config CPU_MIPS32_3_5_FEATURES
1806	bool "MIPS32 Release 3.5 Features"
1807	depends on SYS_HAS_CPU_MIPS32_R3_5
1808	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1809		   CPU_P5600
1810	help
1811	  Choose this option to build a kernel for release 2 or later of the
1812	  MIPS32 architecture including features from the 3.5 release such as
1813	  support for Enhanced Virtual Addressing (EVA).
1814
1815config CPU_MIPS32_3_5_EVA
1816	bool "Enhanced Virtual Addressing (EVA)"
1817	depends on CPU_MIPS32_3_5_FEATURES
1818	select EVA
1819	default y
1820	help
1821	  Choose this option if you want to enable the Enhanced Virtual
1822	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1823	  One of its primary benefits is an increase in the maximum size
1824	  of lowmem (up to 3GB). If unsure, say 'N' here.
1825
1826config CPU_MIPS32_R5_FEATURES
1827	bool "MIPS32 Release 5 Features"
1828	depends on SYS_HAS_CPU_MIPS32_R5
1829	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1830	help
1831	  Choose this option to build a kernel for release 2 or later of the
1832	  MIPS32 architecture including features from release 5 such as
1833	  support for Extended Physical Addressing (XPA).
1834
1835config CPU_MIPS32_R5_XPA
1836	bool "Extended Physical Addressing (XPA)"
1837	depends on CPU_MIPS32_R5_FEATURES
1838	depends on !EVA
1839	depends on !PAGE_SIZE_4KB
1840	depends on SYS_SUPPORTS_HIGHMEM
1841	select XPA
1842	select HIGHMEM
1843	select PHYS_ADDR_T_64BIT
1844	default n
1845	help
1846	  Choose this option if you want to enable the Extended Physical
1847	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1848	  benefit is to increase physical addressing equal to or greater
1849	  than 40 bits. Note that this has the side effect of turning on
1850	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1851	  If unsure, say 'N' here.
1852
1853if CPU_LOONGSON2F
1854config CPU_NOP_WORKAROUNDS
1855	bool
1856
1857config CPU_JUMP_WORKAROUNDS
1858	bool
1859
1860config CPU_LOONGSON2F_WORKAROUNDS
1861	bool "Loongson 2F Workarounds"
1862	default y
1863	select CPU_NOP_WORKAROUNDS
1864	select CPU_JUMP_WORKAROUNDS
1865	help
1866	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1867	  require workarounds.  Without workarounds the system may hang
1868	  unexpectedly.  For more information please refer to the gas
1869	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1870
1871	  Loongson 2F03 and later have fixed these issues and no workarounds
1872	  are needed.  The workarounds have no significant side effect on them
1873	  but may decrease the performance of the system so this option should
1874	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1875	  systems.
1876
1877	  If unsure, please say Y.
1878endif # CPU_LOONGSON2F
1879
1880config SYS_SUPPORTS_ZBOOT
1881	bool
1882	select HAVE_KERNEL_GZIP
1883	select HAVE_KERNEL_BZIP2
1884	select HAVE_KERNEL_LZ4
1885	select HAVE_KERNEL_LZMA
1886	select HAVE_KERNEL_LZO
1887	select HAVE_KERNEL_XZ
1888	select HAVE_KERNEL_ZSTD
1889
1890config SYS_SUPPORTS_ZBOOT_UART16550
1891	bool
1892	select SYS_SUPPORTS_ZBOOT
1893
1894config SYS_SUPPORTS_ZBOOT_UART_PROM
1895	bool
1896	select SYS_SUPPORTS_ZBOOT
1897
1898config CPU_LOONGSON2EF
1899	bool
1900	select CPU_SUPPORTS_32BIT_KERNEL
1901	select CPU_SUPPORTS_64BIT_KERNEL
1902	select CPU_SUPPORTS_HIGHMEM
1903	select CPU_SUPPORTS_HUGEPAGES
1904	select ARCH_HAS_PHYS_TO_DMA
1905
1906config CPU_LOONGSON32
1907	bool
1908	select CPU_MIPS32
1909	select CPU_MIPSR2
1910	select CPU_HAS_PREFETCH
1911	select CPU_SUPPORTS_32BIT_KERNEL
1912	select CPU_SUPPORTS_HIGHMEM
1913	select CPU_SUPPORTS_CPUFREQ
1914
1915config CPU_BMIPS32_3300
1916	select SMP_UP if SMP
1917	bool
1918
1919config CPU_BMIPS4350
1920	bool
1921	select SYS_SUPPORTS_SMP
1922	select SYS_SUPPORTS_HOTPLUG_CPU
1923
1924config CPU_BMIPS4380
1925	bool
1926	select MIPS_L1_CACHE_SHIFT_6
1927	select SYS_SUPPORTS_SMP
1928	select SYS_SUPPORTS_HOTPLUG_CPU
1929	select CPU_HAS_RIXI
1930
1931config CPU_BMIPS5000
1932	bool
1933	select MIPS_CPU_SCACHE
1934	select MIPS_L1_CACHE_SHIFT_7
1935	select SYS_SUPPORTS_SMP
1936	select SYS_SUPPORTS_HOTPLUG_CPU
1937	select CPU_HAS_RIXI
1938
1939config SYS_HAS_CPU_LOONGSON64
1940	bool
1941	select CPU_SUPPORTS_CPUFREQ
1942	select CPU_HAS_RIXI
1943
1944config SYS_HAS_CPU_LOONGSON2E
1945	bool
1946
1947config SYS_HAS_CPU_LOONGSON2F
1948	bool
1949	select CPU_SUPPORTS_CPUFREQ
1950	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1951
1952config SYS_HAS_CPU_LOONGSON1B
1953	bool
1954
1955config SYS_HAS_CPU_LOONGSON1C
1956	bool
1957
1958config SYS_HAS_CPU_MIPS32_R1
1959	bool
1960
1961config SYS_HAS_CPU_MIPS32_R2
1962	bool
1963
1964config SYS_HAS_CPU_MIPS32_R3_5
1965	bool
1966
1967config SYS_HAS_CPU_MIPS32_R5
1968	bool
1969	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1970
1971config SYS_HAS_CPU_MIPS32_R6
1972	bool
1973	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1974
1975config SYS_HAS_CPU_MIPS64_R1
1976	bool
1977
1978config SYS_HAS_CPU_MIPS64_R2
1979	bool
1980
1981config SYS_HAS_CPU_MIPS64_R6
1982	bool
1983	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1984
1985config SYS_HAS_CPU_P5600
1986	bool
1987	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1988
1989config SYS_HAS_CPU_R3000
1990	bool
1991
1992config SYS_HAS_CPU_TX39XX
1993	bool
1994
1995config SYS_HAS_CPU_VR41XX
1996	bool
1997
1998config SYS_HAS_CPU_R4X00
1999	bool
2000
2001config SYS_HAS_CPU_TX49XX
2002	bool
2003
2004config SYS_HAS_CPU_R5000
2005	bool
2006
2007config SYS_HAS_CPU_R5500
2008	bool
2009
2010config SYS_HAS_CPU_NEVADA
2011	bool
2012
2013config SYS_HAS_CPU_R10000
2014	bool
2015	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2016
2017config SYS_HAS_CPU_RM7000
2018	bool
2019
2020config SYS_HAS_CPU_SB1
2021	bool
2022
2023config SYS_HAS_CPU_CAVIUM_OCTEON
2024	bool
2025
2026config SYS_HAS_CPU_BMIPS
2027	bool
2028
2029config SYS_HAS_CPU_BMIPS32_3300
2030	bool
2031	select SYS_HAS_CPU_BMIPS
2032
2033config SYS_HAS_CPU_BMIPS4350
2034	bool
2035	select SYS_HAS_CPU_BMIPS
2036
2037config SYS_HAS_CPU_BMIPS4380
2038	bool
2039	select SYS_HAS_CPU_BMIPS
2040
2041config SYS_HAS_CPU_BMIPS5000
2042	bool
2043	select SYS_HAS_CPU_BMIPS
2044	select ARCH_HAS_SYNC_DMA_FOR_CPU
2045
2046config SYS_HAS_CPU_XLR
2047	bool
2048
2049config SYS_HAS_CPU_XLP
2050	bool
2051
2052#
2053# CPU may reorder R->R, R->W, W->R, W->W
2054# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2055#
2056config WEAK_ORDERING
2057	bool
2058
2059#
2060# CPU may reorder reads and writes beyond LL/SC
2061# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2062#
2063config WEAK_REORDERING_BEYOND_LLSC
2064	bool
2065endmenu
2066
2067#
2068# These two indicate any level of the MIPS32 and MIPS64 architecture
2069#
2070config CPU_MIPS32
2071	bool
2072	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2073		     CPU_MIPS32_R6 || CPU_P5600
2074
2075config CPU_MIPS64
2076	bool
2077	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2078		     CPU_MIPS64_R6
2079
2080#
2081# These indicate the revision of the architecture
2082#
2083config CPU_MIPSR1
2084	bool
2085	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2086
2087config CPU_MIPSR2
2088	bool
2089	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2090	select CPU_HAS_RIXI
2091	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2092	select MIPS_SPRAM
2093
2094config CPU_MIPSR5
2095	bool
2096	default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2097	select CPU_HAS_RIXI
2098	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2099	select MIPS_SPRAM
2100
2101config CPU_MIPSR6
2102	bool
2103	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2104	select CPU_HAS_RIXI
2105	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2106	select HAVE_ARCH_BITREVERSE
2107	select MIPS_ASID_BITS_VARIABLE
2108	select MIPS_CRC_SUPPORT
2109	select MIPS_SPRAM
2110
2111config TARGET_ISA_REV
2112	int
2113	default 1 if CPU_MIPSR1
2114	default 2 if CPU_MIPSR2
2115	default 5 if CPU_MIPSR5
2116	default 6 if CPU_MIPSR6
2117	default 0
2118	help
2119	  Reflects the ISA revision being targeted by the kernel build. This
2120	  is effectively the Kconfig equivalent of MIPS_ISA_REV.
2121
2122config EVA
2123	bool
2124
2125config XPA
2126	bool
2127
2128config SYS_SUPPORTS_32BIT_KERNEL
2129	bool
2130config SYS_SUPPORTS_64BIT_KERNEL
2131	bool
2132config CPU_SUPPORTS_32BIT_KERNEL
2133	bool
2134config CPU_SUPPORTS_64BIT_KERNEL
2135	bool
2136config CPU_SUPPORTS_CPUFREQ
2137	bool
2138config CPU_SUPPORTS_ADDRWINCFG
2139	bool
2140config CPU_SUPPORTS_HUGEPAGES
2141	bool
2142	depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2143config MIPS_PGD_C0_CONTEXT
2144	bool
2145	default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2146
2147#
2148# Set to y for ptrace access to watch registers.
2149#
2150config HARDWARE_WATCHPOINTS
2151	bool
2152	default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2153
2154menu "Kernel type"
2155
2156choice
2157	prompt "Kernel code model"
2158	help
2159	  You should only select this option if you have a workload that
2160	  actually benefits from 64-bit processing or if your machine has
2161	  large memory.  You will only be presented a single option in this
2162	  menu if your system does not support both 32-bit and 64-bit kernels.
2163
2164config 32BIT
2165	bool "32-bit kernel"
2166	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2167	select TRAD_SIGNALS
2168	help
2169	  Select this option if you want to build a 32-bit kernel.
2170
2171config 64BIT
2172	bool "64-bit kernel"
2173	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2174	help
2175	  Select this option if you want to build a 64-bit kernel.
2176
2177endchoice
2178
2179config KVM_GUEST
2180	bool "KVM Guest Kernel"
2181	depends on CPU_MIPS32_R2
2182	depends on BROKEN_ON_SMP
2183	help
2184	  Select this option if building a guest kernel for KVM (Trap & Emulate)
2185	  mode.
2186
2187config KVM_GUEST_TIMER_FREQ
2188	int "Count/Compare Timer Frequency (MHz)"
2189	depends on KVM_GUEST
2190	default 100
2191	help
2192	  Set this to non-zero if building a guest kernel for KVM to skip RTC
2193	  emulation when determining guest CPU Frequency. Instead, the guest's
2194	  timer frequency is specified directly.
2195
2196config MIPS_VA_BITS_48
2197	bool "48 bits virtual memory"
2198	depends on 64BIT
2199	help
2200	  Support a maximum at least 48 bits of application virtual
2201	  memory.  Default is 40 bits or less, depending on the CPU.
2202	  For page sizes 16k and above, this option results in a small
2203	  memory overhead for page tables.  For 4k page size, a fourth
2204	  level of page tables is added which imposes both a memory
2205	  overhead as well as slower TLB fault handling.
2206
2207	  If unsure, say N.
2208
2209choice
2210	prompt "Kernel page size"
2211	default PAGE_SIZE_4KB
2212
2213config PAGE_SIZE_4KB
2214	bool "4kB"
2215	depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2216	help
2217	  This option select the standard 4kB Linux page size.  On some
2218	  R3000-family processors this is the only available page size.  Using
2219	  4kB page size will minimize memory consumption and is therefore
2220	  recommended for low memory systems.
2221
2222config PAGE_SIZE_8KB
2223	bool "8kB"
2224	depends on CPU_CAVIUM_OCTEON
2225	depends on !MIPS_VA_BITS_48
2226	help
2227	  Using 8kB page size will result in higher performance kernel at
2228	  the price of higher memory consumption.  This option is available
2229	  only on cnMIPS processors.  Note that you will need a suitable Linux
2230	  distribution to support this.
2231
2232config PAGE_SIZE_16KB
2233	bool "16kB"
2234	depends on !CPU_R3000 && !CPU_TX39XX
2235	help
2236	  Using 16kB page size will result in higher performance kernel at
2237	  the price of higher memory consumption.  This option is available on
2238	  all non-R3000 family processors.  Note that you will need a suitable
2239	  Linux distribution to support this.
2240
2241config PAGE_SIZE_32KB
2242	bool "32kB"
2243	depends on CPU_CAVIUM_OCTEON
2244	depends on !MIPS_VA_BITS_48
2245	help
2246	  Using 32kB page size will result in higher performance kernel at
2247	  the price of higher memory consumption.  This option is available
2248	  only on cnMIPS cores.  Note that you will need a suitable Linux
2249	  distribution to support this.
2250
2251config PAGE_SIZE_64KB
2252	bool "64kB"
2253	depends on !CPU_R3000 && !CPU_TX39XX
2254	help
2255	  Using 64kB page size will result in higher performance kernel at
2256	  the price of higher memory consumption.  This option is available on
2257	  all non-R3000 family processor.  Not that at the time of this
2258	  writing this option is still high experimental.
2259
2260endchoice
2261
2262config FORCE_MAX_ZONEORDER
2263	int "Maximum zone order"
2264	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2265	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2266	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2267	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2268	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2269	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2270	range 0 64
2271	default "11"
2272	help
2273	  The kernel memory allocator divides physically contiguous memory
2274	  blocks into "zones", where each zone is a power of two number of
2275	  pages.  This option selects the largest power of two that the kernel
2276	  keeps in the memory allocator.  If you need to allocate very large
2277	  blocks of physically contiguous memory, then you may need to
2278	  increase this value.
2279
2280	  This config option is actually maximum order plus one. For example,
2281	  a value of 11 means that the largest free memory block is 2^10 pages.
2282
2283	  The page size is not necessarily 4KB.  Keep this in mind
2284	  when choosing a value for this option.
2285
2286config BOARD_SCACHE
2287	bool
2288
2289config IP22_CPU_SCACHE
2290	bool
2291	select BOARD_SCACHE
2292
2293#
2294# Support for a MIPS32 / MIPS64 style S-caches
2295#
2296config MIPS_CPU_SCACHE
2297	bool
2298	select BOARD_SCACHE
2299
2300config R5000_CPU_SCACHE
2301	bool
2302	select BOARD_SCACHE
2303
2304config RM7000_CPU_SCACHE
2305	bool
2306	select BOARD_SCACHE
2307
2308config SIBYTE_DMA_PAGEOPS
2309	bool "Use DMA to clear/copy pages"
2310	depends on CPU_SB1
2311	help
2312	  Instead of using the CPU to zero and copy pages, use a Data Mover
2313	  channel.  These DMA channels are otherwise unused by the standard
2314	  SiByte Linux port.  Seems to give a small performance benefit.
2315
2316config CPU_HAS_PREFETCH
2317	bool
2318
2319config CPU_GENERIC_DUMP_TLB
2320	bool
2321	default y if !(CPU_R3000 || CPU_TX39XX)
2322
2323config MIPS_FP_SUPPORT
2324	bool "Floating Point support" if EXPERT
2325	default y
2326	help
2327	  Select y to include support for floating point in the kernel
2328	  including initialization of FPU hardware, FP context save & restore
2329	  and emulation of an FPU where necessary. Without this support any
2330	  userland program attempting to use floating point instructions will
2331	  receive a SIGILL.
2332
2333	  If you know that your userland will not attempt to use floating point
2334	  instructions then you can say n here to shrink the kernel a little.
2335
2336	  If unsure, say y.
2337
2338config CPU_R2300_FPU
2339	bool
2340	depends on MIPS_FP_SUPPORT
2341	default y if CPU_R3000 || CPU_TX39XX
2342
2343config CPU_R3K_TLB
2344	bool
2345
2346config CPU_R4K_FPU
2347	bool
2348	depends on MIPS_FP_SUPPORT
2349	default y if !CPU_R2300_FPU
2350
2351config CPU_R4K_CACHE_TLB
2352	bool
2353	default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2354
2355config MIPS_MT_SMP
2356	bool "MIPS MT SMP support (1 TC on each available VPE)"
2357	default y
2358	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2359	select CPU_MIPSR2_IRQ_VI
2360	select CPU_MIPSR2_IRQ_EI
2361	select SYNC_R4K
2362	select MIPS_MT
2363	select SMP
2364	select SMP_UP
2365	select SYS_SUPPORTS_SMP
2366	select SYS_SUPPORTS_SCHED_SMT
2367	select MIPS_PERF_SHARED_TC_COUNTERS
2368	help
2369	  This is a kernel model which is known as SMVP. This is supported
2370	  on cores with the MT ASE and uses the available VPEs to implement
2371	  virtual processors which supports SMP. This is equivalent to the
2372	  Intel Hyperthreading feature. For further information go to
2373	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
2374
2375config MIPS_MT
2376	bool
2377
2378config SCHED_SMT
2379	bool "SMT (multithreading) scheduler support"
2380	depends on SYS_SUPPORTS_SCHED_SMT
2381	default n
2382	help
2383	  SMT scheduler support improves the CPU scheduler's decision making
2384	  when dealing with MIPS MT enabled cores at a cost of slightly
2385	  increased overhead in some places. If unsure say N here.
2386
2387config SYS_SUPPORTS_SCHED_SMT
2388	bool
2389
2390config SYS_SUPPORTS_MULTITHREADING
2391	bool
2392
2393config MIPS_MT_FPAFF
2394	bool "Dynamic FPU affinity for FP-intensive threads"
2395	default y
2396	depends on MIPS_MT_SMP
2397
2398config MIPSR2_TO_R6_EMULATOR
2399	bool "MIPS R2-to-R6 emulator"
2400	depends on CPU_MIPSR6
2401	depends on MIPS_FP_SUPPORT
2402	default y
2403	help
2404	  Choose this option if you want to run non-R6 MIPS userland code.
2405	  Even if you say 'Y' here, the emulator will still be disabled by
2406	  default. You can enable it using the 'mipsr2emu' kernel option.
2407	  The only reason this is a build-time option is to save ~14K from the
2408	  final kernel image.
2409
2410config SYS_SUPPORTS_VPE_LOADER
2411	bool
2412	depends on SYS_SUPPORTS_MULTITHREADING
2413	help
2414	  Indicates that the platform supports the VPE loader, and provides
2415	  physical_memsize.
2416
2417config MIPS_VPE_LOADER
2418	bool "VPE loader support."
2419	depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2420	select CPU_MIPSR2_IRQ_VI
2421	select CPU_MIPSR2_IRQ_EI
2422	select MIPS_MT
2423	help
2424	  Includes a loader for loading an elf relocatable object
2425	  onto another VPE and running it.
2426
2427config MIPS_VPE_LOADER_CMP
2428	bool
2429	default "y"
2430	depends on MIPS_VPE_LOADER && MIPS_CMP
2431
2432config MIPS_VPE_LOADER_MT
2433	bool
2434	default "y"
2435	depends on MIPS_VPE_LOADER && !MIPS_CMP
2436
2437config MIPS_VPE_LOADER_TOM
2438	bool "Load VPE program into memory hidden from linux"
2439	depends on MIPS_VPE_LOADER
2440	default y
2441	help
2442	  The loader can use memory that is present but has been hidden from
2443	  Linux using the kernel command line option "mem=xxMB". It's up to
2444	  you to ensure the amount you put in the option and the space your
2445	  program requires is less or equal to the amount physically present.
2446
2447config MIPS_VPE_APSP_API
2448	bool "Enable support for AP/SP API (RTLX)"
2449	depends on MIPS_VPE_LOADER
2450
2451config MIPS_VPE_APSP_API_CMP
2452	bool
2453	default "y"
2454	depends on MIPS_VPE_APSP_API && MIPS_CMP
2455
2456config MIPS_VPE_APSP_API_MT
2457	bool
2458	default "y"
2459	depends on MIPS_VPE_APSP_API && !MIPS_CMP
2460
2461config MIPS_CMP
2462	bool "MIPS CMP framework support (DEPRECATED)"
2463	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2464	select SMP
2465	select SYNC_R4K
2466	select SYS_SUPPORTS_SMP
2467	select WEAK_ORDERING
2468	default n
2469	help
2470	  Select this if you are using a bootloader which implements the "CMP
2471	  framework" protocol (ie. YAMON) and want your kernel to make use of
2472	  its ability to start secondary CPUs.
2473
2474	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
2475	  instead of this.
2476
2477config MIPS_CPS
2478	bool "MIPS Coherent Processing System support"
2479	depends on SYS_SUPPORTS_MIPS_CPS
2480	select MIPS_CM
2481	select MIPS_CPS_PM if HOTPLUG_CPU
2482	select SMP
2483	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2484	select SYS_SUPPORTS_HOTPLUG_CPU
2485	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2486	select SYS_SUPPORTS_SMP
2487	select WEAK_ORDERING
2488	help
2489	  Select this if you wish to run an SMP kernel across multiple cores
2490	  within a MIPS Coherent Processing System. When this option is
2491	  enabled the kernel will probe for other cores and boot them with
2492	  no external assistance. It is safe to enable this when hardware
2493	  support is unavailable.
2494
2495config MIPS_CPS_PM
2496	depends on MIPS_CPS
2497	bool
2498
2499config MIPS_CM
2500	bool
2501	select MIPS_CPC
2502
2503config MIPS_CPC
2504	bool
2505
2506config SB1_PASS_2_WORKAROUNDS
2507	bool
2508	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2509	default y
2510
2511config SB1_PASS_2_1_WORKAROUNDS
2512	bool
2513	depends on CPU_SB1 && CPU_SB1_PASS_2
2514	default y
2515
2516choice
2517	prompt "SmartMIPS or microMIPS ASE support"
2518
2519config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2520	bool "None"
2521	help
2522	  Select this if you want neither microMIPS nor SmartMIPS support
2523
2524config CPU_HAS_SMARTMIPS
2525	depends on SYS_SUPPORTS_SMARTMIPS
2526	bool "SmartMIPS"
2527	help
2528	  SmartMIPS is a extension of the MIPS32 architecture aimed at
2529	  increased security at both hardware and software level for
2530	  smartcards.  Enabling this option will allow proper use of the
2531	  SmartMIPS instructions by Linux applications.  However a kernel with
2532	  this option will not work on a MIPS core without SmartMIPS core.  If
2533	  you don't know you probably don't have SmartMIPS and should say N
2534	  here.
2535
2536config CPU_MICROMIPS
2537	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2538	bool "microMIPS"
2539	help
2540	  When this option is enabled the kernel will be built using the
2541	  microMIPS ISA
2542
2543endchoice
2544
2545config CPU_HAS_MSA
2546	bool "Support for the MIPS SIMD Architecture"
2547	depends on CPU_SUPPORTS_MSA
2548	depends on MIPS_FP_SUPPORT
2549	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2550	help
2551	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2552	  and a set of SIMD instructions to operate on them. When this option
2553	  is enabled the kernel will support allocating & switching MSA
2554	  vector register contexts. If you know that your kernel will only be
2555	  running on CPUs which do not support MSA or that your userland will
2556	  not be making use of it then you may wish to say N here to reduce
2557	  the size & complexity of your kernel.
2558
2559	  If unsure, say Y.
2560
2561config CPU_HAS_WB
2562	bool
2563
2564config XKS01
2565	bool
2566
2567config CPU_HAS_DIEI
2568	depends on !CPU_DIEI_BROKEN
2569	bool
2570
2571config CPU_DIEI_BROKEN
2572	bool
2573
2574config CPU_HAS_RIXI
2575	bool
2576
2577config CPU_NO_LOAD_STORE_LR
2578	bool
2579	help
2580	  CPU lacks support for unaligned load and store instructions:
2581	  LWL, LWR, SWL, SWR (Load/store word left/right).
2582	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2583	  systems).
2584
2585#
2586# Vectored interrupt mode is an R2 feature
2587#
2588config CPU_MIPSR2_IRQ_VI
2589	bool
2590
2591#
2592# Extended interrupt mode is an R2 feature
2593#
2594config CPU_MIPSR2_IRQ_EI
2595	bool
2596
2597config CPU_HAS_SYNC
2598	bool
2599	depends on !CPU_R3000
2600	default y
2601
2602#
2603# CPU non-features
2604#
2605config CPU_DADDI_WORKAROUNDS
2606	bool
2607
2608config CPU_R4000_WORKAROUNDS
2609	bool
2610	select CPU_R4400_WORKAROUNDS
2611
2612config CPU_R4400_WORKAROUNDS
2613	bool
2614
2615config CPU_R4X00_BUGS64
2616	bool
2617	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2618
2619config MIPS_ASID_SHIFT
2620	int
2621	default 6 if CPU_R3000 || CPU_TX39XX
2622	default 0
2623
2624config MIPS_ASID_BITS
2625	int
2626	default 0 if MIPS_ASID_BITS_VARIABLE
2627	default 6 if CPU_R3000 || CPU_TX39XX
2628	default 8
2629
2630config MIPS_ASID_BITS_VARIABLE
2631	bool
2632
2633config MIPS_CRC_SUPPORT
2634	bool
2635
2636# R4600 erratum.  Due to the lack of errata information the exact
2637# technical details aren't known.  I've experimentally found that disabling
2638# interrupts during indexed I-cache flushes seems to be sufficient to deal
2639# with the issue.
2640config WAR_R4600_V1_INDEX_ICACHEOP
2641	bool
2642
2643# Pleasures of the R4600 V1.x.  Cite from the IDT R4600 V1.7 errata:
2644#
2645#  18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2646#      Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2647#      executed if there is no other dcache activity. If the dcache is
2648#      accessed for another instruction immeidately preceding when these
2649#      cache instructions are executing, it is possible that the dcache
2650#      tag match outputs used by these cache instructions will be
2651#      incorrect. These cache instructions should be preceded by at least
2652#      four instructions that are not any kind of load or store
2653#      instruction.
2654#
2655#      This is not allowed:    lw
2656#                              nop
2657#                              nop
2658#                              nop
2659#                              cache       Hit_Writeback_Invalidate_D
2660#
2661#      This is allowed:        lw
2662#                              nop
2663#                              nop
2664#                              nop
2665#                              nop
2666#                              cache       Hit_Writeback_Invalidate_D
2667config WAR_R4600_V1_HIT_CACHEOP
2668	bool
2669
2670# Writeback and invalidate the primary cache dcache before DMA.
2671#
2672# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2673# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2674# operate correctly if the internal data cache refill buffer is empty.  These
2675# CACHE instructions should be separated from any potential data cache miss
2676# by a load instruction to an uncached address to empty the response buffer."
2677# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2678# in .pdf format.)
2679config WAR_R4600_V2_HIT_CACHEOP
2680	bool
2681
2682# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2683# the line which this instruction itself exists, the following
2684# operation is not guaranteed."
2685#
2686# Workaround: do two phase flushing for Index_Invalidate_I
2687config WAR_TX49XX_ICACHE_INDEX_INV
2688	bool
2689
2690# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2691# opposes it being called that) where invalid instructions in the same
2692# I-cache line worth of instructions being fetched may case spurious
2693# exceptions.
2694config WAR_ICACHE_REFILLS
2695	bool
2696
2697# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2698# may cause ll / sc and lld / scd sequences to execute non-atomically.
2699config WAR_R10000_LLSC
2700	bool
2701
2702# 34K core erratum: "Problems Executing the TLBR Instruction"
2703config WAR_MIPS34K_MISSED_ITLB
2704	bool
2705
2706#
2707# - Highmem only makes sense for the 32-bit kernel.
2708# - The current highmem code will only work properly on physically indexed
2709#   caches such as R3000, SB1, R7000 or those that look like they're virtually
2710#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
2711#   moment we protect the user and offer the highmem option only on machines
2712#   where it's known to be safe.  This will not offer highmem on a few systems
2713#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2714#   indexed CPUs but we're playing safe.
2715# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2716#   know they might have memory configurations that could make use of highmem
2717#   support.
2718#
2719config HIGHMEM
2720	bool "High Memory Support"
2721	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2722	select KMAP_LOCAL
2723
2724config CPU_SUPPORTS_HIGHMEM
2725	bool
2726
2727config SYS_SUPPORTS_HIGHMEM
2728	bool
2729
2730config SYS_SUPPORTS_SMARTMIPS
2731	bool
2732
2733config SYS_SUPPORTS_MICROMIPS
2734	bool
2735
2736config SYS_SUPPORTS_MIPS16
2737	bool
2738	help
2739	  This option must be set if a kernel might be executed on a MIPS16-
2740	  enabled CPU even if MIPS16 is not actually being used.  In other
2741	  words, it makes the kernel MIPS16-tolerant.
2742
2743config CPU_SUPPORTS_MSA
2744	bool
2745
2746config ARCH_FLATMEM_ENABLE
2747	def_bool y
2748	depends on !NUMA && !CPU_LOONGSON2EF
2749
2750config ARCH_SPARSEMEM_ENABLE
2751	bool
2752	select SPARSEMEM_STATIC if !SGI_IP27
2753
2754config NUMA
2755	bool "NUMA Support"
2756	depends on SYS_SUPPORTS_NUMA
2757	help
2758	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2759	  Access).  This option improves performance on systems with more
2760	  than two nodes; on two node systems it is generally better to
2761	  leave it disabled; on single node systems leave this option
2762	  disabled.
2763
2764config SYS_SUPPORTS_NUMA
2765	bool
2766
2767config HAVE_SETUP_PER_CPU_AREA
2768	def_bool y
2769	depends on NUMA
2770
2771config NEED_PER_CPU_EMBED_FIRST_CHUNK
2772	def_bool y
2773	depends on NUMA
2774
2775config RELOCATABLE
2776	bool "Relocatable kernel"
2777	depends on SYS_SUPPORTS_RELOCATABLE
2778	depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2779		   CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2780		   CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2781		   CPU_P5600 || CAVIUM_OCTEON_SOC
2782	help
2783	  This builds a kernel image that retains relocation information
2784	  so it can be loaded someplace besides the default 1MB.
2785	  The relocations make the kernel binary about 15% larger,
2786	  but are discarded at runtime
2787
2788config RELOCATION_TABLE_SIZE
2789	hex "Relocation table size"
2790	depends on RELOCATABLE
2791	range 0x0 0x01000000
2792	default "0x00100000"
2793	help
2794	  A table of relocation data will be appended to the kernel binary
2795	  and parsed at boot to fix up the relocated kernel.
2796
2797	  This option allows the amount of space reserved for the table to be
2798	  adjusted, although the default of 1Mb should be ok in most cases.
2799
2800	  The build will fail and a valid size suggested if this is too small.
2801
2802	  If unsure, leave at the default value.
2803
2804config RANDOMIZE_BASE
2805	bool "Randomize the address of the kernel image"
2806	depends on RELOCATABLE
2807	help
2808	  Randomizes the physical and virtual address at which the
2809	  kernel image is loaded, as a security feature that
2810	  deters exploit attempts relying on knowledge of the location
2811	  of kernel internals.
2812
2813	  Entropy is generated using any coprocessor 0 registers available.
2814
2815	  The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2816
2817	  If unsure, say N.
2818
2819config RANDOMIZE_BASE_MAX_OFFSET
2820	hex "Maximum kASLR offset" if EXPERT
2821	depends on RANDOMIZE_BASE
2822	range 0x0 0x40000000 if EVA || 64BIT
2823	range 0x0 0x08000000
2824	default "0x01000000"
2825	help
2826	  When kASLR is active, this provides the maximum offset that will
2827	  be applied to the kernel image. It should be set according to the
2828	  amount of physical RAM available in the target system minus
2829	  PHYSICAL_START and must be a power of 2.
2830
2831	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2832	  EVA or 64-bit. The default is 16Mb.
2833
2834config NODES_SHIFT
2835	int
2836	default "6"
2837	depends on NEED_MULTIPLE_NODES
2838
2839config HW_PERF_EVENTS
2840	bool "Enable hardware performance counter support for perf events"
2841	depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2842	default y
2843	help
2844	  Enable hardware performance counter support for perf events. If
2845	  disabled, perf events will use software events only.
2846
2847config DMI
2848	bool "Enable DMI scanning"
2849	depends on MACH_LOONGSON64
2850	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2851	default y
2852	help
2853	  Enabled scanning of DMI to identify machine quirks. Say Y
2854	  here unless you have verified that your setup is not
2855	  affected by entries in the DMI blacklist. Required by PNP
2856	  BIOS code.
2857
2858config SMP
2859	bool "Multi-Processing support"
2860	depends on SYS_SUPPORTS_SMP
2861	help
2862	  This enables support for systems with more than one CPU. If you have
2863	  a system with only one CPU, say N. If you have a system with more
2864	  than one CPU, say Y.
2865
2866	  If you say N here, the kernel will run on uni- and multiprocessor
2867	  machines, but will use only one CPU of a multiprocessor machine. If
2868	  you say Y here, the kernel will run on many, but not all,
2869	  uniprocessor machines. On a uniprocessor machine, the kernel
2870	  will run faster if you say N here.
2871
2872	  People using multiprocessor machines who say Y here should also say
2873	  Y to "Enhanced Real Time Clock Support", below.
2874
2875	  See also the SMP-HOWTO available at
2876	  <https://www.tldp.org/docs.html#howto>.
2877
2878	  If you don't know what to do here, say N.
2879
2880config HOTPLUG_CPU
2881	bool "Support for hot-pluggable CPUs"
2882	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2883	help
2884	  Say Y here to allow turning CPUs off and on. CPUs can be
2885	  controlled through /sys/devices/system/cpu.
2886	  (Note: power management support will enable this option
2887	    automatically on SMP systems. )
2888	  Say N if you want to disable CPU hotplug.
2889
2890config SMP_UP
2891	bool
2892
2893config SYS_SUPPORTS_MIPS_CMP
2894	bool
2895
2896config SYS_SUPPORTS_MIPS_CPS
2897	bool
2898
2899config SYS_SUPPORTS_SMP
2900	bool
2901
2902config NR_CPUS_DEFAULT_4
2903	bool
2904
2905config NR_CPUS_DEFAULT_8
2906	bool
2907
2908config NR_CPUS_DEFAULT_16
2909	bool
2910
2911config NR_CPUS_DEFAULT_32
2912	bool
2913
2914config NR_CPUS_DEFAULT_64
2915	bool
2916
2917config NR_CPUS
2918	int "Maximum number of CPUs (2-256)"
2919	range 2 256
2920	depends on SMP
2921	default "4" if NR_CPUS_DEFAULT_4
2922	default "8" if NR_CPUS_DEFAULT_8
2923	default "16" if NR_CPUS_DEFAULT_16
2924	default "32" if NR_CPUS_DEFAULT_32
2925	default "64" if NR_CPUS_DEFAULT_64
2926	help
2927	  This allows you to specify the maximum number of CPUs which this
2928	  kernel will support.  The maximum supported value is 32 for 32-bit
2929	  kernel and 64 for 64-bit kernels; the minimum value which makes
2930	  sense is 1 for Qemu (useful only for kernel debugging purposes)
2931	  and 2 for all others.
2932
2933	  This is purely to save memory - each supported CPU adds
2934	  approximately eight kilobytes to the kernel image.  For best
2935	  performance should round up your number of processors to the next
2936	  power of two.
2937
2938config MIPS_PERF_SHARED_TC_COUNTERS
2939	bool
2940
2941config MIPS_NR_CPU_NR_MAP_1024
2942	bool
2943
2944config MIPS_NR_CPU_NR_MAP
2945	int
2946	depends on SMP
2947	default 1024 if MIPS_NR_CPU_NR_MAP_1024
2948	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2949
2950#
2951# Timer Interrupt Frequency Configuration
2952#
2953
2954choice
2955	prompt "Timer frequency"
2956	default HZ_250
2957	help
2958	  Allows the configuration of the timer frequency.
2959
2960	config HZ_24
2961		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2962
2963	config HZ_48
2964		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2965
2966	config HZ_100
2967		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2968
2969	config HZ_128
2970		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2971
2972	config HZ_250
2973		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2974
2975	config HZ_256
2976		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2977
2978	config HZ_1000
2979		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2980
2981	config HZ_1024
2982		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2983
2984endchoice
2985
2986config SYS_SUPPORTS_24HZ
2987	bool
2988
2989config SYS_SUPPORTS_48HZ
2990	bool
2991
2992config SYS_SUPPORTS_100HZ
2993	bool
2994
2995config SYS_SUPPORTS_128HZ
2996	bool
2997
2998config SYS_SUPPORTS_250HZ
2999	bool
3000
3001config SYS_SUPPORTS_256HZ
3002	bool
3003
3004config SYS_SUPPORTS_1000HZ
3005	bool
3006
3007config SYS_SUPPORTS_1024HZ
3008	bool
3009
3010config SYS_SUPPORTS_ARBIT_HZ
3011	bool
3012	default y if !SYS_SUPPORTS_24HZ && \
3013		     !SYS_SUPPORTS_48HZ && \
3014		     !SYS_SUPPORTS_100HZ && \
3015		     !SYS_SUPPORTS_128HZ && \
3016		     !SYS_SUPPORTS_250HZ && \
3017		     !SYS_SUPPORTS_256HZ && \
3018		     !SYS_SUPPORTS_1000HZ && \
3019		     !SYS_SUPPORTS_1024HZ
3020
3021config HZ
3022	int
3023	default 24 if HZ_24
3024	default 48 if HZ_48
3025	default 100 if HZ_100
3026	default 128 if HZ_128
3027	default 250 if HZ_250
3028	default 256 if HZ_256
3029	default 1000 if HZ_1000
3030	default 1024 if HZ_1024
3031
3032config SCHED_HRTICK
3033	def_bool HIGH_RES_TIMERS
3034
3035config KEXEC
3036	bool "Kexec system call"
3037	select KEXEC_CORE
3038	help
3039	  kexec is a system call that implements the ability to shutdown your
3040	  current kernel, and to start another kernel.  It is like a reboot
3041	  but it is independent of the system firmware.   And like a reboot
3042	  you can start any kernel with it, not just Linux.
3043
3044	  The name comes from the similarity to the exec system call.
3045
3046	  It is an ongoing process to be certain the hardware in a machine
3047	  is properly shutdown, so do not be surprised if this code does not
3048	  initially work for you.  As of this writing the exact hardware
3049	  interface is strongly in flux, so no good recommendation can be
3050	  made.
3051
3052config CRASH_DUMP
3053	bool "Kernel crash dumps"
3054	help
3055	  Generate crash dump after being started by kexec.
3056	  This should be normally only set in special crash dump kernels
3057	  which are loaded in the main kernel with kexec-tools into
3058	  a specially reserved region and then later executed after
3059	  a crash by kdump/kexec. The crash dump kernel must be compiled
3060	  to a memory address not used by the main kernel or firmware using
3061	  PHYSICAL_START.
3062
3063config PHYSICAL_START
3064	hex "Physical address where the kernel is loaded"
3065	default "0xffffffff84000000"
3066	depends on CRASH_DUMP
3067	help
3068	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3069	  If you plan to use kernel for capturing the crash dump change
3070	  this value to start of the reserved region (the "X" value as
3071	  specified in the "crashkernel=YM@XM" command line boot parameter
3072	  passed to the panic-ed kernel).
3073
3074config MIPS_O32_FP64_SUPPORT
3075	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3076	depends on 32BIT || MIPS32_O32
3077	help
3078	  When this is enabled, the kernel will support use of 64-bit floating
3079	  point registers with binaries using the O32 ABI along with the
3080	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3081	  32-bit MIPS systems this support is at the cost of increasing the
3082	  size and complexity of the compiled FPU emulator. Thus if you are
3083	  running a MIPS32 system and know that none of your userland binaries
3084	  will require 64-bit floating point, you may wish to reduce the size
3085	  of your kernel & potentially improve FP emulation performance by
3086	  saying N here.
3087
3088	  Although binutils currently supports use of this flag the details
3089	  concerning its effect upon the O32 ABI in userland are still being
3090	  worked on. In order to avoid userland becoming dependant upon current
3091	  behaviour before the details have been finalised, this option should
3092	  be considered experimental and only enabled by those working upon
3093	  said details.
3094
3095	  If unsure, say N.
3096
3097config USE_OF
3098	bool
3099	select OF
3100	select OF_EARLY_FLATTREE
3101	select IRQ_DOMAIN
3102
3103config UHI_BOOT
3104	bool
3105
3106config BUILTIN_DTB
3107	bool
3108
3109choice
3110	prompt "Kernel appended dtb support" if USE_OF
3111	default MIPS_NO_APPENDED_DTB
3112
3113	config MIPS_NO_APPENDED_DTB
3114		bool "None"
3115		help
3116		  Do not enable appended dtb support.
3117
3118	config MIPS_ELF_APPENDED_DTB
3119		bool "vmlinux"
3120		help
3121		  With this option, the boot code will look for a device tree binary
3122		  DTB) included in the vmlinux ELF section .appended_dtb. By default
3123		  it is empty and the DTB can be appended using binutils command
3124		  objcopy:
3125
3126		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3127
3128		  This is meant as a backward compatiblity convenience for those
3129		  systems with a bootloader that can't be upgraded to accommodate
3130		  the documented boot protocol using a device tree.
3131
3132	config MIPS_RAW_APPENDED_DTB
3133		bool "vmlinux.bin or vmlinuz.bin"
3134		help
3135		  With this option, the boot code will look for a device tree binary
3136		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3137		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3138
3139		  This is meant as a backward compatibility convenience for those
3140		  systems with a bootloader that can't be upgraded to accommodate
3141		  the documented boot protocol using a device tree.
3142
3143		  Beware that there is very little in terms of protection against
3144		  this option being confused by leftover garbage in memory that might
3145		  look like a DTB header after a reboot if no actual DTB is appended
3146		  to vmlinux.bin.  Do not leave this option active in a production kernel
3147		  if you don't intend to always append a DTB.
3148endchoice
3149
3150choice
3151	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3152	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3153					 !MACH_LOONGSON64 && !MIPS_MALTA && \
3154					 !CAVIUM_OCTEON_SOC
3155	default MIPS_CMDLINE_FROM_BOOTLOADER
3156
3157	config MIPS_CMDLINE_FROM_DTB
3158		depends on USE_OF
3159		bool "Dtb kernel arguments if available"
3160
3161	config MIPS_CMDLINE_DTB_EXTEND
3162		depends on USE_OF
3163		bool "Extend dtb kernel arguments with bootloader arguments"
3164
3165	config MIPS_CMDLINE_FROM_BOOTLOADER
3166		bool "Bootloader kernel arguments if available"
3167
3168	config MIPS_CMDLINE_BUILTIN_EXTEND
3169		depends on CMDLINE_BOOL
3170		bool "Extend builtin kernel arguments with bootloader arguments"
3171endchoice
3172
3173endmenu
3174
3175config LOCKDEP_SUPPORT
3176	bool
3177	default y
3178
3179config STACKTRACE_SUPPORT
3180	bool
3181	default y
3182
3183config PGTABLE_LEVELS
3184	int
3185	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3186	default 3 if 64BIT && !PAGE_SIZE_64KB
3187	default 2
3188
3189config MIPS_AUTO_PFN_OFFSET
3190	bool
3191
3192menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3193
3194config PCI_DRIVERS_GENERIC
3195	select PCI_DOMAINS_GENERIC if PCI
3196	bool
3197
3198config PCI_DRIVERS_LEGACY
3199	def_bool !PCI_DRIVERS_GENERIC
3200	select NO_GENERIC_PCI_IOPORT_MAP
3201	select PCI_DOMAINS if PCI
3202
3203#
3204# ISA support is now enabled via select.  Too many systems still have the one
3205# or other ISA chip on the board that users don't know about so don't expect
3206# users to choose the right thing ...
3207#
3208config ISA
3209	bool
3210
3211config TC
3212	bool "TURBOchannel support"
3213	depends on MACH_DECSTATION
3214	help
3215	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3216	  processors.  TURBOchannel programming specifications are available
3217	  at:
3218	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3219	  and:
3220	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3221	  Linux driver support status is documented at:
3222	  <http://www.linux-mips.org/wiki/DECstation>
3223
3224config MMU
3225	bool
3226	default y
3227
3228config ARCH_MMAP_RND_BITS_MIN
3229	default 12 if 64BIT
3230	default 8
3231
3232config ARCH_MMAP_RND_BITS_MAX
3233	default 18 if 64BIT
3234	default 15
3235
3236config ARCH_MMAP_RND_COMPAT_BITS_MIN
3237	default 8
3238
3239config ARCH_MMAP_RND_COMPAT_BITS_MAX
3240	default 15
3241
3242config I8253
3243	bool
3244	select CLKSRC_I8253
3245	select CLKEVT_I8253
3246	select MIPS_EXTERNAL_TIMER
3247
3248config ZONE_DMA
3249	bool
3250
3251config ZONE_DMA32
3252	bool
3253
3254endmenu
3255
3256config TRAD_SIGNALS
3257	bool
3258
3259config MIPS32_COMPAT
3260	bool
3261
3262config COMPAT
3263	bool
3264
3265config SYSVIPC_COMPAT
3266	bool
3267
3268config MIPS32_O32
3269	bool "Kernel support for o32 binaries"
3270	depends on 64BIT
3271	select ARCH_WANT_OLD_COMPAT_IPC
3272	select COMPAT
3273	select MIPS32_COMPAT
3274	select SYSVIPC_COMPAT if SYSVIPC
3275	help
3276	  Select this option if you want to run o32 binaries.  These are pure
3277	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
3278	  existing binaries are in this format.
3279
3280	  If unsure, say Y.
3281
3282config MIPS32_N32
3283	bool "Kernel support for n32 binaries"
3284	depends on 64BIT
3285	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3286	select COMPAT
3287	select MIPS32_COMPAT
3288	select SYSVIPC_COMPAT if SYSVIPC
3289	help
3290	  Select this option if you want to run n32 binaries.  These are
3291	  64-bit binaries using 32-bit quantities for addressing and certain
3292	  data that would normally be 64-bit.  They are used in special
3293	  cases.
3294
3295	  If unsure, say N.
3296
3297config BINFMT_ELF32
3298	bool
3299	default y if MIPS32_O32 || MIPS32_N32
3300	select ELFCORE
3301
3302menu "Power management options"
3303
3304config ARCH_HIBERNATION_POSSIBLE
3305	def_bool y
3306	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3307
3308config ARCH_SUSPEND_POSSIBLE
3309	def_bool y
3310	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3311
3312source "kernel/power/Kconfig"
3313
3314endmenu
3315
3316config MIPS_EXTERNAL_TIMER
3317	bool
3318
3319menu "CPU Power Management"
3320
3321if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3322source "drivers/cpufreq/Kconfig"
3323endif
3324
3325source "drivers/cpuidle/Kconfig"
3326
3327endmenu
3328
3329source "drivers/firmware/Kconfig"
3330
3331source "arch/mips/kvm/Kconfig"
3332
3333source "arch/mips/vdso/Kconfig"
3334