xref: /openbmc/linux/arch/mips/Kconfig (revision 65a0d3c1)
1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3	bool
4	default y
5	select ARCH_32BIT_OFF_T if !64BIT
6	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7	select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8	select ARCH_HAS_FORTIFY_SOURCE
9	select ARCH_HAS_KCOV
10	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
13	select ARCH_HAS_UBSAN_SANITIZE_ALL
14	select ARCH_HAS_GCOV_PROFILE_ALL
15	select ARCH_KEEP_MEMBLOCK
16	select ARCH_SUPPORTS_UPROBES
17	select ARCH_USE_BUILTIN_BSWAP
18	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
19	select ARCH_USE_MEMTEST
20	select ARCH_USE_QUEUED_RWLOCKS
21	select ARCH_USE_QUEUED_SPINLOCKS
22	select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
23	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
24	select ARCH_WANT_IPC_PARSE_VERSION
25	select ARCH_WANT_LD_ORPHAN_WARN
26	select BUILDTIME_TABLE_SORT
27	select CLONE_BACKWARDS
28	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
29	select CPU_PM if CPU_IDLE
30	select GENERIC_ATOMIC64 if !64BIT
31	select GENERIC_CMOS_UPDATE
32	select GENERIC_CPU_AUTOPROBE
33	select GENERIC_FIND_FIRST_BIT
34	select GENERIC_GETTIMEOFDAY
35	select GENERIC_IOMAP
36	select GENERIC_IRQ_PROBE
37	select GENERIC_IRQ_SHOW
38	select GENERIC_ISA_DMA if EISA
39	select GENERIC_LIB_ASHLDI3
40	select GENERIC_LIB_ASHRDI3
41	select GENERIC_LIB_CMPDI2
42	select GENERIC_LIB_LSHRDI3
43	select GENERIC_LIB_UCMPDI2
44	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
45	select GENERIC_SMP_IDLE_THREAD
46	select GENERIC_TIME_VSYSCALL
47	select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
48	select HANDLE_DOMAIN_IRQ
49	select HAVE_ARCH_COMPILER_H
50	select HAVE_ARCH_JUMP_LABEL
51	select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
52	select HAVE_ARCH_MMAP_RND_BITS if MMU
53	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
54	select HAVE_ARCH_SECCOMP_FILTER
55	select HAVE_ARCH_TRACEHOOK
56	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
57	select HAVE_ASM_MODVERSIONS
58	select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
59	select HAVE_CONTEXT_TRACKING
60	select HAVE_TIF_NOHZ
61	select HAVE_C_RECORDMCOUNT
62	select HAVE_DEBUG_KMEMLEAK
63	select HAVE_DEBUG_STACKOVERFLOW
64	select HAVE_DMA_CONTIGUOUS
65	select HAVE_DYNAMIC_FTRACE
66	select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
67	select HAVE_EXIT_THREAD
68	select HAVE_FAST_GUP
69	select HAVE_FTRACE_MCOUNT_RECORD
70	select HAVE_FUNCTION_GRAPH_TRACER
71	select HAVE_FUNCTION_TRACER
72	select HAVE_GCC_PLUGINS
73	select HAVE_GENERIC_VDSO
74	select HAVE_IDE
75	select HAVE_IOREMAP_PROT
76	select HAVE_IRQ_EXIT_ON_IRQ_STACK
77	select HAVE_IRQ_TIME_ACCOUNTING
78	select HAVE_KPROBES
79	select HAVE_KRETPROBES
80	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
81	select HAVE_MOD_ARCH_SPECIFIC
82	select HAVE_NMI
83	select HAVE_PERF_EVENTS
84	select HAVE_PERF_REGS
85	select HAVE_PERF_USER_STACK_DUMP
86	select HAVE_REGS_AND_STACK_ACCESS_API
87	select HAVE_RSEQ
88	select HAVE_SPARSE_SYSCALL_NR
89	select HAVE_STACKPROTECTOR
90	select HAVE_SYSCALL_TRACEPOINTS
91	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
92	select IRQ_FORCED_THREADING
93	select ISA if EISA
94	select MODULES_USE_ELF_REL if MODULES
95	select MODULES_USE_ELF_RELA if MODULES && 64BIT
96	select PERF_USE_VMALLOC
97	select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
98	select RTC_LIB
99	select SYSCTL_EXCEPTION_TRACE
100	select VIRT_TO_BUS
101	select ARCH_HAS_ELFCORE_COMPAT
102
103config MIPS_FIXUP_BIGPHYS_ADDR
104	bool
105
106config MIPS_GENERIC
107	bool
108
109config MACH_INGENIC
110	bool
111	select SYS_SUPPORTS_32BIT_KERNEL
112	select SYS_SUPPORTS_LITTLE_ENDIAN
113	select SYS_SUPPORTS_ZBOOT
114	select DMA_NONCOHERENT
115	select IRQ_MIPS_CPU
116	select PINCTRL
117	select GPIOLIB
118	select COMMON_CLK
119	select GENERIC_IRQ_CHIP
120	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
121	select USE_OF
122	select CPU_SUPPORTS_CPUFREQ
123	select MIPS_EXTERNAL_TIMER
124
125menu "Machine selection"
126
127choice
128	prompt "System type"
129	default MIPS_GENERIC_KERNEL
130
131config MIPS_GENERIC_KERNEL
132	bool "Generic board-agnostic MIPS kernel"
133	select ARCH_HAS_SETUP_DMA_OPS
134	select MIPS_GENERIC
135	select BOOT_RAW
136	select BUILTIN_DTB
137	select CEVT_R4K
138	select CLKSRC_MIPS_GIC
139	select COMMON_CLK
140	select CPU_MIPSR2_IRQ_EI
141	select CPU_MIPSR2_IRQ_VI
142	select CSRC_R4K
143	select DMA_NONCOHERENT
144	select HAVE_PCI
145	select IRQ_MIPS_CPU
146	select MIPS_AUTO_PFN_OFFSET
147	select MIPS_CPU_SCACHE
148	select MIPS_GIC
149	select MIPS_L1_CACHE_SHIFT_7
150	select NO_EXCEPT_FILL
151	select PCI_DRIVERS_GENERIC
152	select SMP_UP if SMP
153	select SWAP_IO_SPACE
154	select SYS_HAS_CPU_MIPS32_R1
155	select SYS_HAS_CPU_MIPS32_R2
156	select SYS_HAS_CPU_MIPS32_R6
157	select SYS_HAS_CPU_MIPS64_R1
158	select SYS_HAS_CPU_MIPS64_R2
159	select SYS_HAS_CPU_MIPS64_R6
160	select SYS_SUPPORTS_32BIT_KERNEL
161	select SYS_SUPPORTS_64BIT_KERNEL
162	select SYS_SUPPORTS_BIG_ENDIAN
163	select SYS_SUPPORTS_HIGHMEM
164	select SYS_SUPPORTS_LITTLE_ENDIAN
165	select SYS_SUPPORTS_MICROMIPS
166	select SYS_SUPPORTS_MIPS16
167	select SYS_SUPPORTS_MIPS_CPS
168	select SYS_SUPPORTS_MULTITHREADING
169	select SYS_SUPPORTS_RELOCATABLE
170	select SYS_SUPPORTS_SMARTMIPS
171	select SYS_SUPPORTS_ZBOOT
172	select UHI_BOOT
173	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
174	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
175	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
176	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
177	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179	select USE_OF
180	help
181	  Select this to build a kernel which aims to support multiple boards,
182	  generally using a flattened device tree passed from the bootloader
183	  using the boot protocol defined in the UHI (Unified Hosting
184	  Interface) specification.
185
186config MIPS_ALCHEMY
187	bool "Alchemy processor based machines"
188	select PHYS_ADDR_T_64BIT
189	select CEVT_R4K
190	select CSRC_R4K
191	select IRQ_MIPS_CPU
192	select DMA_NONCOHERENT		# Au1000,1500,1100 aren't, rest is
193	select MIPS_FIXUP_BIGPHYS_ADDR if PCI
194	select SYS_HAS_CPU_MIPS32_R1
195	select SYS_SUPPORTS_32BIT_KERNEL
196	select SYS_SUPPORTS_APM_EMULATION
197	select GPIOLIB
198	select SYS_SUPPORTS_ZBOOT
199	select COMMON_CLK
200
201config AR7
202	bool "Texas Instruments AR7"
203	select BOOT_ELF32
204	select DMA_NONCOHERENT
205	select CEVT_R4K
206	select CSRC_R4K
207	select IRQ_MIPS_CPU
208	select NO_EXCEPT_FILL
209	select SWAP_IO_SPACE
210	select SYS_HAS_CPU_MIPS32_R1
211	select SYS_HAS_EARLY_PRINTK
212	select SYS_SUPPORTS_32BIT_KERNEL
213	select SYS_SUPPORTS_LITTLE_ENDIAN
214	select SYS_SUPPORTS_MIPS16
215	select SYS_SUPPORTS_ZBOOT_UART16550
216	select GPIOLIB
217	select VLYNQ
218	select HAVE_LEGACY_CLK
219	help
220	  Support for the Texas Instruments AR7 System-on-a-Chip
221	  family: TNETD7100, 7200 and 7300.
222
223config ATH25
224	bool "Atheros AR231x/AR531x SoC support"
225	select CEVT_R4K
226	select CSRC_R4K
227	select DMA_NONCOHERENT
228	select IRQ_MIPS_CPU
229	select IRQ_DOMAIN
230	select SYS_HAS_CPU_MIPS32_R1
231	select SYS_SUPPORTS_BIG_ENDIAN
232	select SYS_SUPPORTS_32BIT_KERNEL
233	select SYS_HAS_EARLY_PRINTK
234	help
235	  Support for Atheros AR231x and Atheros AR531x based boards
236
237config ATH79
238	bool "Atheros AR71XX/AR724X/AR913X based boards"
239	select ARCH_HAS_RESET_CONTROLLER
240	select BOOT_RAW
241	select CEVT_R4K
242	select CSRC_R4K
243	select DMA_NONCOHERENT
244	select GPIOLIB
245	select PINCTRL
246	select COMMON_CLK
247	select IRQ_MIPS_CPU
248	select SYS_HAS_CPU_MIPS32_R2
249	select SYS_HAS_EARLY_PRINTK
250	select SYS_SUPPORTS_32BIT_KERNEL
251	select SYS_SUPPORTS_BIG_ENDIAN
252	select SYS_SUPPORTS_MIPS16
253	select SYS_SUPPORTS_ZBOOT_UART_PROM
254	select USE_OF
255	select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
256	help
257	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
258
259config BMIPS_GENERIC
260	bool "Broadcom Generic BMIPS kernel"
261	select ARCH_HAS_RESET_CONTROLLER
262	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
263	select ARCH_HAS_PHYS_TO_DMA
264	select BOOT_RAW
265	select NO_EXCEPT_FILL
266	select USE_OF
267	select CEVT_R4K
268	select CSRC_R4K
269	select SYNC_R4K
270	select COMMON_CLK
271	select BCM6345_L1_IRQ
272	select BCM7038_L1_IRQ
273	select BCM7120_L2_IRQ
274	select BRCMSTB_L2_IRQ
275	select IRQ_MIPS_CPU
276	select DMA_NONCOHERENT
277	select SYS_SUPPORTS_32BIT_KERNEL
278	select SYS_SUPPORTS_LITTLE_ENDIAN
279	select SYS_SUPPORTS_BIG_ENDIAN
280	select SYS_SUPPORTS_HIGHMEM
281	select SYS_HAS_CPU_BMIPS32_3300
282	select SYS_HAS_CPU_BMIPS4350
283	select SYS_HAS_CPU_BMIPS4380
284	select SYS_HAS_CPU_BMIPS5000
285	select SWAP_IO_SPACE
286	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
287	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
288	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
289	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
290	select HARDIRQS_SW_RESEND
291	help
292	  Build a generic DT-based kernel image that boots on select
293	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
294	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
295	  must be set appropriately for your board.
296
297config BCM47XX
298	bool "Broadcom BCM47XX based boards"
299	select BOOT_RAW
300	select CEVT_R4K
301	select CSRC_R4K
302	select DMA_NONCOHERENT
303	select HAVE_PCI
304	select IRQ_MIPS_CPU
305	select SYS_HAS_CPU_MIPS32_R1
306	select NO_EXCEPT_FILL
307	select SYS_SUPPORTS_32BIT_KERNEL
308	select SYS_SUPPORTS_LITTLE_ENDIAN
309	select SYS_SUPPORTS_MIPS16
310	select SYS_SUPPORTS_ZBOOT
311	select SYS_HAS_EARLY_PRINTK
312	select USE_GENERIC_EARLY_PRINTK_8250
313	select GPIOLIB
314	select LEDS_GPIO_REGISTER
315	select BCM47XX_NVRAM
316	select BCM47XX_SPROM
317	select BCM47XX_SSB if !BCM47XX_BCMA
318	help
319	  Support for BCM47XX based boards
320
321config BCM63XX
322	bool "Broadcom BCM63XX based boards"
323	select BOOT_RAW
324	select CEVT_R4K
325	select CSRC_R4K
326	select SYNC_R4K
327	select DMA_NONCOHERENT
328	select IRQ_MIPS_CPU
329	select SYS_SUPPORTS_32BIT_KERNEL
330	select SYS_SUPPORTS_BIG_ENDIAN
331	select SYS_HAS_EARLY_PRINTK
332	select SWAP_IO_SPACE
333	select GPIOLIB
334	select MIPS_L1_CACHE_SHIFT_4
335	select CLKDEV_LOOKUP
336	select HAVE_LEGACY_CLK
337	help
338	  Support for BCM63XX based boards
339
340config MIPS_COBALT
341	bool "Cobalt Server"
342	select CEVT_R4K
343	select CSRC_R4K
344	select CEVT_GT641XX
345	select DMA_NONCOHERENT
346	select FORCE_PCI
347	select I8253
348	select I8259
349	select IRQ_MIPS_CPU
350	select IRQ_GT641XX
351	select PCI_GT64XXX_PCI0
352	select SYS_HAS_CPU_NEVADA
353	select SYS_HAS_EARLY_PRINTK
354	select SYS_SUPPORTS_32BIT_KERNEL
355	select SYS_SUPPORTS_64BIT_KERNEL
356	select SYS_SUPPORTS_LITTLE_ENDIAN
357	select USE_GENERIC_EARLY_PRINTK_8250
358
359config MACH_DECSTATION
360	bool "DECstations"
361	select BOOT_ELF32
362	select CEVT_DS1287
363	select CEVT_R4K if CPU_R4X00
364	select CSRC_IOASIC
365	select CSRC_R4K if CPU_R4X00
366	select CPU_DADDI_WORKAROUNDS if 64BIT
367	select CPU_R4000_WORKAROUNDS if 64BIT
368	select CPU_R4400_WORKAROUNDS if 64BIT
369	select DMA_NONCOHERENT
370	select NO_IOPORT_MAP
371	select IRQ_MIPS_CPU
372	select SYS_HAS_CPU_R3000
373	select SYS_HAS_CPU_R4X00
374	select SYS_SUPPORTS_32BIT_KERNEL
375	select SYS_SUPPORTS_64BIT_KERNEL
376	select SYS_SUPPORTS_LITTLE_ENDIAN
377	select SYS_SUPPORTS_128HZ
378	select SYS_SUPPORTS_256HZ
379	select SYS_SUPPORTS_1024HZ
380	select MIPS_L1_CACHE_SHIFT_4
381	help
382	  This enables support for DEC's MIPS based workstations.  For details
383	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
384	  DECstation porting pages on <http://decstation.unix-ag.org/>.
385
386	  If you have one of the following DECstation Models you definitely
387	  want to choose R4xx0 for the CPU Type:
388
389		DECstation 5000/50
390		DECstation 5000/150
391		DECstation 5000/260
392		DECsystem 5900/260
393
394	  otherwise choose R3000.
395
396config MACH_JAZZ
397	bool "Jazz family of machines"
398	select ARC_MEMORY
399	select ARC_PROMLIB
400	select ARCH_MIGHT_HAVE_PC_PARPORT
401	select ARCH_MIGHT_HAVE_PC_SERIO
402	select DMA_OPS
403	select FW_ARC
404	select FW_ARC32
405	select ARCH_MAY_HAVE_PC_FDC
406	select CEVT_R4K
407	select CSRC_R4K
408	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
409	select GENERIC_ISA_DMA
410	select HAVE_PCSPKR_PLATFORM
411	select IRQ_MIPS_CPU
412	select I8253
413	select I8259
414	select ISA
415	select SYS_HAS_CPU_R4X00
416	select SYS_SUPPORTS_32BIT_KERNEL
417	select SYS_SUPPORTS_64BIT_KERNEL
418	select SYS_SUPPORTS_100HZ
419	select SYS_SUPPORTS_LITTLE_ENDIAN
420	help
421	  This a family of machines based on the MIPS R4030 chipset which was
422	  used by several vendors to build RISC/os and Windows NT workstations.
423	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
424	  Olivetti M700-10 workstations.
425
426config MACH_INGENIC_SOC
427	bool "Ingenic SoC based machines"
428	select MIPS_GENERIC
429	select MACH_INGENIC
430	select SYS_SUPPORTS_ZBOOT_UART16550
431
432config LANTIQ
433	bool "Lantiq based platforms"
434	select DMA_NONCOHERENT
435	select IRQ_MIPS_CPU
436	select CEVT_R4K
437	select CSRC_R4K
438	select SYS_HAS_CPU_MIPS32_R1
439	select SYS_HAS_CPU_MIPS32_R2
440	select SYS_SUPPORTS_BIG_ENDIAN
441	select SYS_SUPPORTS_32BIT_KERNEL
442	select SYS_SUPPORTS_MIPS16
443	select SYS_SUPPORTS_MULTITHREADING
444	select SYS_SUPPORTS_VPE_LOADER
445	select SYS_HAS_EARLY_PRINTK
446	select GPIOLIB
447	select SWAP_IO_SPACE
448	select BOOT_RAW
449	select CLKDEV_LOOKUP
450	select HAVE_LEGACY_CLK
451	select USE_OF
452	select PINCTRL
453	select PINCTRL_LANTIQ
454	select ARCH_HAS_RESET_CONTROLLER
455	select RESET_CONTROLLER
456
457config MACH_LOONGSON32
458	bool "Loongson 32-bit family of machines"
459	select SYS_SUPPORTS_ZBOOT
460	help
461	  This enables support for the Loongson-1 family of machines.
462
463	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
464	  the Institute of Computing Technology (ICT), Chinese Academy of
465	  Sciences (CAS).
466
467config MACH_LOONGSON2EF
468	bool "Loongson-2E/F family of machines"
469	select SYS_SUPPORTS_ZBOOT
470	help
471	  This enables the support of early Loongson-2E/F family of machines.
472
473config MACH_LOONGSON64
474	bool "Loongson 64-bit family of machines"
475	select ARCH_SPARSEMEM_ENABLE
476	select ARCH_MIGHT_HAVE_PC_PARPORT
477	select ARCH_MIGHT_HAVE_PC_SERIO
478	select GENERIC_ISA_DMA_SUPPORT_BROKEN
479	select BOOT_ELF32
480	select BOARD_SCACHE
481	select CSRC_R4K
482	select CEVT_R4K
483	select CPU_HAS_WB
484	select FORCE_PCI
485	select ISA
486	select I8259
487	select IRQ_MIPS_CPU
488	select NO_EXCEPT_FILL
489	select NR_CPUS_DEFAULT_64
490	select USE_GENERIC_EARLY_PRINTK_8250
491	select PCI_DRIVERS_GENERIC
492	select SYS_HAS_CPU_LOONGSON64
493	select SYS_HAS_EARLY_PRINTK
494	select SYS_SUPPORTS_SMP
495	select SYS_SUPPORTS_HOTPLUG_CPU
496	select SYS_SUPPORTS_NUMA
497	select SYS_SUPPORTS_64BIT_KERNEL
498	select SYS_SUPPORTS_HIGHMEM
499	select SYS_SUPPORTS_LITTLE_ENDIAN
500	select SYS_SUPPORTS_ZBOOT
501	select SYS_SUPPORTS_RELOCATABLE
502	select ZONE_DMA32
503	select COMMON_CLK
504	select USE_OF
505	select BUILTIN_DTB
506	select PCI_HOST_GENERIC
507	help
508	  This enables the support of Loongson-2/3 family of machines.
509
510	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
511	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
512	  and Loongson-2F which will be removed), developed by the Institute
513	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
514
515config MACH_PISTACHIO
516	bool "IMG Pistachio SoC based boards"
517	select BOOT_ELF32
518	select BOOT_RAW
519	select CEVT_R4K
520	select CLKSRC_MIPS_GIC
521	select COMMON_CLK
522	select CSRC_R4K
523	select DMA_NONCOHERENT
524	select GPIOLIB
525	select IRQ_MIPS_CPU
526	select MFD_SYSCON
527	select MIPS_CPU_SCACHE
528	select MIPS_GIC
529	select PINCTRL
530	select REGULATOR
531	select SYS_HAS_CPU_MIPS32_R2
532	select SYS_SUPPORTS_32BIT_KERNEL
533	select SYS_SUPPORTS_LITTLE_ENDIAN
534	select SYS_SUPPORTS_MIPS_CPS
535	select SYS_SUPPORTS_MULTITHREADING
536	select SYS_SUPPORTS_RELOCATABLE
537	select SYS_SUPPORTS_ZBOOT
538	select SYS_HAS_EARLY_PRINTK
539	select USE_GENERIC_EARLY_PRINTK_8250
540	select USE_OF
541	help
542	  This enables support for the IMG Pistachio SoC platform.
543
544config MIPS_MALTA
545	bool "MIPS Malta board"
546	select ARCH_MAY_HAVE_PC_FDC
547	select ARCH_MIGHT_HAVE_PC_PARPORT
548	select ARCH_MIGHT_HAVE_PC_SERIO
549	select BOOT_ELF32
550	select BOOT_RAW
551	select BUILTIN_DTB
552	select CEVT_R4K
553	select CLKSRC_MIPS_GIC
554	select COMMON_CLK
555	select CSRC_R4K
556	select DMA_NONCOHERENT
557	select GENERIC_ISA_DMA
558	select HAVE_PCSPKR_PLATFORM
559	select HAVE_PCI
560	select I8253
561	select I8259
562	select IRQ_MIPS_CPU
563	select MIPS_BONITO64
564	select MIPS_CPU_SCACHE
565	select MIPS_GIC
566	select MIPS_L1_CACHE_SHIFT_6
567	select MIPS_MSC
568	select PCI_GT64XXX_PCI0
569	select SMP_UP if SMP
570	select SWAP_IO_SPACE
571	select SYS_HAS_CPU_MIPS32_R1
572	select SYS_HAS_CPU_MIPS32_R2
573	select SYS_HAS_CPU_MIPS32_R3_5
574	select SYS_HAS_CPU_MIPS32_R5
575	select SYS_HAS_CPU_MIPS32_R6
576	select SYS_HAS_CPU_MIPS64_R1
577	select SYS_HAS_CPU_MIPS64_R2
578	select SYS_HAS_CPU_MIPS64_R6
579	select SYS_HAS_CPU_NEVADA
580	select SYS_HAS_CPU_RM7000
581	select SYS_SUPPORTS_32BIT_KERNEL
582	select SYS_SUPPORTS_64BIT_KERNEL
583	select SYS_SUPPORTS_BIG_ENDIAN
584	select SYS_SUPPORTS_HIGHMEM
585	select SYS_SUPPORTS_LITTLE_ENDIAN
586	select SYS_SUPPORTS_MICROMIPS
587	select SYS_SUPPORTS_MIPS16
588	select SYS_SUPPORTS_MIPS_CMP
589	select SYS_SUPPORTS_MIPS_CPS
590	select SYS_SUPPORTS_MULTITHREADING
591	select SYS_SUPPORTS_RELOCATABLE
592	select SYS_SUPPORTS_SMARTMIPS
593	select SYS_SUPPORTS_VPE_LOADER
594	select SYS_SUPPORTS_ZBOOT
595	select USE_OF
596	select WAR_ICACHE_REFILLS
597	select ZONE_DMA32 if 64BIT
598	help
599	  This enables support for the MIPS Technologies Malta evaluation
600	  board.
601
602config MACH_PIC32
603	bool "Microchip PIC32 Family"
604	help
605	  This enables support for the Microchip PIC32 family of platforms.
606
607	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
608	  microcontrollers.
609
610config MACH_VR41XX
611	bool "NEC VR4100 series based machines"
612	select CEVT_R4K
613	select CSRC_R4K
614	select SYS_HAS_CPU_VR41XX
615	select SYS_SUPPORTS_MIPS16
616	select GPIOLIB
617
618config MACH_NINTENDO64
619	bool "Nintendo 64 console"
620	select CEVT_R4K
621	select CSRC_R4K
622	select SYS_HAS_CPU_R4300
623	select SYS_SUPPORTS_BIG_ENDIAN
624	select SYS_SUPPORTS_ZBOOT
625	select SYS_SUPPORTS_32BIT_KERNEL
626	select SYS_SUPPORTS_64BIT_KERNEL
627	select DMA_NONCOHERENT
628	select IRQ_MIPS_CPU
629
630config RALINK
631	bool "Ralink based machines"
632	select CEVT_R4K
633	select CSRC_R4K
634	select BOOT_RAW
635	select DMA_NONCOHERENT
636	select IRQ_MIPS_CPU
637	select USE_OF
638	select SYS_HAS_CPU_MIPS32_R1
639	select SYS_HAS_CPU_MIPS32_R2
640	select SYS_SUPPORTS_32BIT_KERNEL
641	select SYS_SUPPORTS_LITTLE_ENDIAN
642	select SYS_SUPPORTS_MIPS16
643	select SYS_SUPPORTS_ZBOOT
644	select SYS_HAS_EARLY_PRINTK
645	select CLKDEV_LOOKUP
646	select ARCH_HAS_RESET_CONTROLLER
647	select RESET_CONTROLLER
648
649config MACH_REALTEK_RTL
650	bool "Realtek RTL838x/RTL839x based machines"
651	select MIPS_GENERIC
652	select DMA_NONCOHERENT
653	select IRQ_MIPS_CPU
654	select CSRC_R4K
655	select CEVT_R4K
656	select SYS_HAS_CPU_MIPS32_R1
657	select SYS_HAS_CPU_MIPS32_R2
658	select SYS_SUPPORTS_BIG_ENDIAN
659	select SYS_SUPPORTS_32BIT_KERNEL
660	select SYS_SUPPORTS_MIPS16
661	select SYS_SUPPORTS_MULTITHREADING
662	select SYS_SUPPORTS_VPE_LOADER
663	select SYS_HAS_EARLY_PRINTK
664	select SYS_HAS_EARLY_PRINTK_8250
665	select USE_GENERIC_EARLY_PRINTK_8250
666	select BOOT_RAW
667	select PINCTRL
668	select USE_OF
669
670config SGI_IP22
671	bool "SGI IP22 (Indy/Indigo2)"
672	select ARC_MEMORY
673	select ARC_PROMLIB
674	select FW_ARC
675	select FW_ARC32
676	select ARCH_MIGHT_HAVE_PC_SERIO
677	select BOOT_ELF32
678	select CEVT_R4K
679	select CSRC_R4K
680	select DEFAULT_SGI_PARTITION
681	select DMA_NONCOHERENT
682	select HAVE_EISA
683	select I8253
684	select I8259
685	select IP22_CPU_SCACHE
686	select IRQ_MIPS_CPU
687	select GENERIC_ISA_DMA_SUPPORT_BROKEN
688	select SGI_HAS_I8042
689	select SGI_HAS_INDYDOG
690	select SGI_HAS_HAL2
691	select SGI_HAS_SEEQ
692	select SGI_HAS_WD93
693	select SGI_HAS_ZILOG
694	select SWAP_IO_SPACE
695	select SYS_HAS_CPU_R4X00
696	select SYS_HAS_CPU_R5000
697	select SYS_HAS_EARLY_PRINTK
698	select SYS_SUPPORTS_32BIT_KERNEL
699	select SYS_SUPPORTS_64BIT_KERNEL
700	select SYS_SUPPORTS_BIG_ENDIAN
701	select WAR_R4600_V1_INDEX_ICACHEOP
702	select WAR_R4600_V1_HIT_CACHEOP
703	select WAR_R4600_V2_HIT_CACHEOP
704	select MIPS_L1_CACHE_SHIFT_7
705	help
706	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
707	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
708	  that runs on these, say Y here.
709
710config SGI_IP27
711	bool "SGI IP27 (Origin200/2000)"
712	select ARCH_HAS_PHYS_TO_DMA
713	select ARCH_SPARSEMEM_ENABLE
714	select FW_ARC
715	select FW_ARC64
716	select ARC_CMDLINE_ONLY
717	select BOOT_ELF64
718	select DEFAULT_SGI_PARTITION
719	select FORCE_PCI
720	select SYS_HAS_EARLY_PRINTK
721	select HAVE_PCI
722	select IRQ_MIPS_CPU
723	select IRQ_DOMAIN_HIERARCHY
724	select NR_CPUS_DEFAULT_64
725	select PCI_DRIVERS_GENERIC
726	select PCI_XTALK_BRIDGE
727	select SYS_HAS_CPU_R10000
728	select SYS_SUPPORTS_64BIT_KERNEL
729	select SYS_SUPPORTS_BIG_ENDIAN
730	select SYS_SUPPORTS_NUMA
731	select SYS_SUPPORTS_SMP
732	select WAR_R10000_LLSC
733	select MIPS_L1_CACHE_SHIFT_7
734	select NUMA
735	help
736	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
737	  workstations.  To compile a Linux kernel that runs on these, say Y
738	  here.
739
740config SGI_IP28
741	bool "SGI IP28 (Indigo2 R10k)"
742	select ARC_MEMORY
743	select ARC_PROMLIB
744	select FW_ARC
745	select FW_ARC64
746	select ARCH_MIGHT_HAVE_PC_SERIO
747	select BOOT_ELF64
748	select CEVT_R4K
749	select CSRC_R4K
750	select DEFAULT_SGI_PARTITION
751	select DMA_NONCOHERENT
752	select GENERIC_ISA_DMA_SUPPORT_BROKEN
753	select IRQ_MIPS_CPU
754	select HAVE_EISA
755	select I8253
756	select I8259
757	select SGI_HAS_I8042
758	select SGI_HAS_INDYDOG
759	select SGI_HAS_HAL2
760	select SGI_HAS_SEEQ
761	select SGI_HAS_WD93
762	select SGI_HAS_ZILOG
763	select SWAP_IO_SPACE
764	select SYS_HAS_CPU_R10000
765	select SYS_HAS_EARLY_PRINTK
766	select SYS_SUPPORTS_64BIT_KERNEL
767	select SYS_SUPPORTS_BIG_ENDIAN
768	select WAR_R10000_LLSC
769	select MIPS_L1_CACHE_SHIFT_7
770	help
771	  This is the SGI Indigo2 with R10000 processor.  To compile a Linux
772	  kernel that runs on these, say Y here.
773
774config SGI_IP30
775	bool "SGI IP30 (Octane/Octane2)"
776	select ARCH_HAS_PHYS_TO_DMA
777	select FW_ARC
778	select FW_ARC64
779	select BOOT_ELF64
780	select CEVT_R4K
781	select CSRC_R4K
782	select FORCE_PCI
783	select SYNC_R4K if SMP
784	select ZONE_DMA32
785	select HAVE_PCI
786	select IRQ_MIPS_CPU
787	select IRQ_DOMAIN_HIERARCHY
788	select NR_CPUS_DEFAULT_2
789	select PCI_DRIVERS_GENERIC
790	select PCI_XTALK_BRIDGE
791	select SYS_HAS_EARLY_PRINTK
792	select SYS_HAS_CPU_R10000
793	select SYS_SUPPORTS_64BIT_KERNEL
794	select SYS_SUPPORTS_BIG_ENDIAN
795	select SYS_SUPPORTS_SMP
796	select WAR_R10000_LLSC
797	select MIPS_L1_CACHE_SHIFT_7
798	select ARC_MEMORY
799	help
800	  These are the SGI Octane and Octane2 graphics workstations.  To
801	  compile a Linux kernel that runs on these, say Y here.
802
803config SGI_IP32
804	bool "SGI IP32 (O2)"
805	select ARC_MEMORY
806	select ARC_PROMLIB
807	select ARCH_HAS_PHYS_TO_DMA
808	select FW_ARC
809	select FW_ARC32
810	select BOOT_ELF32
811	select CEVT_R4K
812	select CSRC_R4K
813	select DMA_NONCOHERENT
814	select HAVE_PCI
815	select IRQ_MIPS_CPU
816	select R5000_CPU_SCACHE
817	select RM7000_CPU_SCACHE
818	select SYS_HAS_CPU_R5000
819	select SYS_HAS_CPU_R10000 if BROKEN
820	select SYS_HAS_CPU_RM7000
821	select SYS_HAS_CPU_NEVADA
822	select SYS_SUPPORTS_64BIT_KERNEL
823	select SYS_SUPPORTS_BIG_ENDIAN
824	select WAR_ICACHE_REFILLS
825	help
826	  If you want this kernel to run on SGI O2 workstation, say Y here.
827
828config SIBYTE_CRHINE
829	bool "Sibyte BCM91120C-CRhine"
830	select BOOT_ELF32
831	select SIBYTE_BCM1120
832	select SWAP_IO_SPACE
833	select SYS_HAS_CPU_SB1
834	select SYS_SUPPORTS_BIG_ENDIAN
835	select SYS_SUPPORTS_LITTLE_ENDIAN
836
837config SIBYTE_CARMEL
838	bool "Sibyte BCM91120x-Carmel"
839	select BOOT_ELF32
840	select SIBYTE_BCM1120
841	select SWAP_IO_SPACE
842	select SYS_HAS_CPU_SB1
843	select SYS_SUPPORTS_BIG_ENDIAN
844	select SYS_SUPPORTS_LITTLE_ENDIAN
845
846config SIBYTE_CRHONE
847	bool "Sibyte BCM91125C-CRhone"
848	select BOOT_ELF32
849	select SIBYTE_BCM1125
850	select SWAP_IO_SPACE
851	select SYS_HAS_CPU_SB1
852	select SYS_SUPPORTS_BIG_ENDIAN
853	select SYS_SUPPORTS_HIGHMEM
854	select SYS_SUPPORTS_LITTLE_ENDIAN
855
856config SIBYTE_RHONE
857	bool "Sibyte BCM91125E-Rhone"
858	select BOOT_ELF32
859	select SIBYTE_BCM1125H
860	select SWAP_IO_SPACE
861	select SYS_HAS_CPU_SB1
862	select SYS_SUPPORTS_BIG_ENDIAN
863	select SYS_SUPPORTS_LITTLE_ENDIAN
864
865config SIBYTE_SWARM
866	bool "Sibyte BCM91250A-SWARM"
867	select BOOT_ELF32
868	select HAVE_PATA_PLATFORM
869	select SIBYTE_SB1250
870	select SWAP_IO_SPACE
871	select SYS_HAS_CPU_SB1
872	select SYS_SUPPORTS_BIG_ENDIAN
873	select SYS_SUPPORTS_HIGHMEM
874	select SYS_SUPPORTS_LITTLE_ENDIAN
875	select ZONE_DMA32 if 64BIT
876	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
877
878config SIBYTE_LITTLESUR
879	bool "Sibyte BCM91250C2-LittleSur"
880	select BOOT_ELF32
881	select HAVE_PATA_PLATFORM
882	select SIBYTE_SB1250
883	select SWAP_IO_SPACE
884	select SYS_HAS_CPU_SB1
885	select SYS_SUPPORTS_BIG_ENDIAN
886	select SYS_SUPPORTS_HIGHMEM
887	select SYS_SUPPORTS_LITTLE_ENDIAN
888	select ZONE_DMA32 if 64BIT
889
890config SIBYTE_SENTOSA
891	bool "Sibyte BCM91250E-Sentosa"
892	select BOOT_ELF32
893	select SIBYTE_SB1250
894	select SWAP_IO_SPACE
895	select SYS_HAS_CPU_SB1
896	select SYS_SUPPORTS_BIG_ENDIAN
897	select SYS_SUPPORTS_LITTLE_ENDIAN
898	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
899
900config SIBYTE_BIGSUR
901	bool "Sibyte BCM91480B-BigSur"
902	select BOOT_ELF32
903	select NR_CPUS_DEFAULT_4
904	select SIBYTE_BCM1x80
905	select SWAP_IO_SPACE
906	select SYS_HAS_CPU_SB1
907	select SYS_SUPPORTS_BIG_ENDIAN
908	select SYS_SUPPORTS_HIGHMEM
909	select SYS_SUPPORTS_LITTLE_ENDIAN
910	select ZONE_DMA32 if 64BIT
911	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
912
913config SNI_RM
914	bool "SNI RM200/300/400"
915	select ARC_MEMORY
916	select ARC_PROMLIB
917	select FW_ARC if CPU_LITTLE_ENDIAN
918	select FW_ARC32 if CPU_LITTLE_ENDIAN
919	select FW_SNIPROM if CPU_BIG_ENDIAN
920	select ARCH_MAY_HAVE_PC_FDC
921	select ARCH_MIGHT_HAVE_PC_PARPORT
922	select ARCH_MIGHT_HAVE_PC_SERIO
923	select BOOT_ELF32
924	select CEVT_R4K
925	select CSRC_R4K
926	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
927	select DMA_NONCOHERENT
928	select GENERIC_ISA_DMA
929	select HAVE_EISA
930	select HAVE_PCSPKR_PLATFORM
931	select HAVE_PCI
932	select IRQ_MIPS_CPU
933	select I8253
934	select I8259
935	select ISA
936	select MIPS_L1_CACHE_SHIFT_6
937	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
938	select SYS_HAS_CPU_R4X00
939	select SYS_HAS_CPU_R5000
940	select SYS_HAS_CPU_R10000
941	select R5000_CPU_SCACHE
942	select SYS_HAS_EARLY_PRINTK
943	select SYS_SUPPORTS_32BIT_KERNEL
944	select SYS_SUPPORTS_64BIT_KERNEL
945	select SYS_SUPPORTS_BIG_ENDIAN
946	select SYS_SUPPORTS_HIGHMEM
947	select SYS_SUPPORTS_LITTLE_ENDIAN
948	select WAR_R4600_V2_HIT_CACHEOP
949	help
950	  The SNI RM200/300/400 are MIPS-based machines manufactured by
951	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
952	  Technology and now in turn merged with Fujitsu.  Say Y here to
953	  support this machine type.
954
955config MACH_TX39XX
956	bool "Toshiba TX39 series based machines"
957
958config MACH_TX49XX
959	bool "Toshiba TX49 series based machines"
960	select WAR_TX49XX_ICACHE_INDEX_INV
961
962config MIKROTIK_RB532
963	bool "Mikrotik RB532 boards"
964	select CEVT_R4K
965	select CSRC_R4K
966	select DMA_NONCOHERENT
967	select HAVE_PCI
968	select IRQ_MIPS_CPU
969	select SYS_HAS_CPU_MIPS32_R1
970	select SYS_SUPPORTS_32BIT_KERNEL
971	select SYS_SUPPORTS_LITTLE_ENDIAN
972	select SWAP_IO_SPACE
973	select BOOT_RAW
974	select GPIOLIB
975	select MIPS_L1_CACHE_SHIFT_4
976	help
977	  Support the Mikrotik(tm) RouterBoard 532 series,
978	  based on the IDT RC32434 SoC.
979
980config CAVIUM_OCTEON_SOC
981	bool "Cavium Networks Octeon SoC based boards"
982	select CEVT_R4K
983	select ARCH_HAS_PHYS_TO_DMA
984	select HAVE_RAPIDIO
985	select PHYS_ADDR_T_64BIT
986	select SYS_SUPPORTS_64BIT_KERNEL
987	select SYS_SUPPORTS_BIG_ENDIAN
988	select EDAC_SUPPORT
989	select EDAC_ATOMIC_SCRUB
990	select SYS_SUPPORTS_LITTLE_ENDIAN
991	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
992	select SYS_HAS_EARLY_PRINTK
993	select SYS_HAS_CPU_CAVIUM_OCTEON
994	select HAVE_PCI
995	select HAVE_PLAT_DELAY
996	select HAVE_PLAT_FW_INIT_CMDLINE
997	select HAVE_PLAT_MEMCPY
998	select ZONE_DMA32
999	select HOLES_IN_ZONE
1000	select GPIOLIB
1001	select USE_OF
1002	select ARCH_SPARSEMEM_ENABLE
1003	select SYS_SUPPORTS_SMP
1004	select NR_CPUS_DEFAULT_64
1005	select MIPS_NR_CPU_NR_MAP_1024
1006	select BUILTIN_DTB
1007	select MTD
1008	select MTD_COMPLEX_MAPPINGS
1009	select SWIOTLB
1010	select SYS_SUPPORTS_RELOCATABLE
1011	help
1012	  This option supports all of the Octeon reference boards from Cavium
1013	  Networks. It builds a kernel that dynamically determines the Octeon
1014	  CPU type and supports all known board reference implementations.
1015	  Some of the supported boards are:
1016		EBT3000
1017		EBH3000
1018		EBH3100
1019		Thunder
1020		Kodama
1021		Hikari
1022	  Say Y here for most Octeon reference boards.
1023
1024config NLM_XLR_BOARD
1025	bool "Netlogic XLR/XLS based systems"
1026	select BOOT_ELF32
1027	select NLM_COMMON
1028	select SYS_HAS_CPU_XLR
1029	select SYS_SUPPORTS_SMP
1030	select HAVE_PCI
1031	select SWAP_IO_SPACE
1032	select SYS_SUPPORTS_32BIT_KERNEL
1033	select SYS_SUPPORTS_64BIT_KERNEL
1034	select PHYS_ADDR_T_64BIT
1035	select SYS_SUPPORTS_BIG_ENDIAN
1036	select SYS_SUPPORTS_HIGHMEM
1037	select NR_CPUS_DEFAULT_32
1038	select CEVT_R4K
1039	select CSRC_R4K
1040	select IRQ_MIPS_CPU
1041	select ZONE_DMA32 if 64BIT
1042	select SYNC_R4K
1043	select SYS_HAS_EARLY_PRINTK
1044	select SYS_SUPPORTS_ZBOOT
1045	select SYS_SUPPORTS_ZBOOT_UART16550
1046	help
1047	  Support for systems based on Netlogic XLR and XLS processors.
1048	  Say Y here if you have a XLR or XLS based board.
1049
1050config NLM_XLP_BOARD
1051	bool "Netlogic XLP based systems"
1052	select BOOT_ELF32
1053	select NLM_COMMON
1054	select SYS_HAS_CPU_XLP
1055	select SYS_SUPPORTS_SMP
1056	select HAVE_PCI
1057	select SYS_SUPPORTS_32BIT_KERNEL
1058	select SYS_SUPPORTS_64BIT_KERNEL
1059	select PHYS_ADDR_T_64BIT
1060	select GPIOLIB
1061	select SYS_SUPPORTS_BIG_ENDIAN
1062	select SYS_SUPPORTS_LITTLE_ENDIAN
1063	select SYS_SUPPORTS_HIGHMEM
1064	select NR_CPUS_DEFAULT_32
1065	select CEVT_R4K
1066	select CSRC_R4K
1067	select IRQ_MIPS_CPU
1068	select ZONE_DMA32 if 64BIT
1069	select SYNC_R4K
1070	select SYS_HAS_EARLY_PRINTK
1071	select USE_OF
1072	select SYS_SUPPORTS_ZBOOT
1073	select SYS_SUPPORTS_ZBOOT_UART16550
1074	help
1075	  This board is based on Netlogic XLP Processor.
1076	  Say Y here if you have a XLP based board.
1077
1078endchoice
1079
1080source "arch/mips/alchemy/Kconfig"
1081source "arch/mips/ath25/Kconfig"
1082source "arch/mips/ath79/Kconfig"
1083source "arch/mips/bcm47xx/Kconfig"
1084source "arch/mips/bcm63xx/Kconfig"
1085source "arch/mips/bmips/Kconfig"
1086source "arch/mips/generic/Kconfig"
1087source "arch/mips/ingenic/Kconfig"
1088source "arch/mips/jazz/Kconfig"
1089source "arch/mips/lantiq/Kconfig"
1090source "arch/mips/pic32/Kconfig"
1091source "arch/mips/pistachio/Kconfig"
1092source "arch/mips/ralink/Kconfig"
1093source "arch/mips/sgi-ip27/Kconfig"
1094source "arch/mips/sibyte/Kconfig"
1095source "arch/mips/txx9/Kconfig"
1096source "arch/mips/vr41xx/Kconfig"
1097source "arch/mips/cavium-octeon/Kconfig"
1098source "arch/mips/loongson2ef/Kconfig"
1099source "arch/mips/loongson32/Kconfig"
1100source "arch/mips/loongson64/Kconfig"
1101source "arch/mips/netlogic/Kconfig"
1102
1103endmenu
1104
1105config GENERIC_HWEIGHT
1106	bool
1107	default y
1108
1109config GENERIC_CALIBRATE_DELAY
1110	bool
1111	default y
1112
1113config SCHED_OMIT_FRAME_POINTER
1114	bool
1115	default y
1116
1117#
1118# Select some configuration options automatically based on user selections.
1119#
1120config FW_ARC
1121	bool
1122
1123config ARCH_MAY_HAVE_PC_FDC
1124	bool
1125
1126config BOOT_RAW
1127	bool
1128
1129config CEVT_BCM1480
1130	bool
1131
1132config CEVT_DS1287
1133	bool
1134
1135config CEVT_GT641XX
1136	bool
1137
1138config CEVT_R4K
1139	bool
1140
1141config CEVT_SB1250
1142	bool
1143
1144config CEVT_TXX9
1145	bool
1146
1147config CSRC_BCM1480
1148	bool
1149
1150config CSRC_IOASIC
1151	bool
1152
1153config CSRC_R4K
1154	select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1155	bool
1156
1157config CSRC_SB1250
1158	bool
1159
1160config MIPS_CLOCK_VSYSCALL
1161	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1162
1163config GPIO_TXX9
1164	select GPIOLIB
1165	bool
1166
1167config FW_CFE
1168	bool
1169
1170config ARCH_SUPPORTS_UPROBES
1171	bool
1172
1173config DMA_PERDEV_COHERENT
1174	bool
1175	select ARCH_HAS_SETUP_DMA_OPS
1176	select DMA_NONCOHERENT
1177
1178config DMA_NONCOHERENT
1179	bool
1180	#
1181	# MIPS allows mixing "slightly different" Cacheability and Coherency
1182	# Attribute bits.  It is believed that the uncached access through
1183	# KSEG1 and the implementation specific "uncached accelerated" used
1184	# by pgprot_writcombine can be mixed, and the latter sometimes provides
1185	# significant advantages.
1186	#
1187	select ARCH_HAS_DMA_WRITE_COMBINE
1188	select ARCH_HAS_DMA_PREP_COHERENT
1189	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1190	select ARCH_HAS_DMA_SET_UNCACHED
1191	select DMA_NONCOHERENT_MMAP
1192	select NEED_DMA_MAP_STATE
1193
1194config SYS_HAS_EARLY_PRINTK
1195	bool
1196
1197config SYS_SUPPORTS_HOTPLUG_CPU
1198	bool
1199
1200config MIPS_BONITO64
1201	bool
1202
1203config MIPS_MSC
1204	bool
1205
1206config SYNC_R4K
1207	bool
1208
1209config NO_IOPORT_MAP
1210	def_bool n
1211
1212config GENERIC_CSUM
1213	def_bool CPU_NO_LOAD_STORE_LR
1214
1215config GENERIC_ISA_DMA
1216	bool
1217	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1218	select ISA_DMA_API
1219
1220config GENERIC_ISA_DMA_SUPPORT_BROKEN
1221	bool
1222	select GENERIC_ISA_DMA
1223
1224config HAVE_PLAT_DELAY
1225	bool
1226
1227config HAVE_PLAT_FW_INIT_CMDLINE
1228	bool
1229
1230config HAVE_PLAT_MEMCPY
1231	bool
1232
1233config ISA_DMA_API
1234	bool
1235
1236config SYS_SUPPORTS_RELOCATABLE
1237	bool
1238	help
1239	  Selected if the platform supports relocating the kernel.
1240	  The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1241	  to allow access to command line and entropy sources.
1242
1243config MIPS_CBPF_JIT
1244	def_bool y
1245	depends on BPF_JIT && HAVE_CBPF_JIT
1246
1247config MIPS_EBPF_JIT
1248	def_bool y
1249	depends on BPF_JIT && HAVE_EBPF_JIT
1250
1251
1252#
1253# Endianness selection.  Sufficiently obscure so many users don't know what to
1254# answer,so we try hard to limit the available choices.  Also the use of a
1255# choice statement should be more obvious to the user.
1256#
1257choice
1258	prompt "Endianness selection"
1259	help
1260	  Some MIPS machines can be configured for either little or big endian
1261	  byte order. These modes require different kernels and a different
1262	  Linux distribution.  In general there is one preferred byteorder for a
1263	  particular system but some systems are just as commonly used in the
1264	  one or the other endianness.
1265
1266config CPU_BIG_ENDIAN
1267	bool "Big endian"
1268	depends on SYS_SUPPORTS_BIG_ENDIAN
1269
1270config CPU_LITTLE_ENDIAN
1271	bool "Little endian"
1272	depends on SYS_SUPPORTS_LITTLE_ENDIAN
1273
1274endchoice
1275
1276config EXPORT_UASM
1277	bool
1278
1279config SYS_SUPPORTS_APM_EMULATION
1280	bool
1281
1282config SYS_SUPPORTS_BIG_ENDIAN
1283	bool
1284
1285config SYS_SUPPORTS_LITTLE_ENDIAN
1286	bool
1287
1288config MIPS_HUGE_TLB_SUPPORT
1289	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1290
1291config IRQ_MSP_SLP
1292	bool
1293
1294config IRQ_MSP_CIC
1295	bool
1296
1297config IRQ_TXX9
1298	bool
1299
1300config IRQ_GT641XX
1301	bool
1302
1303config PCI_GT64XXX_PCI0
1304	bool
1305
1306config PCI_XTALK_BRIDGE
1307	bool
1308
1309config NO_EXCEPT_FILL
1310	bool
1311
1312config MIPS_SPRAM
1313	bool
1314
1315config SWAP_IO_SPACE
1316	bool
1317
1318config SGI_HAS_INDYDOG
1319	bool
1320
1321config SGI_HAS_HAL2
1322	bool
1323
1324config SGI_HAS_SEEQ
1325	bool
1326
1327config SGI_HAS_WD93
1328	bool
1329
1330config SGI_HAS_ZILOG
1331	bool
1332
1333config SGI_HAS_I8042
1334	bool
1335
1336config DEFAULT_SGI_PARTITION
1337	bool
1338
1339config FW_ARC32
1340	bool
1341
1342config FW_SNIPROM
1343	bool
1344
1345config BOOT_ELF32
1346	bool
1347
1348config MIPS_L1_CACHE_SHIFT_4
1349	bool
1350
1351config MIPS_L1_CACHE_SHIFT_5
1352	bool
1353
1354config MIPS_L1_CACHE_SHIFT_6
1355	bool
1356
1357config MIPS_L1_CACHE_SHIFT_7
1358	bool
1359
1360config MIPS_L1_CACHE_SHIFT
1361	int
1362	default "7" if MIPS_L1_CACHE_SHIFT_7
1363	default "6" if MIPS_L1_CACHE_SHIFT_6
1364	default "5" if MIPS_L1_CACHE_SHIFT_5
1365	default "4" if MIPS_L1_CACHE_SHIFT_4
1366	default "5"
1367
1368config ARC_CMDLINE_ONLY
1369	bool
1370
1371config ARC_CONSOLE
1372	bool "ARC console support"
1373	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1374
1375config ARC_MEMORY
1376	bool
1377
1378config ARC_PROMLIB
1379	bool
1380
1381config FW_ARC64
1382	bool
1383
1384config BOOT_ELF64
1385	bool
1386
1387menu "CPU selection"
1388
1389choice
1390	prompt "CPU type"
1391	default CPU_R4X00
1392
1393config CPU_LOONGSON64
1394	bool "Loongson 64-bit CPU"
1395	depends on SYS_HAS_CPU_LOONGSON64
1396	select ARCH_HAS_PHYS_TO_DMA
1397	select CPU_MIPSR2
1398	select CPU_HAS_PREFETCH
1399	select CPU_SUPPORTS_64BIT_KERNEL
1400	select CPU_SUPPORTS_HIGHMEM
1401	select CPU_SUPPORTS_HUGEPAGES
1402	select CPU_SUPPORTS_MSA
1403	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1404	select CPU_MIPSR2_IRQ_VI
1405	select WEAK_ORDERING
1406	select WEAK_REORDERING_BEYOND_LLSC
1407	select MIPS_ASID_BITS_VARIABLE
1408	select MIPS_PGD_C0_CONTEXT
1409	select MIPS_L1_CACHE_SHIFT_6
1410	select GPIOLIB
1411	select SWIOTLB
1412	select HAVE_KVM
1413	help
1414		The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1415		cores implements the MIPS64R2 instruction set with many extensions,
1416		including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1417		3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1418		Loongson-2E/2F is not covered here and will be removed in future.
1419
1420config LOONGSON3_ENHANCEMENT
1421	bool "New Loongson-3 CPU Enhancements"
1422	default n
1423	depends on CPU_LOONGSON64
1424	help
1425	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1426	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1427	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1428	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1429	  Fast TLB refill support, etc.
1430
1431	  This option enable those enhancements which are not probed at run
1432	  time. If you want a generic kernel to run on all Loongson 3 machines,
1433	  please say 'N' here. If you want a high-performance kernel to run on
1434	  new Loongson-3 machines only, please say 'Y' here.
1435
1436config CPU_LOONGSON3_WORKAROUNDS
1437	bool "Old Loongson-3 LLSC Workarounds"
1438	default y if SMP
1439	depends on CPU_LOONGSON64
1440	help
1441	  Loongson-3 processors have the llsc issues which require workarounds.
1442	  Without workarounds the system may hang unexpectedly.
1443
1444	  Newer Loongson-3 will fix these issues and no workarounds are needed.
1445	  The workarounds have no significant side effect on them but may
1446	  decrease the performance of the system so this option should be
1447	  disabled unless the kernel is intended to be run on old systems.
1448
1449	  If unsure, please say Y.
1450
1451config CPU_LOONGSON3_CPUCFG_EMULATION
1452	bool "Emulate the CPUCFG instruction on older Loongson cores"
1453	default y
1454	depends on CPU_LOONGSON64
1455	help
1456	  Loongson-3A R4 and newer have the CPUCFG instruction available for
1457	  userland to query CPU capabilities, much like CPUID on x86. This
1458	  option provides emulation of the instruction on older Loongson
1459	  cores, back to Loongson-3A1000.
1460
1461	  If unsure, please say Y.
1462
1463config CPU_LOONGSON2E
1464	bool "Loongson 2E"
1465	depends on SYS_HAS_CPU_LOONGSON2E
1466	select CPU_LOONGSON2EF
1467	help
1468	  The Loongson 2E processor implements the MIPS III instruction set
1469	  with many extensions.
1470
1471	  It has an internal FPGA northbridge, which is compatible to
1472	  bonito64.
1473
1474config CPU_LOONGSON2F
1475	bool "Loongson 2F"
1476	depends on SYS_HAS_CPU_LOONGSON2F
1477	select CPU_LOONGSON2EF
1478	select GPIOLIB
1479	help
1480	  The Loongson 2F processor implements the MIPS III instruction set
1481	  with many extensions.
1482
1483	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1484	  have a similar programming interface with FPGA northbridge used in
1485	  Loongson2E.
1486
1487config CPU_LOONGSON1B
1488	bool "Loongson 1B"
1489	depends on SYS_HAS_CPU_LOONGSON1B
1490	select CPU_LOONGSON32
1491	select LEDS_GPIO_REGISTER
1492	help
1493	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1494	  Release 1 instruction set and part of the MIPS32 Release 2
1495	  instruction set.
1496
1497config CPU_LOONGSON1C
1498	bool "Loongson 1C"
1499	depends on SYS_HAS_CPU_LOONGSON1C
1500	select CPU_LOONGSON32
1501	select LEDS_GPIO_REGISTER
1502	help
1503	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1504	  Release 1 instruction set and part of the MIPS32 Release 2
1505	  instruction set.
1506
1507config CPU_MIPS32_R1
1508	bool "MIPS32 Release 1"
1509	depends on SYS_HAS_CPU_MIPS32_R1
1510	select CPU_HAS_PREFETCH
1511	select CPU_SUPPORTS_32BIT_KERNEL
1512	select CPU_SUPPORTS_HIGHMEM
1513	help
1514	  Choose this option to build a kernel for release 1 or later of the
1515	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1516	  MIPS processor are based on a MIPS32 processor.  If you know the
1517	  specific type of processor in your system, choose those that one
1518	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1519	  Release 2 of the MIPS32 architecture is available since several
1520	  years so chances are you even have a MIPS32 Release 2 processor
1521	  in which case you should choose CPU_MIPS32_R2 instead for better
1522	  performance.
1523
1524config CPU_MIPS32_R2
1525	bool "MIPS32 Release 2"
1526	depends on SYS_HAS_CPU_MIPS32_R2
1527	select CPU_HAS_PREFETCH
1528	select CPU_SUPPORTS_32BIT_KERNEL
1529	select CPU_SUPPORTS_HIGHMEM
1530	select CPU_SUPPORTS_MSA
1531	select HAVE_KVM
1532	help
1533	  Choose this option to build a kernel for release 2 or later of the
1534	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1535	  MIPS processor are based on a MIPS32 processor.  If you know the
1536	  specific type of processor in your system, choose those that one
1537	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1538
1539config CPU_MIPS32_R5
1540	bool "MIPS32 Release 5"
1541	depends on SYS_HAS_CPU_MIPS32_R5
1542	select CPU_HAS_PREFETCH
1543	select CPU_SUPPORTS_32BIT_KERNEL
1544	select CPU_SUPPORTS_HIGHMEM
1545	select CPU_SUPPORTS_MSA
1546	select HAVE_KVM
1547	select MIPS_O32_FP64_SUPPORT
1548	help
1549	  Choose this option to build a kernel for release 5 or later of the
1550	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1551	  family, are based on a MIPS32r5 processor. If you own an older
1552	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1553
1554config CPU_MIPS32_R6
1555	bool "MIPS32 Release 6"
1556	depends on SYS_HAS_CPU_MIPS32_R6
1557	select CPU_HAS_PREFETCH
1558	select CPU_NO_LOAD_STORE_LR
1559	select CPU_SUPPORTS_32BIT_KERNEL
1560	select CPU_SUPPORTS_HIGHMEM
1561	select CPU_SUPPORTS_MSA
1562	select HAVE_KVM
1563	select MIPS_O32_FP64_SUPPORT
1564	help
1565	  Choose this option to build a kernel for release 6 or later of the
1566	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1567	  family, are based on a MIPS32r6 processor. If you own an older
1568	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1569
1570config CPU_MIPS64_R1
1571	bool "MIPS64 Release 1"
1572	depends on SYS_HAS_CPU_MIPS64_R1
1573	select CPU_HAS_PREFETCH
1574	select CPU_SUPPORTS_32BIT_KERNEL
1575	select CPU_SUPPORTS_64BIT_KERNEL
1576	select CPU_SUPPORTS_HIGHMEM
1577	select CPU_SUPPORTS_HUGEPAGES
1578	help
1579	  Choose this option to build a kernel for release 1 or later of the
1580	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1581	  MIPS processor are based on a MIPS64 processor.  If you know the
1582	  specific type of processor in your system, choose those that one
1583	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1584	  Release 2 of the MIPS64 architecture is available since several
1585	  years so chances are you even have a MIPS64 Release 2 processor
1586	  in which case you should choose CPU_MIPS64_R2 instead for better
1587	  performance.
1588
1589config CPU_MIPS64_R2
1590	bool "MIPS64 Release 2"
1591	depends on SYS_HAS_CPU_MIPS64_R2
1592	select CPU_HAS_PREFETCH
1593	select CPU_SUPPORTS_32BIT_KERNEL
1594	select CPU_SUPPORTS_64BIT_KERNEL
1595	select CPU_SUPPORTS_HIGHMEM
1596	select CPU_SUPPORTS_HUGEPAGES
1597	select CPU_SUPPORTS_MSA
1598	select HAVE_KVM
1599	help
1600	  Choose this option to build a kernel for release 2 or later of the
1601	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1602	  MIPS processor are based on a MIPS64 processor.  If you know the
1603	  specific type of processor in your system, choose those that one
1604	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1605
1606config CPU_MIPS64_R5
1607	bool "MIPS64 Release 5"
1608	depends on SYS_HAS_CPU_MIPS64_R5
1609	select CPU_HAS_PREFETCH
1610	select CPU_SUPPORTS_32BIT_KERNEL
1611	select CPU_SUPPORTS_64BIT_KERNEL
1612	select CPU_SUPPORTS_HIGHMEM
1613	select CPU_SUPPORTS_HUGEPAGES
1614	select CPU_SUPPORTS_MSA
1615	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1616	select HAVE_KVM
1617	help
1618	  Choose this option to build a kernel for release 5 or later of the
1619	  MIPS64 architecture.  This is a intermediate MIPS architecture
1620	  release partly implementing release 6 features. Though there is no
1621	  any hardware known to be based on this release.
1622
1623config CPU_MIPS64_R6
1624	bool "MIPS64 Release 6"
1625	depends on SYS_HAS_CPU_MIPS64_R6
1626	select CPU_HAS_PREFETCH
1627	select CPU_NO_LOAD_STORE_LR
1628	select CPU_SUPPORTS_32BIT_KERNEL
1629	select CPU_SUPPORTS_64BIT_KERNEL
1630	select CPU_SUPPORTS_HIGHMEM
1631	select CPU_SUPPORTS_HUGEPAGES
1632	select CPU_SUPPORTS_MSA
1633	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1634	select HAVE_KVM
1635	help
1636	  Choose this option to build a kernel for release 6 or later of the
1637	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
1638	  family, are based on a MIPS64r6 processor. If you own an older
1639	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1640
1641config CPU_P5600
1642	bool "MIPS Warrior P5600"
1643	depends on SYS_HAS_CPU_P5600
1644	select CPU_HAS_PREFETCH
1645	select CPU_SUPPORTS_32BIT_KERNEL
1646	select CPU_SUPPORTS_HIGHMEM
1647	select CPU_SUPPORTS_MSA
1648	select CPU_SUPPORTS_CPUFREQ
1649	select CPU_MIPSR2_IRQ_VI
1650	select CPU_MIPSR2_IRQ_EI
1651	select HAVE_KVM
1652	select MIPS_O32_FP64_SUPPORT
1653	help
1654	  Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1655	  It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1656	  MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1657	  level features like up to six P5600 calculation cores, CM2 with L2
1658	  cache, IOCU/IOMMU (though might be unused depending on the system-
1659	  specific IP core configuration), GIC, CPC, virtualisation module,
1660	  eJTAG and PDtrace.
1661
1662config CPU_R3000
1663	bool "R3000"
1664	depends on SYS_HAS_CPU_R3000
1665	select CPU_HAS_WB
1666	select CPU_R3K_TLB
1667	select CPU_SUPPORTS_32BIT_KERNEL
1668	select CPU_SUPPORTS_HIGHMEM
1669	help
1670	  Please make sure to pick the right CPU type. Linux/MIPS is not
1671	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1672	  *not* work on R4000 machines and vice versa.  However, since most
1673	  of the supported machines have an R4000 (or similar) CPU, R4x00
1674	  might be a safe bet.  If the resulting kernel does not work,
1675	  try to recompile with R3000.
1676
1677config CPU_TX39XX
1678	bool "R39XX"
1679	depends on SYS_HAS_CPU_TX39XX
1680	select CPU_SUPPORTS_32BIT_KERNEL
1681	select CPU_R3K_TLB
1682
1683config CPU_VR41XX
1684	bool "R41xx"
1685	depends on SYS_HAS_CPU_VR41XX
1686	select CPU_SUPPORTS_32BIT_KERNEL
1687	select CPU_SUPPORTS_64BIT_KERNEL
1688	help
1689	  The options selects support for the NEC VR4100 series of processors.
1690	  Only choose this option if you have one of these processors as a
1691	  kernel built with this option will not run on any other type of
1692	  processor or vice versa.
1693
1694config CPU_R4300
1695	bool "R4300"
1696	depends on SYS_HAS_CPU_R4300
1697	select CPU_SUPPORTS_32BIT_KERNEL
1698	select CPU_SUPPORTS_64BIT_KERNEL
1699	select CPU_HAS_LOAD_STORE_LR
1700	help
1701	  MIPS Technologies R4300-series processors.
1702
1703config CPU_R4X00
1704	bool "R4x00"
1705	depends on SYS_HAS_CPU_R4X00
1706	select CPU_SUPPORTS_32BIT_KERNEL
1707	select CPU_SUPPORTS_64BIT_KERNEL
1708	select CPU_SUPPORTS_HUGEPAGES
1709	help
1710	  MIPS Technologies R4000-series processors other than 4300, including
1711	  the R4000, R4400, R4600, and 4700.
1712
1713config CPU_TX49XX
1714	bool "R49XX"
1715	depends on SYS_HAS_CPU_TX49XX
1716	select CPU_HAS_PREFETCH
1717	select CPU_SUPPORTS_32BIT_KERNEL
1718	select CPU_SUPPORTS_64BIT_KERNEL
1719	select CPU_SUPPORTS_HUGEPAGES
1720
1721config CPU_R5000
1722	bool "R5000"
1723	depends on SYS_HAS_CPU_R5000
1724	select CPU_SUPPORTS_32BIT_KERNEL
1725	select CPU_SUPPORTS_64BIT_KERNEL
1726	select CPU_SUPPORTS_HUGEPAGES
1727	help
1728	  MIPS Technologies R5000-series processors other than the Nevada.
1729
1730config CPU_R5500
1731	bool "R5500"
1732	depends on SYS_HAS_CPU_R5500
1733	select CPU_SUPPORTS_32BIT_KERNEL
1734	select CPU_SUPPORTS_64BIT_KERNEL
1735	select CPU_SUPPORTS_HUGEPAGES
1736	help
1737	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1738	  instruction set.
1739
1740config CPU_NEVADA
1741	bool "RM52xx"
1742	depends on SYS_HAS_CPU_NEVADA
1743	select CPU_SUPPORTS_32BIT_KERNEL
1744	select CPU_SUPPORTS_64BIT_KERNEL
1745	select CPU_SUPPORTS_HUGEPAGES
1746	help
1747	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1748
1749config CPU_R10000
1750	bool "R10000"
1751	depends on SYS_HAS_CPU_R10000
1752	select CPU_HAS_PREFETCH
1753	select CPU_SUPPORTS_32BIT_KERNEL
1754	select CPU_SUPPORTS_64BIT_KERNEL
1755	select CPU_SUPPORTS_HIGHMEM
1756	select CPU_SUPPORTS_HUGEPAGES
1757	help
1758	  MIPS Technologies R10000-series processors.
1759
1760config CPU_RM7000
1761	bool "RM7000"
1762	depends on SYS_HAS_CPU_RM7000
1763	select CPU_HAS_PREFETCH
1764	select CPU_SUPPORTS_32BIT_KERNEL
1765	select CPU_SUPPORTS_64BIT_KERNEL
1766	select CPU_SUPPORTS_HIGHMEM
1767	select CPU_SUPPORTS_HUGEPAGES
1768
1769config CPU_SB1
1770	bool "SB1"
1771	depends on SYS_HAS_CPU_SB1
1772	select CPU_SUPPORTS_32BIT_KERNEL
1773	select CPU_SUPPORTS_64BIT_KERNEL
1774	select CPU_SUPPORTS_HIGHMEM
1775	select CPU_SUPPORTS_HUGEPAGES
1776	select WEAK_ORDERING
1777
1778config CPU_CAVIUM_OCTEON
1779	bool "Cavium Octeon processor"
1780	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1781	select CPU_HAS_PREFETCH
1782	select CPU_SUPPORTS_64BIT_KERNEL
1783	select WEAK_ORDERING
1784	select CPU_SUPPORTS_HIGHMEM
1785	select CPU_SUPPORTS_HUGEPAGES
1786	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1787	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1788	select MIPS_L1_CACHE_SHIFT_7
1789	select HAVE_KVM
1790	help
1791	  The Cavium Octeon processor is a highly integrated chip containing
1792	  many ethernet hardware widgets for networking tasks. The processor
1793	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1794	  Full details can be found at http://www.caviumnetworks.com.
1795
1796config CPU_BMIPS
1797	bool "Broadcom BMIPS"
1798	depends on SYS_HAS_CPU_BMIPS
1799	select CPU_MIPS32
1800	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1801	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1802	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1803	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1804	select CPU_SUPPORTS_32BIT_KERNEL
1805	select DMA_NONCOHERENT
1806	select IRQ_MIPS_CPU
1807	select SWAP_IO_SPACE
1808	select WEAK_ORDERING
1809	select CPU_SUPPORTS_HIGHMEM
1810	select CPU_HAS_PREFETCH
1811	select CPU_SUPPORTS_CPUFREQ
1812	select MIPS_EXTERNAL_TIMER
1813	help
1814	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1815
1816config CPU_XLR
1817	bool "Netlogic XLR SoC"
1818	depends on SYS_HAS_CPU_XLR
1819	select CPU_SUPPORTS_32BIT_KERNEL
1820	select CPU_SUPPORTS_64BIT_KERNEL
1821	select CPU_SUPPORTS_HIGHMEM
1822	select CPU_SUPPORTS_HUGEPAGES
1823	select WEAK_ORDERING
1824	select WEAK_REORDERING_BEYOND_LLSC
1825	help
1826	  Netlogic Microsystems XLR/XLS processors.
1827
1828config CPU_XLP
1829	bool "Netlogic XLP SoC"
1830	depends on SYS_HAS_CPU_XLP
1831	select CPU_SUPPORTS_32BIT_KERNEL
1832	select CPU_SUPPORTS_64BIT_KERNEL
1833	select CPU_SUPPORTS_HIGHMEM
1834	select WEAK_ORDERING
1835	select WEAK_REORDERING_BEYOND_LLSC
1836	select CPU_HAS_PREFETCH
1837	select CPU_MIPSR2
1838	select CPU_SUPPORTS_HUGEPAGES
1839	select MIPS_ASID_BITS_VARIABLE
1840	help
1841	  Netlogic Microsystems XLP processors.
1842endchoice
1843
1844config CPU_MIPS32_3_5_FEATURES
1845	bool "MIPS32 Release 3.5 Features"
1846	depends on SYS_HAS_CPU_MIPS32_R3_5
1847	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1848		   CPU_P5600
1849	help
1850	  Choose this option to build a kernel for release 2 or later of the
1851	  MIPS32 architecture including features from the 3.5 release such as
1852	  support for Enhanced Virtual Addressing (EVA).
1853
1854config CPU_MIPS32_3_5_EVA
1855	bool "Enhanced Virtual Addressing (EVA)"
1856	depends on CPU_MIPS32_3_5_FEATURES
1857	select EVA
1858	default y
1859	help
1860	  Choose this option if you want to enable the Enhanced Virtual
1861	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1862	  One of its primary benefits is an increase in the maximum size
1863	  of lowmem (up to 3GB). If unsure, say 'N' here.
1864
1865config CPU_MIPS32_R5_FEATURES
1866	bool "MIPS32 Release 5 Features"
1867	depends on SYS_HAS_CPU_MIPS32_R5
1868	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1869	help
1870	  Choose this option to build a kernel for release 2 or later of the
1871	  MIPS32 architecture including features from release 5 such as
1872	  support for Extended Physical Addressing (XPA).
1873
1874config CPU_MIPS32_R5_XPA
1875	bool "Extended Physical Addressing (XPA)"
1876	depends on CPU_MIPS32_R5_FEATURES
1877	depends on !EVA
1878	depends on !PAGE_SIZE_4KB
1879	depends on SYS_SUPPORTS_HIGHMEM
1880	select XPA
1881	select HIGHMEM
1882	select PHYS_ADDR_T_64BIT
1883	default n
1884	help
1885	  Choose this option if you want to enable the Extended Physical
1886	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1887	  benefit is to increase physical addressing equal to or greater
1888	  than 40 bits. Note that this has the side effect of turning on
1889	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1890	  If unsure, say 'N' here.
1891
1892if CPU_LOONGSON2F
1893config CPU_NOP_WORKAROUNDS
1894	bool
1895
1896config CPU_JUMP_WORKAROUNDS
1897	bool
1898
1899config CPU_LOONGSON2F_WORKAROUNDS
1900	bool "Loongson 2F Workarounds"
1901	default y
1902	select CPU_NOP_WORKAROUNDS
1903	select CPU_JUMP_WORKAROUNDS
1904	help
1905	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1906	  require workarounds.  Without workarounds the system may hang
1907	  unexpectedly.  For more information please refer to the gas
1908	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1909
1910	  Loongson 2F03 and later have fixed these issues and no workarounds
1911	  are needed.  The workarounds have no significant side effect on them
1912	  but may decrease the performance of the system so this option should
1913	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1914	  systems.
1915
1916	  If unsure, please say Y.
1917endif # CPU_LOONGSON2F
1918
1919config SYS_SUPPORTS_ZBOOT
1920	bool
1921	select HAVE_KERNEL_GZIP
1922	select HAVE_KERNEL_BZIP2
1923	select HAVE_KERNEL_LZ4
1924	select HAVE_KERNEL_LZMA
1925	select HAVE_KERNEL_LZO
1926	select HAVE_KERNEL_XZ
1927	select HAVE_KERNEL_ZSTD
1928
1929config SYS_SUPPORTS_ZBOOT_UART16550
1930	bool
1931	select SYS_SUPPORTS_ZBOOT
1932
1933config SYS_SUPPORTS_ZBOOT_UART_PROM
1934	bool
1935	select SYS_SUPPORTS_ZBOOT
1936
1937config CPU_LOONGSON2EF
1938	bool
1939	select CPU_SUPPORTS_32BIT_KERNEL
1940	select CPU_SUPPORTS_64BIT_KERNEL
1941	select CPU_SUPPORTS_HIGHMEM
1942	select CPU_SUPPORTS_HUGEPAGES
1943	select ARCH_HAS_PHYS_TO_DMA
1944
1945config CPU_LOONGSON32
1946	bool
1947	select CPU_MIPS32
1948	select CPU_MIPSR2
1949	select CPU_HAS_PREFETCH
1950	select CPU_SUPPORTS_32BIT_KERNEL
1951	select CPU_SUPPORTS_HIGHMEM
1952	select CPU_SUPPORTS_CPUFREQ
1953
1954config CPU_BMIPS32_3300
1955	select SMP_UP if SMP
1956	bool
1957
1958config CPU_BMIPS4350
1959	bool
1960	select SYS_SUPPORTS_SMP
1961	select SYS_SUPPORTS_HOTPLUG_CPU
1962
1963config CPU_BMIPS4380
1964	bool
1965	select MIPS_L1_CACHE_SHIFT_6
1966	select SYS_SUPPORTS_SMP
1967	select SYS_SUPPORTS_HOTPLUG_CPU
1968	select CPU_HAS_RIXI
1969
1970config CPU_BMIPS5000
1971	bool
1972	select MIPS_CPU_SCACHE
1973	select MIPS_L1_CACHE_SHIFT_7
1974	select SYS_SUPPORTS_SMP
1975	select SYS_SUPPORTS_HOTPLUG_CPU
1976	select CPU_HAS_RIXI
1977
1978config SYS_HAS_CPU_LOONGSON64
1979	bool
1980	select CPU_SUPPORTS_CPUFREQ
1981	select CPU_HAS_RIXI
1982
1983config SYS_HAS_CPU_LOONGSON2E
1984	bool
1985
1986config SYS_HAS_CPU_LOONGSON2F
1987	bool
1988	select CPU_SUPPORTS_CPUFREQ
1989	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1990
1991config SYS_HAS_CPU_LOONGSON1B
1992	bool
1993
1994config SYS_HAS_CPU_LOONGSON1C
1995	bool
1996
1997config SYS_HAS_CPU_MIPS32_R1
1998	bool
1999
2000config SYS_HAS_CPU_MIPS32_R2
2001	bool
2002
2003config SYS_HAS_CPU_MIPS32_R3_5
2004	bool
2005
2006config SYS_HAS_CPU_MIPS32_R5
2007	bool
2008	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2009
2010config SYS_HAS_CPU_MIPS32_R6
2011	bool
2012	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2013
2014config SYS_HAS_CPU_MIPS64_R1
2015	bool
2016
2017config SYS_HAS_CPU_MIPS64_R2
2018	bool
2019
2020config SYS_HAS_CPU_MIPS64_R6
2021	bool
2022	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2023
2024config SYS_HAS_CPU_P5600
2025	bool
2026	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2027
2028config SYS_HAS_CPU_R3000
2029	bool
2030
2031config SYS_HAS_CPU_TX39XX
2032	bool
2033
2034config SYS_HAS_CPU_VR41XX
2035	bool
2036
2037config SYS_HAS_CPU_R4300
2038	bool
2039
2040config SYS_HAS_CPU_R4X00
2041	bool
2042
2043config SYS_HAS_CPU_TX49XX
2044	bool
2045
2046config SYS_HAS_CPU_R5000
2047	bool
2048
2049config SYS_HAS_CPU_R5500
2050	bool
2051
2052config SYS_HAS_CPU_NEVADA
2053	bool
2054
2055config SYS_HAS_CPU_R10000
2056	bool
2057	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2058
2059config SYS_HAS_CPU_RM7000
2060	bool
2061
2062config SYS_HAS_CPU_SB1
2063	bool
2064
2065config SYS_HAS_CPU_CAVIUM_OCTEON
2066	bool
2067
2068config SYS_HAS_CPU_BMIPS
2069	bool
2070
2071config SYS_HAS_CPU_BMIPS32_3300
2072	bool
2073	select SYS_HAS_CPU_BMIPS
2074
2075config SYS_HAS_CPU_BMIPS4350
2076	bool
2077	select SYS_HAS_CPU_BMIPS
2078
2079config SYS_HAS_CPU_BMIPS4380
2080	bool
2081	select SYS_HAS_CPU_BMIPS
2082
2083config SYS_HAS_CPU_BMIPS5000
2084	bool
2085	select SYS_HAS_CPU_BMIPS
2086	select ARCH_HAS_SYNC_DMA_FOR_CPU
2087
2088config SYS_HAS_CPU_XLR
2089	bool
2090
2091config SYS_HAS_CPU_XLP
2092	bool
2093
2094#
2095# CPU may reorder R->R, R->W, W->R, W->W
2096# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2097#
2098config WEAK_ORDERING
2099	bool
2100
2101#
2102# CPU may reorder reads and writes beyond LL/SC
2103# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2104#
2105config WEAK_REORDERING_BEYOND_LLSC
2106	bool
2107endmenu
2108
2109#
2110# These two indicate any level of the MIPS32 and MIPS64 architecture
2111#
2112config CPU_MIPS32
2113	bool
2114	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2115		     CPU_MIPS32_R6 || CPU_P5600
2116
2117config CPU_MIPS64
2118	bool
2119	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2120		     CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2121
2122#
2123# These indicate the revision of the architecture
2124#
2125config CPU_MIPSR1
2126	bool
2127	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2128
2129config CPU_MIPSR2
2130	bool
2131	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2132	select CPU_HAS_RIXI
2133	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2134	select MIPS_SPRAM
2135
2136config CPU_MIPSR5
2137	bool
2138	default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2139	select CPU_HAS_RIXI
2140	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2141	select MIPS_SPRAM
2142
2143config CPU_MIPSR6
2144	bool
2145	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2146	select CPU_HAS_RIXI
2147	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2148	select HAVE_ARCH_BITREVERSE
2149	select MIPS_ASID_BITS_VARIABLE
2150	select MIPS_CRC_SUPPORT
2151	select MIPS_SPRAM
2152
2153config TARGET_ISA_REV
2154	int
2155	default 1 if CPU_MIPSR1
2156	default 2 if CPU_MIPSR2
2157	default 5 if CPU_MIPSR5
2158	default 6 if CPU_MIPSR6
2159	default 0
2160	help
2161	  Reflects the ISA revision being targeted by the kernel build. This
2162	  is effectively the Kconfig equivalent of MIPS_ISA_REV.
2163
2164config EVA
2165	bool
2166
2167config XPA
2168	bool
2169
2170config SYS_SUPPORTS_32BIT_KERNEL
2171	bool
2172config SYS_SUPPORTS_64BIT_KERNEL
2173	bool
2174config CPU_SUPPORTS_32BIT_KERNEL
2175	bool
2176config CPU_SUPPORTS_64BIT_KERNEL
2177	bool
2178config CPU_SUPPORTS_CPUFREQ
2179	bool
2180config CPU_SUPPORTS_ADDRWINCFG
2181	bool
2182config CPU_SUPPORTS_HUGEPAGES
2183	bool
2184	depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2185config MIPS_PGD_C0_CONTEXT
2186	bool
2187	depends on 64BIT
2188	default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2189
2190#
2191# Set to y for ptrace access to watch registers.
2192#
2193config HARDWARE_WATCHPOINTS
2194	bool
2195	default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2196
2197menu "Kernel type"
2198
2199choice
2200	prompt "Kernel code model"
2201	help
2202	  You should only select this option if you have a workload that
2203	  actually benefits from 64-bit processing or if your machine has
2204	  large memory.  You will only be presented a single option in this
2205	  menu if your system does not support both 32-bit and 64-bit kernels.
2206
2207config 32BIT
2208	bool "32-bit kernel"
2209	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2210	select TRAD_SIGNALS
2211	help
2212	  Select this option if you want to build a 32-bit kernel.
2213
2214config 64BIT
2215	bool "64-bit kernel"
2216	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2217	help
2218	  Select this option if you want to build a 64-bit kernel.
2219
2220endchoice
2221
2222config MIPS_VA_BITS_48
2223	bool "48 bits virtual memory"
2224	depends on 64BIT
2225	help
2226	  Support a maximum at least 48 bits of application virtual
2227	  memory.  Default is 40 bits or less, depending on the CPU.
2228	  For page sizes 16k and above, this option results in a small
2229	  memory overhead for page tables.  For 4k page size, a fourth
2230	  level of page tables is added which imposes both a memory
2231	  overhead as well as slower TLB fault handling.
2232
2233	  If unsure, say N.
2234
2235choice
2236	prompt "Kernel page size"
2237	default PAGE_SIZE_4KB
2238
2239config PAGE_SIZE_4KB
2240	bool "4kB"
2241	depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2242	help
2243	  This option select the standard 4kB Linux page size.  On some
2244	  R3000-family processors this is the only available page size.  Using
2245	  4kB page size will minimize memory consumption and is therefore
2246	  recommended for low memory systems.
2247
2248config PAGE_SIZE_8KB
2249	bool "8kB"
2250	depends on CPU_CAVIUM_OCTEON
2251	depends on !MIPS_VA_BITS_48
2252	help
2253	  Using 8kB page size will result in higher performance kernel at
2254	  the price of higher memory consumption.  This option is available
2255	  only on cnMIPS processors.  Note that you will need a suitable Linux
2256	  distribution to support this.
2257
2258config PAGE_SIZE_16KB
2259	bool "16kB"
2260	depends on !CPU_R3000 && !CPU_TX39XX
2261	help
2262	  Using 16kB page size will result in higher performance kernel at
2263	  the price of higher memory consumption.  This option is available on
2264	  all non-R3000 family processors.  Note that you will need a suitable
2265	  Linux distribution to support this.
2266
2267config PAGE_SIZE_32KB
2268	bool "32kB"
2269	depends on CPU_CAVIUM_OCTEON
2270	depends on !MIPS_VA_BITS_48
2271	help
2272	  Using 32kB page size will result in higher performance kernel at
2273	  the price of higher memory consumption.  This option is available
2274	  only on cnMIPS cores.  Note that you will need a suitable Linux
2275	  distribution to support this.
2276
2277config PAGE_SIZE_64KB
2278	bool "64kB"
2279	depends on !CPU_R3000 && !CPU_TX39XX
2280	help
2281	  Using 64kB page size will result in higher performance kernel at
2282	  the price of higher memory consumption.  This option is available on
2283	  all non-R3000 family processor.  Not that at the time of this
2284	  writing this option is still high experimental.
2285
2286endchoice
2287
2288config FORCE_MAX_ZONEORDER
2289	int "Maximum zone order"
2290	range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2291	default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2292	range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2293	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2294	range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2295	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2296	range 0 64
2297	default "11"
2298	help
2299	  The kernel memory allocator divides physically contiguous memory
2300	  blocks into "zones", where each zone is a power of two number of
2301	  pages.  This option selects the largest power of two that the kernel
2302	  keeps in the memory allocator.  If you need to allocate very large
2303	  blocks of physically contiguous memory, then you may need to
2304	  increase this value.
2305
2306	  This config option is actually maximum order plus one. For example,
2307	  a value of 11 means that the largest free memory block is 2^10 pages.
2308
2309	  The page size is not necessarily 4KB.  Keep this in mind
2310	  when choosing a value for this option.
2311
2312config BOARD_SCACHE
2313	bool
2314
2315config IP22_CPU_SCACHE
2316	bool
2317	select BOARD_SCACHE
2318
2319#
2320# Support for a MIPS32 / MIPS64 style S-caches
2321#
2322config MIPS_CPU_SCACHE
2323	bool
2324	select BOARD_SCACHE
2325
2326config R5000_CPU_SCACHE
2327	bool
2328	select BOARD_SCACHE
2329
2330config RM7000_CPU_SCACHE
2331	bool
2332	select BOARD_SCACHE
2333
2334config SIBYTE_DMA_PAGEOPS
2335	bool "Use DMA to clear/copy pages"
2336	depends on CPU_SB1
2337	help
2338	  Instead of using the CPU to zero and copy pages, use a Data Mover
2339	  channel.  These DMA channels are otherwise unused by the standard
2340	  SiByte Linux port.  Seems to give a small performance benefit.
2341
2342config CPU_HAS_PREFETCH
2343	bool
2344
2345config CPU_GENERIC_DUMP_TLB
2346	bool
2347	default y if !(CPU_R3000 || CPU_TX39XX)
2348
2349config MIPS_FP_SUPPORT
2350	bool "Floating Point support" if EXPERT
2351	default y
2352	help
2353	  Select y to include support for floating point in the kernel
2354	  including initialization of FPU hardware, FP context save & restore
2355	  and emulation of an FPU where necessary. Without this support any
2356	  userland program attempting to use floating point instructions will
2357	  receive a SIGILL.
2358
2359	  If you know that your userland will not attempt to use floating point
2360	  instructions then you can say n here to shrink the kernel a little.
2361
2362	  If unsure, say y.
2363
2364config CPU_R2300_FPU
2365	bool
2366	depends on MIPS_FP_SUPPORT
2367	default y if CPU_R3000 || CPU_TX39XX
2368
2369config CPU_R3K_TLB
2370	bool
2371
2372config CPU_R4K_FPU
2373	bool
2374	depends on MIPS_FP_SUPPORT
2375	default y if !CPU_R2300_FPU
2376
2377config CPU_R4K_CACHE_TLB
2378	bool
2379	default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2380
2381config MIPS_MT_SMP
2382	bool "MIPS MT SMP support (1 TC on each available VPE)"
2383	default y
2384	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2385	select CPU_MIPSR2_IRQ_VI
2386	select CPU_MIPSR2_IRQ_EI
2387	select SYNC_R4K
2388	select MIPS_MT
2389	select SMP
2390	select SMP_UP
2391	select SYS_SUPPORTS_SMP
2392	select SYS_SUPPORTS_SCHED_SMT
2393	select MIPS_PERF_SHARED_TC_COUNTERS
2394	help
2395	  This is a kernel model which is known as SMVP. This is supported
2396	  on cores with the MT ASE and uses the available VPEs to implement
2397	  virtual processors which supports SMP. This is equivalent to the
2398	  Intel Hyperthreading feature. For further information go to
2399	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
2400
2401config MIPS_MT
2402	bool
2403
2404config SCHED_SMT
2405	bool "SMT (multithreading) scheduler support"
2406	depends on SYS_SUPPORTS_SCHED_SMT
2407	default n
2408	help
2409	  SMT scheduler support improves the CPU scheduler's decision making
2410	  when dealing with MIPS MT enabled cores at a cost of slightly
2411	  increased overhead in some places. If unsure say N here.
2412
2413config SYS_SUPPORTS_SCHED_SMT
2414	bool
2415
2416config SYS_SUPPORTS_MULTITHREADING
2417	bool
2418
2419config MIPS_MT_FPAFF
2420	bool "Dynamic FPU affinity for FP-intensive threads"
2421	default y
2422	depends on MIPS_MT_SMP
2423
2424config MIPSR2_TO_R6_EMULATOR
2425	bool "MIPS R2-to-R6 emulator"
2426	depends on CPU_MIPSR6
2427	depends on MIPS_FP_SUPPORT
2428	default y
2429	help
2430	  Choose this option if you want to run non-R6 MIPS userland code.
2431	  Even if you say 'Y' here, the emulator will still be disabled by
2432	  default. You can enable it using the 'mipsr2emu' kernel option.
2433	  The only reason this is a build-time option is to save ~14K from the
2434	  final kernel image.
2435
2436config SYS_SUPPORTS_VPE_LOADER
2437	bool
2438	depends on SYS_SUPPORTS_MULTITHREADING
2439	help
2440	  Indicates that the platform supports the VPE loader, and provides
2441	  physical_memsize.
2442
2443config MIPS_VPE_LOADER
2444	bool "VPE loader support."
2445	depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2446	select CPU_MIPSR2_IRQ_VI
2447	select CPU_MIPSR2_IRQ_EI
2448	select MIPS_MT
2449	help
2450	  Includes a loader for loading an elf relocatable object
2451	  onto another VPE and running it.
2452
2453config MIPS_VPE_LOADER_CMP
2454	bool
2455	default "y"
2456	depends on MIPS_VPE_LOADER && MIPS_CMP
2457
2458config MIPS_VPE_LOADER_MT
2459	bool
2460	default "y"
2461	depends on MIPS_VPE_LOADER && !MIPS_CMP
2462
2463config MIPS_VPE_LOADER_TOM
2464	bool "Load VPE program into memory hidden from linux"
2465	depends on MIPS_VPE_LOADER
2466	default y
2467	help
2468	  The loader can use memory that is present but has been hidden from
2469	  Linux using the kernel command line option "mem=xxMB". It's up to
2470	  you to ensure the amount you put in the option and the space your
2471	  program requires is less or equal to the amount physically present.
2472
2473config MIPS_VPE_APSP_API
2474	bool "Enable support for AP/SP API (RTLX)"
2475	depends on MIPS_VPE_LOADER
2476
2477config MIPS_VPE_APSP_API_CMP
2478	bool
2479	default "y"
2480	depends on MIPS_VPE_APSP_API && MIPS_CMP
2481
2482config MIPS_VPE_APSP_API_MT
2483	bool
2484	default "y"
2485	depends on MIPS_VPE_APSP_API && !MIPS_CMP
2486
2487config MIPS_CMP
2488	bool "MIPS CMP framework support (DEPRECATED)"
2489	depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2490	select SMP
2491	select SYNC_R4K
2492	select SYS_SUPPORTS_SMP
2493	select WEAK_ORDERING
2494	default n
2495	help
2496	  Select this if you are using a bootloader which implements the "CMP
2497	  framework" protocol (ie. YAMON) and want your kernel to make use of
2498	  its ability to start secondary CPUs.
2499
2500	  Unless you have a specific need, you should use CONFIG_MIPS_CPS
2501	  instead of this.
2502
2503config MIPS_CPS
2504	bool "MIPS Coherent Processing System support"
2505	depends on SYS_SUPPORTS_MIPS_CPS
2506	select MIPS_CM
2507	select MIPS_CPS_PM if HOTPLUG_CPU
2508	select SMP
2509	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2510	select SYS_SUPPORTS_HOTPLUG_CPU
2511	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2512	select SYS_SUPPORTS_SMP
2513	select WEAK_ORDERING
2514	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2515	help
2516	  Select this if you wish to run an SMP kernel across multiple cores
2517	  within a MIPS Coherent Processing System. When this option is
2518	  enabled the kernel will probe for other cores and boot them with
2519	  no external assistance. It is safe to enable this when hardware
2520	  support is unavailable.
2521
2522config MIPS_CPS_PM
2523	depends on MIPS_CPS
2524	bool
2525
2526config MIPS_CM
2527	bool
2528	select MIPS_CPC
2529
2530config MIPS_CPC
2531	bool
2532
2533config SB1_PASS_2_WORKAROUNDS
2534	bool
2535	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2536	default y
2537
2538config SB1_PASS_2_1_WORKAROUNDS
2539	bool
2540	depends on CPU_SB1 && CPU_SB1_PASS_2
2541	default y
2542
2543choice
2544	prompt "SmartMIPS or microMIPS ASE support"
2545
2546config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2547	bool "None"
2548	help
2549	  Select this if you want neither microMIPS nor SmartMIPS support
2550
2551config CPU_HAS_SMARTMIPS
2552	depends on SYS_SUPPORTS_SMARTMIPS
2553	bool "SmartMIPS"
2554	help
2555	  SmartMIPS is a extension of the MIPS32 architecture aimed at
2556	  increased security at both hardware and software level for
2557	  smartcards.  Enabling this option will allow proper use of the
2558	  SmartMIPS instructions by Linux applications.  However a kernel with
2559	  this option will not work on a MIPS core without SmartMIPS core.  If
2560	  you don't know you probably don't have SmartMIPS and should say N
2561	  here.
2562
2563config CPU_MICROMIPS
2564	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2565	bool "microMIPS"
2566	help
2567	  When this option is enabled the kernel will be built using the
2568	  microMIPS ISA
2569
2570endchoice
2571
2572config CPU_HAS_MSA
2573	bool "Support for the MIPS SIMD Architecture"
2574	depends on CPU_SUPPORTS_MSA
2575	depends on MIPS_FP_SUPPORT
2576	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2577	help
2578	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2579	  and a set of SIMD instructions to operate on them. When this option
2580	  is enabled the kernel will support allocating & switching MSA
2581	  vector register contexts. If you know that your kernel will only be
2582	  running on CPUs which do not support MSA or that your userland will
2583	  not be making use of it then you may wish to say N here to reduce
2584	  the size & complexity of your kernel.
2585
2586	  If unsure, say Y.
2587
2588config CPU_HAS_WB
2589	bool
2590
2591config XKS01
2592	bool
2593
2594config CPU_HAS_DIEI
2595	depends on !CPU_DIEI_BROKEN
2596	bool
2597
2598config CPU_DIEI_BROKEN
2599	bool
2600
2601config CPU_HAS_RIXI
2602	bool
2603
2604config CPU_NO_LOAD_STORE_LR
2605	bool
2606	help
2607	  CPU lacks support for unaligned load and store instructions:
2608	  LWL, LWR, SWL, SWR (Load/store word left/right).
2609	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2610	  systems).
2611
2612#
2613# Vectored interrupt mode is an R2 feature
2614#
2615config CPU_MIPSR2_IRQ_VI
2616	bool
2617
2618#
2619# Extended interrupt mode is an R2 feature
2620#
2621config CPU_MIPSR2_IRQ_EI
2622	bool
2623
2624config CPU_HAS_SYNC
2625	bool
2626	depends on !CPU_R3000
2627	default y
2628
2629#
2630# CPU non-features
2631#
2632config CPU_DADDI_WORKAROUNDS
2633	bool
2634
2635config CPU_R4000_WORKAROUNDS
2636	bool
2637	select CPU_R4400_WORKAROUNDS
2638
2639config CPU_R4400_WORKAROUNDS
2640	bool
2641
2642config CPU_R4X00_BUGS64
2643	bool
2644	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2645
2646config MIPS_ASID_SHIFT
2647	int
2648	default 6 if CPU_R3000 || CPU_TX39XX
2649	default 0
2650
2651config MIPS_ASID_BITS
2652	int
2653	default 0 if MIPS_ASID_BITS_VARIABLE
2654	default 6 if CPU_R3000 || CPU_TX39XX
2655	default 8
2656
2657config MIPS_ASID_BITS_VARIABLE
2658	bool
2659
2660config MIPS_CRC_SUPPORT
2661	bool
2662
2663# R4600 erratum.  Due to the lack of errata information the exact
2664# technical details aren't known.  I've experimentally found that disabling
2665# interrupts during indexed I-cache flushes seems to be sufficient to deal
2666# with the issue.
2667config WAR_R4600_V1_INDEX_ICACHEOP
2668	bool
2669
2670# Pleasures of the R4600 V1.x.  Cite from the IDT R4600 V1.7 errata:
2671#
2672#  18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2673#      Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2674#      executed if there is no other dcache activity. If the dcache is
2675#      accessed for another instruction immediately preceding when these
2676#      cache instructions are executing, it is possible that the dcache
2677#      tag match outputs used by these cache instructions will be
2678#      incorrect. These cache instructions should be preceded by at least
2679#      four instructions that are not any kind of load or store
2680#      instruction.
2681#
2682#      This is not allowed:    lw
2683#                              nop
2684#                              nop
2685#                              nop
2686#                              cache       Hit_Writeback_Invalidate_D
2687#
2688#      This is allowed:        lw
2689#                              nop
2690#                              nop
2691#                              nop
2692#                              nop
2693#                              cache       Hit_Writeback_Invalidate_D
2694config WAR_R4600_V1_HIT_CACHEOP
2695	bool
2696
2697# Writeback and invalidate the primary cache dcache before DMA.
2698#
2699# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2700# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2701# operate correctly if the internal data cache refill buffer is empty.  These
2702# CACHE instructions should be separated from any potential data cache miss
2703# by a load instruction to an uncached address to empty the response buffer."
2704# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2705# in .pdf format.)
2706config WAR_R4600_V2_HIT_CACHEOP
2707	bool
2708
2709# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2710# the line which this instruction itself exists, the following
2711# operation is not guaranteed."
2712#
2713# Workaround: do two phase flushing for Index_Invalidate_I
2714config WAR_TX49XX_ICACHE_INDEX_INV
2715	bool
2716
2717# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2718# opposes it being called that) where invalid instructions in the same
2719# I-cache line worth of instructions being fetched may case spurious
2720# exceptions.
2721config WAR_ICACHE_REFILLS
2722	bool
2723
2724# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2725# may cause ll / sc and lld / scd sequences to execute non-atomically.
2726config WAR_R10000_LLSC
2727	bool
2728
2729# 34K core erratum: "Problems Executing the TLBR Instruction"
2730config WAR_MIPS34K_MISSED_ITLB
2731	bool
2732
2733#
2734# - Highmem only makes sense for the 32-bit kernel.
2735# - The current highmem code will only work properly on physically indexed
2736#   caches such as R3000, SB1, R7000 or those that look like they're virtually
2737#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
2738#   moment we protect the user and offer the highmem option only on machines
2739#   where it's known to be safe.  This will not offer highmem on a few systems
2740#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2741#   indexed CPUs but we're playing safe.
2742# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2743#   know they might have memory configurations that could make use of highmem
2744#   support.
2745#
2746config HIGHMEM
2747	bool "High Memory Support"
2748	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2749	select KMAP_LOCAL
2750
2751config CPU_SUPPORTS_HIGHMEM
2752	bool
2753
2754config SYS_SUPPORTS_HIGHMEM
2755	bool
2756
2757config SYS_SUPPORTS_SMARTMIPS
2758	bool
2759
2760config SYS_SUPPORTS_MICROMIPS
2761	bool
2762
2763config SYS_SUPPORTS_MIPS16
2764	bool
2765	help
2766	  This option must be set if a kernel might be executed on a MIPS16-
2767	  enabled CPU even if MIPS16 is not actually being used.  In other
2768	  words, it makes the kernel MIPS16-tolerant.
2769
2770config CPU_SUPPORTS_MSA
2771	bool
2772
2773config ARCH_FLATMEM_ENABLE
2774	def_bool y
2775	depends on !NUMA && !CPU_LOONGSON2EF
2776
2777config ARCH_SPARSEMEM_ENABLE
2778	bool
2779	select SPARSEMEM_STATIC if !SGI_IP27
2780
2781config NUMA
2782	bool "NUMA Support"
2783	depends on SYS_SUPPORTS_NUMA
2784	select SMP
2785	help
2786	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2787	  Access).  This option improves performance on systems with more
2788	  than two nodes; on two node systems it is generally better to
2789	  leave it disabled; on single node systems leave this option
2790	  disabled.
2791
2792config SYS_SUPPORTS_NUMA
2793	bool
2794
2795config HAVE_SETUP_PER_CPU_AREA
2796	def_bool y
2797	depends on NUMA
2798
2799config NEED_PER_CPU_EMBED_FIRST_CHUNK
2800	def_bool y
2801	depends on NUMA
2802
2803config RELOCATABLE
2804	bool "Relocatable kernel"
2805	depends on SYS_SUPPORTS_RELOCATABLE
2806	depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2807		   CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2808		   CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2809		   CPU_P5600 || CAVIUM_OCTEON_SOC || \
2810		   CPU_LOONGSON64
2811	help
2812	  This builds a kernel image that retains relocation information
2813	  so it can be loaded someplace besides the default 1MB.
2814	  The relocations make the kernel binary about 15% larger,
2815	  but are discarded at runtime
2816
2817config RELOCATION_TABLE_SIZE
2818	hex "Relocation table size"
2819	depends on RELOCATABLE
2820	range 0x0 0x01000000
2821	default "0x00200000" if CPU_LOONGSON64
2822	default "0x00100000"
2823	help
2824	  A table of relocation data will be appended to the kernel binary
2825	  and parsed at boot to fix up the relocated kernel.
2826
2827	  This option allows the amount of space reserved for the table to be
2828	  adjusted, although the default of 1Mb should be ok in most cases.
2829
2830	  The build will fail and a valid size suggested if this is too small.
2831
2832	  If unsure, leave at the default value.
2833
2834config RANDOMIZE_BASE
2835	bool "Randomize the address of the kernel image"
2836	depends on RELOCATABLE
2837	help
2838	  Randomizes the physical and virtual address at which the
2839	  kernel image is loaded, as a security feature that
2840	  deters exploit attempts relying on knowledge of the location
2841	  of kernel internals.
2842
2843	  Entropy is generated using any coprocessor 0 registers available.
2844
2845	  The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2846
2847	  If unsure, say N.
2848
2849config RANDOMIZE_BASE_MAX_OFFSET
2850	hex "Maximum kASLR offset" if EXPERT
2851	depends on RANDOMIZE_BASE
2852	range 0x0 0x40000000 if EVA || 64BIT
2853	range 0x0 0x08000000
2854	default "0x01000000"
2855	help
2856	  When kASLR is active, this provides the maximum offset that will
2857	  be applied to the kernel image. It should be set according to the
2858	  amount of physical RAM available in the target system minus
2859	  PHYSICAL_START and must be a power of 2.
2860
2861	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2862	  EVA or 64-bit. The default is 16Mb.
2863
2864config NODES_SHIFT
2865	int
2866	default "6"
2867	depends on NUMA
2868
2869config HW_PERF_EVENTS
2870	bool "Enable hardware performance counter support for perf events"
2871	depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2872	default y
2873	help
2874	  Enable hardware performance counter support for perf events. If
2875	  disabled, perf events will use software events only.
2876
2877config DMI
2878	bool "Enable DMI scanning"
2879	depends on MACH_LOONGSON64
2880	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2881	default y
2882	help
2883	  Enabled scanning of DMI to identify machine quirks. Say Y
2884	  here unless you have verified that your setup is not
2885	  affected by entries in the DMI blacklist. Required by PNP
2886	  BIOS code.
2887
2888config SMP
2889	bool "Multi-Processing support"
2890	depends on SYS_SUPPORTS_SMP
2891	help
2892	  This enables support for systems with more than one CPU. If you have
2893	  a system with only one CPU, say N. If you have a system with more
2894	  than one CPU, say Y.
2895
2896	  If you say N here, the kernel will run on uni- and multiprocessor
2897	  machines, but will use only one CPU of a multiprocessor machine. If
2898	  you say Y here, the kernel will run on many, but not all,
2899	  uniprocessor machines. On a uniprocessor machine, the kernel
2900	  will run faster if you say N here.
2901
2902	  People using multiprocessor machines who say Y here should also say
2903	  Y to "Enhanced Real Time Clock Support", below.
2904
2905	  See also the SMP-HOWTO available at
2906	  <https://www.tldp.org/docs.html#howto>.
2907
2908	  If you don't know what to do here, say N.
2909
2910config HOTPLUG_CPU
2911	bool "Support for hot-pluggable CPUs"
2912	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2913	help
2914	  Say Y here to allow turning CPUs off and on. CPUs can be
2915	  controlled through /sys/devices/system/cpu.
2916	  (Note: power management support will enable this option
2917	    automatically on SMP systems. )
2918	  Say N if you want to disable CPU hotplug.
2919
2920config SMP_UP
2921	bool
2922
2923config SYS_SUPPORTS_MIPS_CMP
2924	bool
2925
2926config SYS_SUPPORTS_MIPS_CPS
2927	bool
2928
2929config SYS_SUPPORTS_SMP
2930	bool
2931
2932config NR_CPUS_DEFAULT_4
2933	bool
2934
2935config NR_CPUS_DEFAULT_8
2936	bool
2937
2938config NR_CPUS_DEFAULT_16
2939	bool
2940
2941config NR_CPUS_DEFAULT_32
2942	bool
2943
2944config NR_CPUS_DEFAULT_64
2945	bool
2946
2947config NR_CPUS
2948	int "Maximum number of CPUs (2-256)"
2949	range 2 256
2950	depends on SMP
2951	default "4" if NR_CPUS_DEFAULT_4
2952	default "8" if NR_CPUS_DEFAULT_8
2953	default "16" if NR_CPUS_DEFAULT_16
2954	default "32" if NR_CPUS_DEFAULT_32
2955	default "64" if NR_CPUS_DEFAULT_64
2956	help
2957	  This allows you to specify the maximum number of CPUs which this
2958	  kernel will support.  The maximum supported value is 32 for 32-bit
2959	  kernel and 64 for 64-bit kernels; the minimum value which makes
2960	  sense is 1 for Qemu (useful only for kernel debugging purposes)
2961	  and 2 for all others.
2962
2963	  This is purely to save memory - each supported CPU adds
2964	  approximately eight kilobytes to the kernel image.  For best
2965	  performance should round up your number of processors to the next
2966	  power of two.
2967
2968config MIPS_PERF_SHARED_TC_COUNTERS
2969	bool
2970
2971config MIPS_NR_CPU_NR_MAP_1024
2972	bool
2973
2974config MIPS_NR_CPU_NR_MAP
2975	int
2976	depends on SMP
2977	default 1024 if MIPS_NR_CPU_NR_MAP_1024
2978	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2979
2980#
2981# Timer Interrupt Frequency Configuration
2982#
2983
2984choice
2985	prompt "Timer frequency"
2986	default HZ_250
2987	help
2988	  Allows the configuration of the timer frequency.
2989
2990	config HZ_24
2991		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2992
2993	config HZ_48
2994		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2995
2996	config HZ_100
2997		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2998
2999	config HZ_128
3000		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
3001
3002	config HZ_250
3003		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
3004
3005	config HZ_256
3006		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
3007
3008	config HZ_1000
3009		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
3010
3011	config HZ_1024
3012		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
3013
3014endchoice
3015
3016config SYS_SUPPORTS_24HZ
3017	bool
3018
3019config SYS_SUPPORTS_48HZ
3020	bool
3021
3022config SYS_SUPPORTS_100HZ
3023	bool
3024
3025config SYS_SUPPORTS_128HZ
3026	bool
3027
3028config SYS_SUPPORTS_250HZ
3029	bool
3030
3031config SYS_SUPPORTS_256HZ
3032	bool
3033
3034config SYS_SUPPORTS_1000HZ
3035	bool
3036
3037config SYS_SUPPORTS_1024HZ
3038	bool
3039
3040config SYS_SUPPORTS_ARBIT_HZ
3041	bool
3042	default y if !SYS_SUPPORTS_24HZ && \
3043		     !SYS_SUPPORTS_48HZ && \
3044		     !SYS_SUPPORTS_100HZ && \
3045		     !SYS_SUPPORTS_128HZ && \
3046		     !SYS_SUPPORTS_250HZ && \
3047		     !SYS_SUPPORTS_256HZ && \
3048		     !SYS_SUPPORTS_1000HZ && \
3049		     !SYS_SUPPORTS_1024HZ
3050
3051config HZ
3052	int
3053	default 24 if HZ_24
3054	default 48 if HZ_48
3055	default 100 if HZ_100
3056	default 128 if HZ_128
3057	default 250 if HZ_250
3058	default 256 if HZ_256
3059	default 1000 if HZ_1000
3060	default 1024 if HZ_1024
3061
3062config SCHED_HRTICK
3063	def_bool HIGH_RES_TIMERS
3064
3065config KEXEC
3066	bool "Kexec system call"
3067	select KEXEC_CORE
3068	help
3069	  kexec is a system call that implements the ability to shutdown your
3070	  current kernel, and to start another kernel.  It is like a reboot
3071	  but it is independent of the system firmware.   And like a reboot
3072	  you can start any kernel with it, not just Linux.
3073
3074	  The name comes from the similarity to the exec system call.
3075
3076	  It is an ongoing process to be certain the hardware in a machine
3077	  is properly shutdown, so do not be surprised if this code does not
3078	  initially work for you.  As of this writing the exact hardware
3079	  interface is strongly in flux, so no good recommendation can be
3080	  made.
3081
3082config CRASH_DUMP
3083	bool "Kernel crash dumps"
3084	help
3085	  Generate crash dump after being started by kexec.
3086	  This should be normally only set in special crash dump kernels
3087	  which are loaded in the main kernel with kexec-tools into
3088	  a specially reserved region and then later executed after
3089	  a crash by kdump/kexec. The crash dump kernel must be compiled
3090	  to a memory address not used by the main kernel or firmware using
3091	  PHYSICAL_START.
3092
3093config PHYSICAL_START
3094	hex "Physical address where the kernel is loaded"
3095	default "0xffffffff84000000"
3096	depends on CRASH_DUMP
3097	help
3098	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3099	  If you plan to use kernel for capturing the crash dump change
3100	  this value to start of the reserved region (the "X" value as
3101	  specified in the "crashkernel=YM@XM" command line boot parameter
3102	  passed to the panic-ed kernel).
3103
3104config MIPS_O32_FP64_SUPPORT
3105	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3106	depends on 32BIT || MIPS32_O32
3107	help
3108	  When this is enabled, the kernel will support use of 64-bit floating
3109	  point registers with binaries using the O32 ABI along with the
3110	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3111	  32-bit MIPS systems this support is at the cost of increasing the
3112	  size and complexity of the compiled FPU emulator. Thus if you are
3113	  running a MIPS32 system and know that none of your userland binaries
3114	  will require 64-bit floating point, you may wish to reduce the size
3115	  of your kernel & potentially improve FP emulation performance by
3116	  saying N here.
3117
3118	  Although binutils currently supports use of this flag the details
3119	  concerning its effect upon the O32 ABI in userland are still being
3120	  worked on. In order to avoid userland becoming dependent upon current
3121	  behaviour before the details have been finalised, this option should
3122	  be considered experimental and only enabled by those working upon
3123	  said details.
3124
3125	  If unsure, say N.
3126
3127config USE_OF
3128	bool
3129	select OF
3130	select OF_EARLY_FLATTREE
3131	select IRQ_DOMAIN
3132
3133config UHI_BOOT
3134	bool
3135
3136config BUILTIN_DTB
3137	bool
3138
3139choice
3140	prompt "Kernel appended dtb support" if USE_OF
3141	default MIPS_NO_APPENDED_DTB
3142
3143	config MIPS_NO_APPENDED_DTB
3144		bool "None"
3145		help
3146		  Do not enable appended dtb support.
3147
3148	config MIPS_ELF_APPENDED_DTB
3149		bool "vmlinux"
3150		help
3151		  With this option, the boot code will look for a device tree binary
3152		  DTB) included in the vmlinux ELF section .appended_dtb. By default
3153		  it is empty and the DTB can be appended using binutils command
3154		  objcopy:
3155
3156		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3157
3158		  This is meant as a backward compatibility convenience for those
3159		  systems with a bootloader that can't be upgraded to accommodate
3160		  the documented boot protocol using a device tree.
3161
3162	config MIPS_RAW_APPENDED_DTB
3163		bool "vmlinux.bin or vmlinuz.bin"
3164		help
3165		  With this option, the boot code will look for a device tree binary
3166		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3167		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3168
3169		  This is meant as a backward compatibility convenience for those
3170		  systems with a bootloader that can't be upgraded to accommodate
3171		  the documented boot protocol using a device tree.
3172
3173		  Beware that there is very little in terms of protection against
3174		  this option being confused by leftover garbage in memory that might
3175		  look like a DTB header after a reboot if no actual DTB is appended
3176		  to vmlinux.bin.  Do not leave this option active in a production kernel
3177		  if you don't intend to always append a DTB.
3178endchoice
3179
3180choice
3181	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3182	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3183					 !MACH_LOONGSON64 && !MIPS_MALTA && \
3184					 !CAVIUM_OCTEON_SOC
3185	default MIPS_CMDLINE_FROM_BOOTLOADER
3186
3187	config MIPS_CMDLINE_FROM_DTB
3188		depends on USE_OF
3189		bool "Dtb kernel arguments if available"
3190
3191	config MIPS_CMDLINE_DTB_EXTEND
3192		depends on USE_OF
3193		bool "Extend dtb kernel arguments with bootloader arguments"
3194
3195	config MIPS_CMDLINE_FROM_BOOTLOADER
3196		bool "Bootloader kernel arguments if available"
3197
3198	config MIPS_CMDLINE_BUILTIN_EXTEND
3199		depends on CMDLINE_BOOL
3200		bool "Extend builtin kernel arguments with bootloader arguments"
3201endchoice
3202
3203endmenu
3204
3205config LOCKDEP_SUPPORT
3206	bool
3207	default y
3208
3209config STACKTRACE_SUPPORT
3210	bool
3211	default y
3212
3213config PGTABLE_LEVELS
3214	int
3215	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3216	default 3 if 64BIT && !PAGE_SIZE_64KB
3217	default 2
3218
3219config MIPS_AUTO_PFN_OFFSET
3220	bool
3221
3222menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3223
3224config PCI_DRIVERS_GENERIC
3225	select PCI_DOMAINS_GENERIC if PCI
3226	bool
3227
3228config PCI_DRIVERS_LEGACY
3229	def_bool !PCI_DRIVERS_GENERIC
3230	select NO_GENERIC_PCI_IOPORT_MAP
3231	select PCI_DOMAINS if PCI
3232
3233#
3234# ISA support is now enabled via select.  Too many systems still have the one
3235# or other ISA chip on the board that users don't know about so don't expect
3236# users to choose the right thing ...
3237#
3238config ISA
3239	bool
3240
3241config TC
3242	bool "TURBOchannel support"
3243	depends on MACH_DECSTATION
3244	help
3245	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3246	  processors.  TURBOchannel programming specifications are available
3247	  at:
3248	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3249	  and:
3250	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3251	  Linux driver support status is documented at:
3252	  <http://www.linux-mips.org/wiki/DECstation>
3253
3254config MMU
3255	bool
3256	default y
3257
3258config ARCH_MMAP_RND_BITS_MIN
3259	default 12 if 64BIT
3260	default 8
3261
3262config ARCH_MMAP_RND_BITS_MAX
3263	default 18 if 64BIT
3264	default 15
3265
3266config ARCH_MMAP_RND_COMPAT_BITS_MIN
3267	default 8
3268
3269config ARCH_MMAP_RND_COMPAT_BITS_MAX
3270	default 15
3271
3272config I8253
3273	bool
3274	select CLKSRC_I8253
3275	select CLKEVT_I8253
3276	select MIPS_EXTERNAL_TIMER
3277endmenu
3278
3279config TRAD_SIGNALS
3280	bool
3281
3282config MIPS32_COMPAT
3283	bool
3284
3285config COMPAT
3286	bool
3287
3288config SYSVIPC_COMPAT
3289	bool
3290
3291config MIPS32_O32
3292	bool "Kernel support for o32 binaries"
3293	depends on 64BIT
3294	select ARCH_WANT_OLD_COMPAT_IPC
3295	select COMPAT
3296	select MIPS32_COMPAT
3297	select SYSVIPC_COMPAT if SYSVIPC
3298	help
3299	  Select this option if you want to run o32 binaries.  These are pure
3300	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
3301	  existing binaries are in this format.
3302
3303	  If unsure, say Y.
3304
3305config MIPS32_N32
3306	bool "Kernel support for n32 binaries"
3307	depends on 64BIT
3308	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3309	select COMPAT
3310	select MIPS32_COMPAT
3311	select SYSVIPC_COMPAT if SYSVIPC
3312	help
3313	  Select this option if you want to run n32 binaries.  These are
3314	  64-bit binaries using 32-bit quantities for addressing and certain
3315	  data that would normally be 64-bit.  They are used in special
3316	  cases.
3317
3318	  If unsure, say N.
3319
3320menu "Power management options"
3321
3322config ARCH_HIBERNATION_POSSIBLE
3323	def_bool y
3324	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3325
3326config ARCH_SUSPEND_POSSIBLE
3327	def_bool y
3328	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3329
3330source "kernel/power/Kconfig"
3331
3332endmenu
3333
3334config MIPS_EXTERNAL_TIMER
3335	bool
3336
3337menu "CPU Power Management"
3338
3339if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3340source "drivers/cpufreq/Kconfig"
3341endif
3342
3343source "drivers/cpuidle/Kconfig"
3344
3345endmenu
3346
3347source "drivers/firmware/Kconfig"
3348
3349source "arch/mips/kvm/Kconfig"
3350
3351source "arch/mips/vdso/Kconfig"
3352