1# SPDX-License-Identifier: GPL-2.0 2config MIPS 3 bool 4 default y 5 select ARCH_32BIT_OFF_T if !64BIT 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT 7 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000 8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT 9 select ARCH_HAS_FORTIFY_SOURCE 10 select ARCH_HAS_KCOV 11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA 12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI) 13 select ARCH_HAS_STRNCPY_FROM_USER 14 select ARCH_HAS_STRNLEN_USER 15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 16 select ARCH_HAS_UBSAN_SANITIZE_ALL 17 select ARCH_HAS_GCOV_PROFILE_ALL 18 select ARCH_KEEP_MEMBLOCK 19 select ARCH_SUPPORTS_UPROBES 20 select ARCH_USE_BUILTIN_BSWAP 21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 22 select ARCH_USE_MEMTEST 23 select ARCH_USE_QUEUED_RWLOCKS 24 select ARCH_USE_QUEUED_SPINLOCKS 25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES 26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 27 select ARCH_WANT_IPC_PARSE_VERSION 28 select ARCH_WANT_LD_ORPHAN_WARN 29 select BUILDTIME_TABLE_SORT 30 select CLONE_BACKWARDS 31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) 32 select CPU_PM if CPU_IDLE 33 select GENERIC_ATOMIC64 if !64BIT 34 select GENERIC_CMOS_UPDATE 35 select GENERIC_CPU_AUTOPROBE 36 select GENERIC_GETTIMEOFDAY 37 select GENERIC_IOMAP 38 select GENERIC_IRQ_PROBE 39 select GENERIC_IRQ_SHOW 40 select GENERIC_ISA_DMA if EISA 41 select GENERIC_LIB_ASHLDI3 42 select GENERIC_LIB_ASHRDI3 43 select GENERIC_LIB_CMPDI2 44 select GENERIC_LIB_LSHRDI3 45 select GENERIC_LIB_UCMPDI2 46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC 47 select GENERIC_SMP_IDLE_THREAD 48 select GENERIC_TIME_VSYSCALL 49 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT 50 select HAVE_ARCH_COMPILER_H 51 select HAVE_ARCH_JUMP_LABEL 52 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT 53 select HAVE_ARCH_MMAP_RND_BITS if MMU 54 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT 55 select HAVE_ARCH_SECCOMP_FILTER 56 select HAVE_ARCH_TRACEHOOK 57 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES 58 select HAVE_ASM_MODVERSIONS 59 select HAVE_CONTEXT_TRACKING_USER 60 select HAVE_TIF_NOHZ 61 select HAVE_C_RECORDMCOUNT 62 select HAVE_DEBUG_KMEMLEAK 63 select HAVE_DEBUG_STACKOVERFLOW 64 select HAVE_DMA_CONTIGUOUS 65 select HAVE_DYNAMIC_FTRACE 66 select HAVE_EBPF_JIT if !CPU_MICROMIPS 67 select HAVE_EXIT_THREAD 68 select HAVE_FAST_GUP 69 select HAVE_FTRACE_MCOUNT_RECORD 70 select HAVE_FUNCTION_GRAPH_TRACER 71 select HAVE_FUNCTION_TRACER 72 select HAVE_GCC_PLUGINS 73 select HAVE_GENERIC_VDSO 74 select HAVE_IOREMAP_PROT 75 select HAVE_IRQ_EXIT_ON_IRQ_STACK 76 select HAVE_IRQ_TIME_ACCOUNTING 77 select HAVE_KPROBES 78 select HAVE_KRETPROBES 79 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION 80 select HAVE_MOD_ARCH_SPECIFIC 81 select HAVE_NMI 82 select HAVE_PERF_EVENTS 83 select HAVE_PERF_REGS 84 select HAVE_PERF_USER_STACK_DUMP 85 select HAVE_REGS_AND_STACK_ACCESS_API 86 select HAVE_RSEQ 87 select HAVE_SPARSE_SYSCALL_NR 88 select HAVE_STACKPROTECTOR 89 select HAVE_SYSCALL_TRACEPOINTS 90 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP 91 select IRQ_FORCED_THREADING 92 select ISA if EISA 93 select MODULES_USE_ELF_REL if MODULES 94 select MODULES_USE_ELF_RELA if MODULES && 64BIT 95 select PERF_USE_VMALLOC 96 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI 97 select RTC_LIB 98 select SYSCTL_EXCEPTION_TRACE 99 select TRACE_IRQFLAGS_SUPPORT 100 select ARCH_HAS_ELFCORE_COMPAT 101 select HAVE_ARCH_KCSAN if 64BIT 102 103config MIPS_FIXUP_BIGPHYS_ADDR 104 bool 105 106config MIPS_GENERIC 107 bool 108 109config MACH_INGENIC 110 bool 111 select SYS_SUPPORTS_32BIT_KERNEL 112 select SYS_SUPPORTS_LITTLE_ENDIAN 113 select SYS_SUPPORTS_ZBOOT 114 select DMA_NONCOHERENT 115 select ARCH_HAS_SYNC_DMA_FOR_CPU 116 select IRQ_MIPS_CPU 117 select PINCTRL 118 select GPIOLIB 119 select COMMON_CLK 120 select GENERIC_IRQ_CHIP 121 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB 122 select USE_OF 123 select CPU_SUPPORTS_CPUFREQ 124 select MIPS_EXTERNAL_TIMER 125 126menu "Machine selection" 127 128choice 129 prompt "System type" 130 default MIPS_GENERIC_KERNEL 131 132config MIPS_GENERIC_KERNEL 133 bool "Generic board-agnostic MIPS kernel" 134 select ARCH_HAS_SETUP_DMA_OPS 135 select MIPS_GENERIC 136 select BOOT_RAW 137 select BUILTIN_DTB 138 select CEVT_R4K 139 select CLKSRC_MIPS_GIC 140 select COMMON_CLK 141 select CPU_MIPSR2_IRQ_EI 142 select CPU_MIPSR2_IRQ_VI 143 select CSRC_R4K 144 select DMA_NONCOHERENT 145 select HAVE_PCI 146 select IRQ_MIPS_CPU 147 select MIPS_AUTO_PFN_OFFSET 148 select MIPS_CPU_SCACHE 149 select MIPS_GIC 150 select MIPS_L1_CACHE_SHIFT_7 151 select NO_EXCEPT_FILL 152 select PCI_DRIVERS_GENERIC 153 select SMP_UP if SMP 154 select SWAP_IO_SPACE 155 select SYS_HAS_CPU_MIPS32_R1 156 select SYS_HAS_CPU_MIPS32_R2 157 select SYS_HAS_CPU_MIPS32_R6 158 select SYS_HAS_CPU_MIPS64_R1 159 select SYS_HAS_CPU_MIPS64_R2 160 select SYS_HAS_CPU_MIPS64_R6 161 select SYS_SUPPORTS_32BIT_KERNEL 162 select SYS_SUPPORTS_64BIT_KERNEL 163 select SYS_SUPPORTS_BIG_ENDIAN 164 select SYS_SUPPORTS_HIGHMEM 165 select SYS_SUPPORTS_LITTLE_ENDIAN 166 select SYS_SUPPORTS_MICROMIPS 167 select SYS_SUPPORTS_MIPS16 168 select SYS_SUPPORTS_MIPS_CPS 169 select SYS_SUPPORTS_MULTITHREADING 170 select SYS_SUPPORTS_RELOCATABLE 171 select SYS_SUPPORTS_SMARTMIPS 172 select SYS_SUPPORTS_ZBOOT 173 select UHI_BOOT 174 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 175 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 176 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 177 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 178 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 179 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 180 select USE_OF 181 help 182 Select this to build a kernel which aims to support multiple boards, 183 generally using a flattened device tree passed from the bootloader 184 using the boot protocol defined in the UHI (Unified Hosting 185 Interface) specification. 186 187config MIPS_ALCHEMY 188 bool "Alchemy processor based machines" 189 select PHYS_ADDR_T_64BIT 190 select CEVT_R4K 191 select CSRC_R4K 192 select IRQ_MIPS_CPU 193 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is 194 select MIPS_FIXUP_BIGPHYS_ADDR if PCI 195 select SYS_HAS_CPU_MIPS32_R1 196 select SYS_SUPPORTS_32BIT_KERNEL 197 select SYS_SUPPORTS_APM_EMULATION 198 select GPIOLIB 199 select SYS_SUPPORTS_ZBOOT 200 select COMMON_CLK 201 202config AR7 203 bool "Texas Instruments AR7" 204 select BOOT_ELF32 205 select COMMON_CLK 206 select DMA_NONCOHERENT 207 select CEVT_R4K 208 select CSRC_R4K 209 select IRQ_MIPS_CPU 210 select NO_EXCEPT_FILL 211 select SWAP_IO_SPACE 212 select SYS_HAS_CPU_MIPS32_R1 213 select SYS_HAS_EARLY_PRINTK 214 select SYS_SUPPORTS_32BIT_KERNEL 215 select SYS_SUPPORTS_LITTLE_ENDIAN 216 select SYS_SUPPORTS_MIPS16 217 select SYS_SUPPORTS_ZBOOT_UART16550 218 select GPIOLIB 219 select VLYNQ 220 help 221 Support for the Texas Instruments AR7 System-on-a-Chip 222 family: TNETD7100, 7200 and 7300. 223 224config ATH25 225 bool "Atheros AR231x/AR531x SoC support" 226 select CEVT_R4K 227 select CSRC_R4K 228 select DMA_NONCOHERENT 229 select IRQ_MIPS_CPU 230 select IRQ_DOMAIN 231 select SYS_HAS_CPU_MIPS32_R1 232 select SYS_SUPPORTS_BIG_ENDIAN 233 select SYS_SUPPORTS_32BIT_KERNEL 234 select SYS_HAS_EARLY_PRINTK 235 help 236 Support for Atheros AR231x and Atheros AR531x based boards 237 238config ATH79 239 bool "Atheros AR71XX/AR724X/AR913X based boards" 240 select ARCH_HAS_RESET_CONTROLLER 241 select BOOT_RAW 242 select CEVT_R4K 243 select CSRC_R4K 244 select DMA_NONCOHERENT 245 select GPIOLIB 246 select PINCTRL 247 select COMMON_CLK 248 select IRQ_MIPS_CPU 249 select SYS_HAS_CPU_MIPS32_R2 250 select SYS_HAS_EARLY_PRINTK 251 select SYS_SUPPORTS_32BIT_KERNEL 252 select SYS_SUPPORTS_BIG_ENDIAN 253 select SYS_SUPPORTS_MIPS16 254 select SYS_SUPPORTS_ZBOOT_UART_PROM 255 select USE_OF 256 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM 257 help 258 Support for the Atheros AR71XX/AR724X/AR913X SoCs. 259 260config BMIPS_GENERIC 261 bool "Broadcom Generic BMIPS kernel" 262 select ARCH_HAS_RESET_CONTROLLER 263 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL 264 select BOOT_RAW 265 select NO_EXCEPT_FILL 266 select USE_OF 267 select CEVT_R4K 268 select CSRC_R4K 269 select SYNC_R4K 270 select COMMON_CLK 271 select BCM6345_L1_IRQ 272 select BCM7038_L1_IRQ 273 select BCM7120_L2_IRQ 274 select BRCMSTB_L2_IRQ 275 select IRQ_MIPS_CPU 276 select DMA_NONCOHERENT 277 select SYS_SUPPORTS_32BIT_KERNEL 278 select SYS_SUPPORTS_LITTLE_ENDIAN 279 select SYS_SUPPORTS_BIG_ENDIAN 280 select SYS_SUPPORTS_HIGHMEM 281 select SYS_HAS_CPU_BMIPS32_3300 282 select SYS_HAS_CPU_BMIPS4350 283 select SYS_HAS_CPU_BMIPS4380 284 select SYS_HAS_CPU_BMIPS5000 285 select SWAP_IO_SPACE 286 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 287 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 288 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN 289 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 290 select HARDIRQS_SW_RESEND 291 select HAVE_PCI 292 select PCI_DRIVERS_GENERIC 293 select FW_CFE 294 help 295 Build a generic DT-based kernel image that boots on select 296 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top 297 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN 298 must be set appropriately for your board. 299 300config BCM47XX 301 bool "Broadcom BCM47XX based boards" 302 select BOOT_RAW 303 select CEVT_R4K 304 select CSRC_R4K 305 select DMA_NONCOHERENT 306 select HAVE_PCI 307 select IRQ_MIPS_CPU 308 select SYS_HAS_CPU_MIPS32_R1 309 select NO_EXCEPT_FILL 310 select SYS_SUPPORTS_32BIT_KERNEL 311 select SYS_SUPPORTS_LITTLE_ENDIAN 312 select SYS_SUPPORTS_MIPS16 313 select SYS_SUPPORTS_ZBOOT 314 select SYS_HAS_EARLY_PRINTK 315 select USE_GENERIC_EARLY_PRINTK_8250 316 select GPIOLIB 317 select LEDS_GPIO_REGISTER 318 select BCM47XX_NVRAM 319 select BCM47XX_SPROM 320 select BCM47XX_SSB if !BCM47XX_BCMA 321 help 322 Support for BCM47XX based boards 323 324config BCM63XX 325 bool "Broadcom BCM63XX based boards" 326 select BOOT_RAW 327 select CEVT_R4K 328 select CSRC_R4K 329 select SYNC_R4K 330 select DMA_NONCOHERENT 331 select IRQ_MIPS_CPU 332 select SYS_SUPPORTS_32BIT_KERNEL 333 select SYS_SUPPORTS_BIG_ENDIAN 334 select SYS_HAS_EARLY_PRINTK 335 select SYS_HAS_CPU_BMIPS32_3300 336 select SYS_HAS_CPU_BMIPS4350 337 select SYS_HAS_CPU_BMIPS4380 338 select SWAP_IO_SPACE 339 select GPIOLIB 340 select MIPS_L1_CACHE_SHIFT_4 341 select HAVE_LEGACY_CLK 342 help 343 Support for BCM63XX based boards 344 345config MIPS_COBALT 346 bool "Cobalt Server" 347 select CEVT_R4K 348 select CSRC_R4K 349 select CEVT_GT641XX 350 select DMA_NONCOHERENT 351 select FORCE_PCI 352 select I8253 353 select I8259 354 select IRQ_MIPS_CPU 355 select IRQ_GT641XX 356 select PCI_GT64XXX_PCI0 357 select SYS_HAS_CPU_NEVADA 358 select SYS_HAS_EARLY_PRINTK 359 select SYS_SUPPORTS_32BIT_KERNEL 360 select SYS_SUPPORTS_64BIT_KERNEL 361 select SYS_SUPPORTS_LITTLE_ENDIAN 362 select USE_GENERIC_EARLY_PRINTK_8250 363 364config MACH_DECSTATION 365 bool "DECstations" 366 select BOOT_ELF32 367 select CEVT_DS1287 368 select CEVT_R4K if CPU_R4X00 369 select CSRC_IOASIC 370 select CSRC_R4K if CPU_R4X00 371 select CPU_DADDI_WORKAROUNDS if 64BIT 372 select CPU_R4000_WORKAROUNDS if 64BIT 373 select CPU_R4400_WORKAROUNDS if 64BIT 374 select DMA_NONCOHERENT 375 select NO_IOPORT_MAP 376 select IRQ_MIPS_CPU 377 select SYS_HAS_CPU_R3000 378 select SYS_HAS_CPU_R4X00 379 select SYS_SUPPORTS_32BIT_KERNEL 380 select SYS_SUPPORTS_64BIT_KERNEL 381 select SYS_SUPPORTS_LITTLE_ENDIAN 382 select SYS_SUPPORTS_128HZ 383 select SYS_SUPPORTS_256HZ 384 select SYS_SUPPORTS_1024HZ 385 select MIPS_L1_CACHE_SHIFT_4 386 help 387 This enables support for DEC's MIPS based workstations. For details 388 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the 389 DECstation porting pages on <http://decstation.unix-ag.org/>. 390 391 If you have one of the following DECstation Models you definitely 392 want to choose R4xx0 for the CPU Type: 393 394 DECstation 5000/50 395 DECstation 5000/150 396 DECstation 5000/260 397 DECsystem 5900/260 398 399 otherwise choose R3000. 400 401config MACH_JAZZ 402 bool "Jazz family of machines" 403 select ARC_MEMORY 404 select ARC_PROMLIB 405 select ARCH_MIGHT_HAVE_PC_PARPORT 406 select ARCH_MIGHT_HAVE_PC_SERIO 407 select DMA_OPS 408 select FW_ARC 409 select FW_ARC32 410 select ARCH_MAY_HAVE_PC_FDC 411 select CEVT_R4K 412 select CSRC_R4K 413 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 414 select GENERIC_ISA_DMA 415 select HAVE_PCSPKR_PLATFORM 416 select IRQ_MIPS_CPU 417 select I8253 418 select I8259 419 select ISA 420 select SYS_HAS_CPU_R4X00 421 select SYS_SUPPORTS_32BIT_KERNEL 422 select SYS_SUPPORTS_64BIT_KERNEL 423 select SYS_SUPPORTS_100HZ 424 select SYS_SUPPORTS_LITTLE_ENDIAN 425 help 426 This a family of machines based on the MIPS R4030 chipset which was 427 used by several vendors to build RISC/os and Windows NT workstations. 428 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and 429 Olivetti M700-10 workstations. 430 431config MACH_INGENIC_SOC 432 bool "Ingenic SoC based machines" 433 select MIPS_GENERIC 434 select MACH_INGENIC 435 select SYS_SUPPORTS_ZBOOT_UART16550 436 select CPU_SUPPORTS_CPUFREQ 437 select MIPS_EXTERNAL_TIMER 438 439config LANTIQ 440 bool "Lantiq based platforms" 441 select DMA_NONCOHERENT 442 select IRQ_MIPS_CPU 443 select CEVT_R4K 444 select CSRC_R4K 445 select NO_EXCEPT_FILL 446 select SYS_HAS_CPU_MIPS32_R1 447 select SYS_HAS_CPU_MIPS32_R2 448 select SYS_SUPPORTS_BIG_ENDIAN 449 select SYS_SUPPORTS_32BIT_KERNEL 450 select SYS_SUPPORTS_MIPS16 451 select SYS_SUPPORTS_MULTITHREADING 452 select SYS_SUPPORTS_VPE_LOADER 453 select SYS_HAS_EARLY_PRINTK 454 select GPIOLIB 455 select SWAP_IO_SPACE 456 select BOOT_RAW 457 select HAVE_LEGACY_CLK 458 select USE_OF 459 select PINCTRL 460 select PINCTRL_LANTIQ 461 select ARCH_HAS_RESET_CONTROLLER 462 select RESET_CONTROLLER 463 464config MACH_LOONGSON32 465 bool "Loongson 32-bit family of machines" 466 select SYS_SUPPORTS_ZBOOT 467 help 468 This enables support for the Loongson-1 family of machines. 469 470 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by 471 the Institute of Computing Technology (ICT), Chinese Academy of 472 Sciences (CAS). 473 474config MACH_LOONGSON2EF 475 bool "Loongson-2E/F family of machines" 476 select SYS_SUPPORTS_ZBOOT 477 help 478 This enables the support of early Loongson-2E/F family of machines. 479 480config MACH_LOONGSON64 481 bool "Loongson 64-bit family of machines" 482 select ARCH_SPARSEMEM_ENABLE 483 select ARCH_MIGHT_HAVE_PC_PARPORT 484 select ARCH_MIGHT_HAVE_PC_SERIO 485 select GENERIC_ISA_DMA_SUPPORT_BROKEN 486 select BOOT_ELF32 487 select BOARD_SCACHE 488 select CSRC_R4K 489 select CEVT_R4K 490 select CPU_HAS_WB 491 select FORCE_PCI 492 select ISA 493 select I8259 494 select IRQ_MIPS_CPU 495 select NO_EXCEPT_FILL 496 select NR_CPUS_DEFAULT_64 497 select USE_GENERIC_EARLY_PRINTK_8250 498 select PCI_DRIVERS_GENERIC 499 select SYS_HAS_CPU_LOONGSON64 500 select SYS_HAS_EARLY_PRINTK 501 select SYS_SUPPORTS_SMP 502 select SYS_SUPPORTS_HOTPLUG_CPU 503 select SYS_SUPPORTS_NUMA 504 select SYS_SUPPORTS_64BIT_KERNEL 505 select SYS_SUPPORTS_HIGHMEM 506 select SYS_SUPPORTS_LITTLE_ENDIAN 507 select SYS_SUPPORTS_ZBOOT 508 select SYS_SUPPORTS_RELOCATABLE 509 select ZONE_DMA32 510 select COMMON_CLK 511 select USE_OF 512 select BUILTIN_DTB 513 select PCI_HOST_GENERIC 514 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA 515 help 516 This enables the support of Loongson-2/3 family of machines. 517 518 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with 519 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E 520 and Loongson-2F which will be removed), developed by the Institute 521 of Computing Technology (ICT), Chinese Academy of Sciences (CAS). 522 523config MIPS_MALTA 524 bool "MIPS Malta board" 525 select ARCH_MAY_HAVE_PC_FDC 526 select ARCH_MIGHT_HAVE_PC_PARPORT 527 select ARCH_MIGHT_HAVE_PC_SERIO 528 select BOOT_ELF32 529 select BOOT_RAW 530 select BUILTIN_DTB 531 select CEVT_R4K 532 select CLKSRC_MIPS_GIC 533 select COMMON_CLK 534 select CSRC_R4K 535 select DMA_NONCOHERENT 536 select GENERIC_ISA_DMA 537 select HAVE_PCSPKR_PLATFORM 538 select HAVE_PCI 539 select I8253 540 select I8259 541 select IRQ_MIPS_CPU 542 select MIPS_BONITO64 543 select MIPS_CPU_SCACHE 544 select MIPS_GIC 545 select MIPS_L1_CACHE_SHIFT_6 546 select MIPS_MSC 547 select PCI_GT64XXX_PCI0 548 select SMP_UP if SMP 549 select SWAP_IO_SPACE 550 select SYS_HAS_CPU_MIPS32_R1 551 select SYS_HAS_CPU_MIPS32_R2 552 select SYS_HAS_CPU_MIPS32_R3_5 553 select SYS_HAS_CPU_MIPS32_R5 554 select SYS_HAS_CPU_MIPS32_R6 555 select SYS_HAS_CPU_MIPS64_R1 556 select SYS_HAS_CPU_MIPS64_R2 557 select SYS_HAS_CPU_MIPS64_R6 558 select SYS_HAS_CPU_NEVADA 559 select SYS_HAS_CPU_RM7000 560 select SYS_SUPPORTS_32BIT_KERNEL 561 select SYS_SUPPORTS_64BIT_KERNEL 562 select SYS_SUPPORTS_BIG_ENDIAN 563 select SYS_SUPPORTS_HIGHMEM 564 select SYS_SUPPORTS_LITTLE_ENDIAN 565 select SYS_SUPPORTS_MICROMIPS 566 select SYS_SUPPORTS_MIPS16 567 select SYS_SUPPORTS_MIPS_CMP 568 select SYS_SUPPORTS_MIPS_CPS 569 select SYS_SUPPORTS_MULTITHREADING 570 select SYS_SUPPORTS_RELOCATABLE 571 select SYS_SUPPORTS_SMARTMIPS 572 select SYS_SUPPORTS_VPE_LOADER 573 select SYS_SUPPORTS_ZBOOT 574 select USE_OF 575 select WAR_ICACHE_REFILLS 576 select ZONE_DMA32 if 64BIT 577 help 578 This enables support for the MIPS Technologies Malta evaluation 579 board. 580 581config MACH_PIC32 582 bool "Microchip PIC32 Family" 583 help 584 This enables support for the Microchip PIC32 family of platforms. 585 586 Microchip PIC32 is a family of general-purpose 32 bit MIPS core 587 microcontrollers. 588 589config MACH_NINTENDO64 590 bool "Nintendo 64 console" 591 select CEVT_R4K 592 select CSRC_R4K 593 select SYS_HAS_CPU_R4300 594 select SYS_SUPPORTS_BIG_ENDIAN 595 select SYS_SUPPORTS_ZBOOT 596 select SYS_SUPPORTS_32BIT_KERNEL 597 select SYS_SUPPORTS_64BIT_KERNEL 598 select DMA_NONCOHERENT 599 select IRQ_MIPS_CPU 600 601config RALINK 602 bool "Ralink based machines" 603 select CEVT_R4K 604 select COMMON_CLK 605 select CSRC_R4K 606 select BOOT_RAW 607 select DMA_NONCOHERENT 608 select IRQ_MIPS_CPU 609 select USE_OF 610 select SYS_HAS_CPU_MIPS32_R2 611 select SYS_SUPPORTS_32BIT_KERNEL 612 select SYS_SUPPORTS_LITTLE_ENDIAN 613 select SYS_SUPPORTS_MIPS16 614 select SYS_SUPPORTS_ZBOOT 615 select SYS_HAS_EARLY_PRINTK 616 select ARCH_HAS_RESET_CONTROLLER 617 select RESET_CONTROLLER 618 619config MACH_REALTEK_RTL 620 bool "Realtek RTL838x/RTL839x based machines" 621 select MIPS_GENERIC 622 select DMA_NONCOHERENT 623 select IRQ_MIPS_CPU 624 select CSRC_R4K 625 select CEVT_R4K 626 select SYS_HAS_CPU_MIPS32_R1 627 select SYS_HAS_CPU_MIPS32_R2 628 select SYS_SUPPORTS_BIG_ENDIAN 629 select SYS_SUPPORTS_32BIT_KERNEL 630 select SYS_SUPPORTS_MIPS16 631 select SYS_SUPPORTS_MULTITHREADING 632 select SYS_SUPPORTS_VPE_LOADER 633 select BOOT_RAW 634 select PINCTRL 635 select USE_OF 636 637config SGI_IP22 638 bool "SGI IP22 (Indy/Indigo2)" 639 select ARC_MEMORY 640 select ARC_PROMLIB 641 select FW_ARC 642 select FW_ARC32 643 select ARCH_MIGHT_HAVE_PC_SERIO 644 select BOOT_ELF32 645 select CEVT_R4K 646 select CSRC_R4K 647 select DEFAULT_SGI_PARTITION 648 select DMA_NONCOHERENT 649 select HAVE_EISA 650 select I8253 651 select I8259 652 select IP22_CPU_SCACHE 653 select IRQ_MIPS_CPU 654 select GENERIC_ISA_DMA_SUPPORT_BROKEN 655 select SGI_HAS_I8042 656 select SGI_HAS_INDYDOG 657 select SGI_HAS_HAL2 658 select SGI_HAS_SEEQ 659 select SGI_HAS_WD93 660 select SGI_HAS_ZILOG 661 select SWAP_IO_SPACE 662 select SYS_HAS_CPU_R4X00 663 select SYS_HAS_CPU_R5000 664 select SYS_HAS_EARLY_PRINTK 665 select SYS_SUPPORTS_32BIT_KERNEL 666 select SYS_SUPPORTS_64BIT_KERNEL 667 select SYS_SUPPORTS_BIG_ENDIAN 668 select WAR_R4600_V1_INDEX_ICACHEOP 669 select WAR_R4600_V1_HIT_CACHEOP 670 select WAR_R4600_V2_HIT_CACHEOP 671 select MIPS_L1_CACHE_SHIFT_7 672 help 673 This are the SGI Indy, Challenge S and Indigo2, as well as certain 674 OEM variants like the Tandem CMN B006S. To compile a Linux kernel 675 that runs on these, say Y here. 676 677config SGI_IP27 678 bool "SGI IP27 (Origin200/2000)" 679 select ARCH_HAS_PHYS_TO_DMA 680 select ARCH_SPARSEMEM_ENABLE 681 select FW_ARC 682 select FW_ARC64 683 select ARC_CMDLINE_ONLY 684 select BOOT_ELF64 685 select DEFAULT_SGI_PARTITION 686 select FORCE_PCI 687 select SYS_HAS_EARLY_PRINTK 688 select HAVE_PCI 689 select IRQ_MIPS_CPU 690 select IRQ_DOMAIN_HIERARCHY 691 select NR_CPUS_DEFAULT_64 692 select PCI_DRIVERS_GENERIC 693 select PCI_XTALK_BRIDGE 694 select SYS_HAS_CPU_R10000 695 select SYS_SUPPORTS_64BIT_KERNEL 696 select SYS_SUPPORTS_BIG_ENDIAN 697 select SYS_SUPPORTS_NUMA 698 select SYS_SUPPORTS_SMP 699 select WAR_R10000_LLSC 700 select MIPS_L1_CACHE_SHIFT_7 701 select NUMA 702 select HAVE_ARCH_NODEDATA_EXTENSION 703 help 704 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics 705 workstations. To compile a Linux kernel that runs on these, say Y 706 here. 707 708config SGI_IP28 709 bool "SGI IP28 (Indigo2 R10k)" 710 select ARC_MEMORY 711 select ARC_PROMLIB 712 select FW_ARC 713 select FW_ARC64 714 select ARCH_MIGHT_HAVE_PC_SERIO 715 select BOOT_ELF64 716 select CEVT_R4K 717 select CSRC_R4K 718 select DEFAULT_SGI_PARTITION 719 select DMA_NONCOHERENT 720 select GENERIC_ISA_DMA_SUPPORT_BROKEN 721 select IRQ_MIPS_CPU 722 select HAVE_EISA 723 select I8253 724 select I8259 725 select SGI_HAS_I8042 726 select SGI_HAS_INDYDOG 727 select SGI_HAS_HAL2 728 select SGI_HAS_SEEQ 729 select SGI_HAS_WD93 730 select SGI_HAS_ZILOG 731 select SWAP_IO_SPACE 732 select SYS_HAS_CPU_R10000 733 select SYS_HAS_EARLY_PRINTK 734 select SYS_SUPPORTS_64BIT_KERNEL 735 select SYS_SUPPORTS_BIG_ENDIAN 736 select WAR_R10000_LLSC 737 select MIPS_L1_CACHE_SHIFT_7 738 help 739 This is the SGI Indigo2 with R10000 processor. To compile a Linux 740 kernel that runs on these, say Y here. 741 742config SGI_IP30 743 bool "SGI IP30 (Octane/Octane2)" 744 select ARCH_HAS_PHYS_TO_DMA 745 select FW_ARC 746 select FW_ARC64 747 select BOOT_ELF64 748 select CEVT_R4K 749 select CSRC_R4K 750 select FORCE_PCI 751 select SYNC_R4K if SMP 752 select ZONE_DMA32 753 select HAVE_PCI 754 select IRQ_MIPS_CPU 755 select IRQ_DOMAIN_HIERARCHY 756 select PCI_DRIVERS_GENERIC 757 select PCI_XTALK_BRIDGE 758 select SYS_HAS_EARLY_PRINTK 759 select SYS_HAS_CPU_R10000 760 select SYS_SUPPORTS_64BIT_KERNEL 761 select SYS_SUPPORTS_BIG_ENDIAN 762 select SYS_SUPPORTS_SMP 763 select WAR_R10000_LLSC 764 select MIPS_L1_CACHE_SHIFT_7 765 select ARC_MEMORY 766 help 767 These are the SGI Octane and Octane2 graphics workstations. To 768 compile a Linux kernel that runs on these, say Y here. 769 770config SGI_IP32 771 bool "SGI IP32 (O2)" 772 select ARC_MEMORY 773 select ARC_PROMLIB 774 select ARCH_HAS_PHYS_TO_DMA 775 select FW_ARC 776 select FW_ARC32 777 select BOOT_ELF32 778 select CEVT_R4K 779 select CSRC_R4K 780 select DMA_NONCOHERENT 781 select HAVE_PCI 782 select IRQ_MIPS_CPU 783 select R5000_CPU_SCACHE 784 select RM7000_CPU_SCACHE 785 select SYS_HAS_CPU_R5000 786 select SYS_HAS_CPU_R10000 if BROKEN 787 select SYS_HAS_CPU_RM7000 788 select SYS_HAS_CPU_NEVADA 789 select SYS_SUPPORTS_64BIT_KERNEL 790 select SYS_SUPPORTS_BIG_ENDIAN 791 select WAR_ICACHE_REFILLS 792 help 793 If you want this kernel to run on SGI O2 workstation, say Y here. 794 795config SIBYTE_CRHINE 796 bool "Sibyte BCM91120C-CRhine" 797 select BOOT_ELF32 798 select SIBYTE_BCM1120 799 select SWAP_IO_SPACE 800 select SYS_HAS_CPU_SB1 801 select SYS_SUPPORTS_BIG_ENDIAN 802 select SYS_SUPPORTS_LITTLE_ENDIAN 803 804config SIBYTE_CARMEL 805 bool "Sibyte BCM91120x-Carmel" 806 select BOOT_ELF32 807 select SIBYTE_BCM1120 808 select SWAP_IO_SPACE 809 select SYS_HAS_CPU_SB1 810 select SYS_SUPPORTS_BIG_ENDIAN 811 select SYS_SUPPORTS_LITTLE_ENDIAN 812 813config SIBYTE_CRHONE 814 bool "Sibyte BCM91125C-CRhone" 815 select BOOT_ELF32 816 select SIBYTE_BCM1125 817 select SWAP_IO_SPACE 818 select SYS_HAS_CPU_SB1 819 select SYS_SUPPORTS_BIG_ENDIAN 820 select SYS_SUPPORTS_HIGHMEM 821 select SYS_SUPPORTS_LITTLE_ENDIAN 822 823config SIBYTE_RHONE 824 bool "Sibyte BCM91125E-Rhone" 825 select BOOT_ELF32 826 select SIBYTE_BCM1125H 827 select SWAP_IO_SPACE 828 select SYS_HAS_CPU_SB1 829 select SYS_SUPPORTS_BIG_ENDIAN 830 select SYS_SUPPORTS_LITTLE_ENDIAN 831 832config SIBYTE_SWARM 833 bool "Sibyte BCM91250A-SWARM" 834 select BOOT_ELF32 835 select HAVE_PATA_PLATFORM 836 select SIBYTE_SB1250 837 select SWAP_IO_SPACE 838 select SYS_HAS_CPU_SB1 839 select SYS_SUPPORTS_BIG_ENDIAN 840 select SYS_SUPPORTS_HIGHMEM 841 select SYS_SUPPORTS_LITTLE_ENDIAN 842 select ZONE_DMA32 if 64BIT 843 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI 844 845config SIBYTE_LITTLESUR 846 bool "Sibyte BCM91250C2-LittleSur" 847 select BOOT_ELF32 848 select HAVE_PATA_PLATFORM 849 select SIBYTE_SB1250 850 select SWAP_IO_SPACE 851 select SYS_HAS_CPU_SB1 852 select SYS_SUPPORTS_BIG_ENDIAN 853 select SYS_SUPPORTS_HIGHMEM 854 select SYS_SUPPORTS_LITTLE_ENDIAN 855 select ZONE_DMA32 if 64BIT 856 857config SIBYTE_SENTOSA 858 bool "Sibyte BCM91250E-Sentosa" 859 select BOOT_ELF32 860 select SIBYTE_SB1250 861 select SWAP_IO_SPACE 862 select SYS_HAS_CPU_SB1 863 select SYS_SUPPORTS_BIG_ENDIAN 864 select SYS_SUPPORTS_LITTLE_ENDIAN 865 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI 866 867config SIBYTE_BIGSUR 868 bool "Sibyte BCM91480B-BigSur" 869 select BOOT_ELF32 870 select NR_CPUS_DEFAULT_4 871 select SIBYTE_BCM1x80 872 select SWAP_IO_SPACE 873 select SYS_HAS_CPU_SB1 874 select SYS_SUPPORTS_BIG_ENDIAN 875 select SYS_SUPPORTS_HIGHMEM 876 select SYS_SUPPORTS_LITTLE_ENDIAN 877 select ZONE_DMA32 if 64BIT 878 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI 879 880config SNI_RM 881 bool "SNI RM200/300/400" 882 select ARC_MEMORY 883 select ARC_PROMLIB 884 select FW_ARC if CPU_LITTLE_ENDIAN 885 select FW_ARC32 if CPU_LITTLE_ENDIAN 886 select FW_SNIPROM if CPU_BIG_ENDIAN 887 select ARCH_MAY_HAVE_PC_FDC 888 select ARCH_MIGHT_HAVE_PC_PARPORT 889 select ARCH_MIGHT_HAVE_PC_SERIO 890 select BOOT_ELF32 891 select CEVT_R4K 892 select CSRC_R4K 893 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN 894 select DMA_NONCOHERENT 895 select GENERIC_ISA_DMA 896 select HAVE_EISA 897 select HAVE_PCSPKR_PLATFORM 898 select HAVE_PCI 899 select IRQ_MIPS_CPU 900 select I8253 901 select I8259 902 select ISA 903 select MIPS_L1_CACHE_SHIFT_6 904 select SWAP_IO_SPACE if CPU_BIG_ENDIAN 905 select SYS_HAS_CPU_R4X00 906 select SYS_HAS_CPU_R5000 907 select SYS_HAS_CPU_R10000 908 select R5000_CPU_SCACHE 909 select SYS_HAS_EARLY_PRINTK 910 select SYS_SUPPORTS_32BIT_KERNEL 911 select SYS_SUPPORTS_64BIT_KERNEL 912 select SYS_SUPPORTS_BIG_ENDIAN 913 select SYS_SUPPORTS_HIGHMEM 914 select SYS_SUPPORTS_LITTLE_ENDIAN 915 select WAR_R4600_V2_HIT_CACHEOP 916 help 917 The SNI RM200/300/400 are MIPS-based machines manufactured by 918 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid 919 Technology and now in turn merged with Fujitsu. Say Y here to 920 support this machine type. 921 922config MACH_TX49XX 923 bool "Toshiba TX49 series based machines" 924 select WAR_TX49XX_ICACHE_INDEX_INV 925 926config MIKROTIK_RB532 927 bool "Mikrotik RB532 boards" 928 select CEVT_R4K 929 select CSRC_R4K 930 select DMA_NONCOHERENT 931 select HAVE_PCI 932 select IRQ_MIPS_CPU 933 select SYS_HAS_CPU_MIPS32_R1 934 select SYS_SUPPORTS_32BIT_KERNEL 935 select SYS_SUPPORTS_LITTLE_ENDIAN 936 select SWAP_IO_SPACE 937 select BOOT_RAW 938 select GPIOLIB 939 select MIPS_L1_CACHE_SHIFT_4 940 help 941 Support the Mikrotik(tm) RouterBoard 532 series, 942 based on the IDT RC32434 SoC. 943 944config CAVIUM_OCTEON_SOC 945 bool "Cavium Networks Octeon SoC based boards" 946 select CEVT_R4K 947 select ARCH_HAS_PHYS_TO_DMA 948 select HAVE_RAPIDIO 949 select PHYS_ADDR_T_64BIT 950 select SYS_SUPPORTS_64BIT_KERNEL 951 select SYS_SUPPORTS_BIG_ENDIAN 952 select EDAC_SUPPORT 953 select EDAC_ATOMIC_SCRUB 954 select SYS_SUPPORTS_LITTLE_ENDIAN 955 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN 956 select SYS_HAS_EARLY_PRINTK 957 select SYS_HAS_CPU_CAVIUM_OCTEON 958 select HAVE_PCI 959 select HAVE_PLAT_DELAY 960 select HAVE_PLAT_FW_INIT_CMDLINE 961 select HAVE_PLAT_MEMCPY 962 select ZONE_DMA32 963 select GPIOLIB 964 select USE_OF 965 select ARCH_SPARSEMEM_ENABLE 966 select SYS_SUPPORTS_SMP 967 select NR_CPUS_DEFAULT_64 968 select MIPS_NR_CPU_NR_MAP_1024 969 select BUILTIN_DTB 970 select MTD 971 select MTD_COMPLEX_MAPPINGS 972 select SWIOTLB 973 select SYS_SUPPORTS_RELOCATABLE 974 help 975 This option supports all of the Octeon reference boards from Cavium 976 Networks. It builds a kernel that dynamically determines the Octeon 977 CPU type and supports all known board reference implementations. 978 Some of the supported boards are: 979 EBT3000 980 EBH3000 981 EBH3100 982 Thunder 983 Kodama 984 Hikari 985 Say Y here for most Octeon reference boards. 986 987endchoice 988 989source "arch/mips/alchemy/Kconfig" 990source "arch/mips/ath25/Kconfig" 991source "arch/mips/ath79/Kconfig" 992source "arch/mips/bcm47xx/Kconfig" 993source "arch/mips/bcm63xx/Kconfig" 994source "arch/mips/bmips/Kconfig" 995source "arch/mips/generic/Kconfig" 996source "arch/mips/ingenic/Kconfig" 997source "arch/mips/jazz/Kconfig" 998source "arch/mips/lantiq/Kconfig" 999source "arch/mips/pic32/Kconfig" 1000source "arch/mips/ralink/Kconfig" 1001source "arch/mips/sgi-ip27/Kconfig" 1002source "arch/mips/sibyte/Kconfig" 1003source "arch/mips/txx9/Kconfig" 1004source "arch/mips/cavium-octeon/Kconfig" 1005source "arch/mips/loongson2ef/Kconfig" 1006source "arch/mips/loongson32/Kconfig" 1007source "arch/mips/loongson64/Kconfig" 1008 1009endmenu 1010 1011config GENERIC_HWEIGHT 1012 bool 1013 default y 1014 1015config GENERIC_CALIBRATE_DELAY 1016 bool 1017 default y 1018 1019config SCHED_OMIT_FRAME_POINTER 1020 bool 1021 default y 1022 1023# 1024# Select some configuration options automatically based on user selections. 1025# 1026config FW_ARC 1027 bool 1028 1029config ARCH_MAY_HAVE_PC_FDC 1030 bool 1031 1032config BOOT_RAW 1033 bool 1034 1035config CEVT_BCM1480 1036 bool 1037 1038config CEVT_DS1287 1039 bool 1040 1041config CEVT_GT641XX 1042 bool 1043 1044config CEVT_R4K 1045 bool 1046 1047config CEVT_SB1250 1048 bool 1049 1050config CEVT_TXX9 1051 bool 1052 1053config CSRC_BCM1480 1054 bool 1055 1056config CSRC_IOASIC 1057 bool 1058 1059config CSRC_R4K 1060 select CLOCKSOURCE_WATCHDOG if CPU_FREQ 1061 bool 1062 1063config CSRC_SB1250 1064 bool 1065 1066config MIPS_CLOCK_VSYSCALL 1067 def_bool CSRC_R4K || CLKSRC_MIPS_GIC 1068 1069config GPIO_TXX9 1070 select GPIOLIB 1071 bool 1072 1073config FW_CFE 1074 bool 1075 1076config ARCH_SUPPORTS_UPROBES 1077 bool 1078 1079config DMA_NONCOHERENT 1080 bool 1081 # 1082 # MIPS allows mixing "slightly different" Cacheability and Coherency 1083 # Attribute bits. It is believed that the uncached access through 1084 # KSEG1 and the implementation specific "uncached accelerated" used 1085 # by pgprot_writcombine can be mixed, and the latter sometimes provides 1086 # significant advantages. 1087 # 1088 select ARCH_HAS_DMA_WRITE_COMBINE 1089 select ARCH_HAS_DMA_PREP_COHERENT 1090 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 1091 select ARCH_HAS_DMA_SET_UNCACHED 1092 select DMA_NONCOHERENT_MMAP 1093 select NEED_DMA_MAP_STATE 1094 1095config SYS_HAS_EARLY_PRINTK 1096 bool 1097 1098config SYS_SUPPORTS_HOTPLUG_CPU 1099 bool 1100 1101config MIPS_BONITO64 1102 bool 1103 1104config MIPS_MSC 1105 bool 1106 1107config SYNC_R4K 1108 bool 1109 1110config NO_IOPORT_MAP 1111 def_bool n 1112 1113config GENERIC_CSUM 1114 def_bool CPU_NO_LOAD_STORE_LR 1115 1116config GENERIC_ISA_DMA 1117 bool 1118 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1119 select ISA_DMA_API 1120 1121config GENERIC_ISA_DMA_SUPPORT_BROKEN 1122 bool 1123 select GENERIC_ISA_DMA 1124 1125config HAVE_PLAT_DELAY 1126 bool 1127 1128config HAVE_PLAT_FW_INIT_CMDLINE 1129 bool 1130 1131config HAVE_PLAT_MEMCPY 1132 bool 1133 1134config ISA_DMA_API 1135 bool 1136 1137config SYS_SUPPORTS_RELOCATABLE 1138 bool 1139 help 1140 Selected if the platform supports relocating the kernel. 1141 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF 1142 to allow access to command line and entropy sources. 1143 1144# 1145# Endianness selection. Sufficiently obscure so many users don't know what to 1146# answer,so we try hard to limit the available choices. Also the use of a 1147# choice statement should be more obvious to the user. 1148# 1149choice 1150 prompt "Endianness selection" 1151 help 1152 Some MIPS machines can be configured for either little or big endian 1153 byte order. These modes require different kernels and a different 1154 Linux distribution. In general there is one preferred byteorder for a 1155 particular system but some systems are just as commonly used in the 1156 one or the other endianness. 1157 1158config CPU_BIG_ENDIAN 1159 bool "Big endian" 1160 depends on SYS_SUPPORTS_BIG_ENDIAN 1161 1162config CPU_LITTLE_ENDIAN 1163 bool "Little endian" 1164 depends on SYS_SUPPORTS_LITTLE_ENDIAN 1165 1166endchoice 1167 1168config EXPORT_UASM 1169 bool 1170 1171config SYS_SUPPORTS_APM_EMULATION 1172 bool 1173 1174config SYS_SUPPORTS_BIG_ENDIAN 1175 bool 1176 1177config SYS_SUPPORTS_LITTLE_ENDIAN 1178 bool 1179 1180config MIPS_HUGE_TLB_SUPPORT 1181 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE 1182 1183config IRQ_MSP_SLP 1184 bool 1185 1186config IRQ_MSP_CIC 1187 bool 1188 1189config IRQ_TXX9 1190 bool 1191 1192config IRQ_GT641XX 1193 bool 1194 1195config PCI_GT64XXX_PCI0 1196 bool 1197 1198config PCI_XTALK_BRIDGE 1199 bool 1200 1201config NO_EXCEPT_FILL 1202 bool 1203 1204config MIPS_SPRAM 1205 bool 1206 1207config SWAP_IO_SPACE 1208 bool 1209 1210config SGI_HAS_INDYDOG 1211 bool 1212 1213config SGI_HAS_HAL2 1214 bool 1215 1216config SGI_HAS_SEEQ 1217 bool 1218 1219config SGI_HAS_WD93 1220 bool 1221 1222config SGI_HAS_ZILOG 1223 bool 1224 1225config SGI_HAS_I8042 1226 bool 1227 1228config DEFAULT_SGI_PARTITION 1229 bool 1230 1231config FW_ARC32 1232 bool 1233 1234config FW_SNIPROM 1235 bool 1236 1237config BOOT_ELF32 1238 bool 1239 1240config MIPS_L1_CACHE_SHIFT_4 1241 bool 1242 1243config MIPS_L1_CACHE_SHIFT_5 1244 bool 1245 1246config MIPS_L1_CACHE_SHIFT_6 1247 bool 1248 1249config MIPS_L1_CACHE_SHIFT_7 1250 bool 1251 1252config MIPS_L1_CACHE_SHIFT 1253 int 1254 default "7" if MIPS_L1_CACHE_SHIFT_7 1255 default "6" if MIPS_L1_CACHE_SHIFT_6 1256 default "5" if MIPS_L1_CACHE_SHIFT_5 1257 default "4" if MIPS_L1_CACHE_SHIFT_4 1258 default "5" 1259 1260config ARC_CMDLINE_ONLY 1261 bool 1262 1263config ARC_CONSOLE 1264 bool "ARC console support" 1265 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN) 1266 1267config ARC_MEMORY 1268 bool 1269 1270config ARC_PROMLIB 1271 bool 1272 1273config FW_ARC64 1274 bool 1275 1276config BOOT_ELF64 1277 bool 1278 1279menu "CPU selection" 1280 1281choice 1282 prompt "CPU type" 1283 default CPU_R4X00 1284 1285config CPU_LOONGSON64 1286 bool "Loongson 64-bit CPU" 1287 depends on SYS_HAS_CPU_LOONGSON64 1288 select ARCH_HAS_PHYS_TO_DMA 1289 select CPU_MIPSR2 1290 select CPU_HAS_PREFETCH 1291 select CPU_SUPPORTS_64BIT_KERNEL 1292 select CPU_SUPPORTS_HIGHMEM 1293 select CPU_SUPPORTS_HUGEPAGES 1294 select CPU_SUPPORTS_MSA 1295 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT 1296 select CPU_MIPSR2_IRQ_VI 1297 select WEAK_ORDERING 1298 select WEAK_REORDERING_BEYOND_LLSC 1299 select MIPS_ASID_BITS_VARIABLE 1300 select MIPS_PGD_C0_CONTEXT 1301 select MIPS_L1_CACHE_SHIFT_6 1302 select MIPS_FP_SUPPORT 1303 select GPIOLIB 1304 select SWIOTLB 1305 select HAVE_KVM 1306 help 1307 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor 1308 cores implements the MIPS64R2 instruction set with many extensions, 1309 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000, 1310 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old 1311 Loongson-2E/2F is not covered here and will be removed in future. 1312 1313config LOONGSON3_ENHANCEMENT 1314 bool "New Loongson-3 CPU Enhancements" 1315 default n 1316 depends on CPU_LOONGSON64 1317 help 1318 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A 1319 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as 1320 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User 1321 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer), 1322 Fast TLB refill support, etc. 1323 1324 This option enable those enhancements which are not probed at run 1325 time. If you want a generic kernel to run on all Loongson 3 machines, 1326 please say 'N' here. If you want a high-performance kernel to run on 1327 new Loongson-3 machines only, please say 'Y' here. 1328 1329config CPU_LOONGSON3_WORKAROUNDS 1330 bool "Loongson-3 LLSC Workarounds" 1331 default y if SMP 1332 depends on CPU_LOONGSON64 1333 help 1334 Loongson-3 processors have the llsc issues which require workarounds. 1335 Without workarounds the system may hang unexpectedly. 1336 1337 Say Y, unless you know what you are doing. 1338 1339config CPU_LOONGSON3_CPUCFG_EMULATION 1340 bool "Emulate the CPUCFG instruction on older Loongson cores" 1341 default y 1342 depends on CPU_LOONGSON64 1343 help 1344 Loongson-3A R4 and newer have the CPUCFG instruction available for 1345 userland to query CPU capabilities, much like CPUID on x86. This 1346 option provides emulation of the instruction on older Loongson 1347 cores, back to Loongson-3A1000. 1348 1349 If unsure, please say Y. 1350 1351config CPU_LOONGSON2E 1352 bool "Loongson 2E" 1353 depends on SYS_HAS_CPU_LOONGSON2E 1354 select CPU_LOONGSON2EF 1355 help 1356 The Loongson 2E processor implements the MIPS III instruction set 1357 with many extensions. 1358 1359 It has an internal FPGA northbridge, which is compatible to 1360 bonito64. 1361 1362config CPU_LOONGSON2F 1363 bool "Loongson 2F" 1364 depends on SYS_HAS_CPU_LOONGSON2F 1365 select CPU_LOONGSON2EF 1366 select GPIOLIB 1367 help 1368 The Loongson 2F processor implements the MIPS III instruction set 1369 with many extensions. 1370 1371 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller 1372 have a similar programming interface with FPGA northbridge used in 1373 Loongson2E. 1374 1375config CPU_LOONGSON1B 1376 bool "Loongson 1B" 1377 depends on SYS_HAS_CPU_LOONGSON1B 1378 select CPU_LOONGSON32 1379 select LEDS_GPIO_REGISTER 1380 help 1381 The Loongson 1B is a 32-bit SoC, which implements the MIPS32 1382 Release 1 instruction set and part of the MIPS32 Release 2 1383 instruction set. 1384 1385config CPU_LOONGSON1C 1386 bool "Loongson 1C" 1387 depends on SYS_HAS_CPU_LOONGSON1C 1388 select CPU_LOONGSON32 1389 select LEDS_GPIO_REGISTER 1390 help 1391 The Loongson 1C is a 32-bit SoC, which implements the MIPS32 1392 Release 1 instruction set and part of the MIPS32 Release 2 1393 instruction set. 1394 1395config CPU_MIPS32_R1 1396 bool "MIPS32 Release 1" 1397 depends on SYS_HAS_CPU_MIPS32_R1 1398 select CPU_HAS_PREFETCH 1399 select CPU_SUPPORTS_32BIT_KERNEL 1400 select CPU_SUPPORTS_HIGHMEM 1401 help 1402 Choose this option to build a kernel for release 1 or later of the 1403 MIPS32 architecture. Most modern embedded systems with a 32-bit 1404 MIPS processor are based on a MIPS32 processor. If you know the 1405 specific type of processor in your system, choose those that one 1406 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 1407 Release 2 of the MIPS32 architecture is available since several 1408 years so chances are you even have a MIPS32 Release 2 processor 1409 in which case you should choose CPU_MIPS32_R2 instead for better 1410 performance. 1411 1412config CPU_MIPS32_R2 1413 bool "MIPS32 Release 2" 1414 depends on SYS_HAS_CPU_MIPS32_R2 1415 select CPU_HAS_PREFETCH 1416 select CPU_SUPPORTS_32BIT_KERNEL 1417 select CPU_SUPPORTS_HIGHMEM 1418 select CPU_SUPPORTS_MSA 1419 select HAVE_KVM 1420 help 1421 Choose this option to build a kernel for release 2 or later of the 1422 MIPS32 architecture. Most modern embedded systems with a 32-bit 1423 MIPS processor are based on a MIPS32 processor. If you know the 1424 specific type of processor in your system, choose those that one 1425 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 1426 1427config CPU_MIPS32_R5 1428 bool "MIPS32 Release 5" 1429 depends on SYS_HAS_CPU_MIPS32_R5 1430 select CPU_HAS_PREFETCH 1431 select CPU_SUPPORTS_32BIT_KERNEL 1432 select CPU_SUPPORTS_HIGHMEM 1433 select CPU_SUPPORTS_MSA 1434 select HAVE_KVM 1435 select MIPS_O32_FP64_SUPPORT 1436 help 1437 Choose this option to build a kernel for release 5 or later of the 1438 MIPS32 architecture. New MIPS processors, starting with the Warrior 1439 family, are based on a MIPS32r5 processor. If you own an older 1440 processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 1441 1442config CPU_MIPS32_R6 1443 bool "MIPS32 Release 6" 1444 depends on SYS_HAS_CPU_MIPS32_R6 1445 select CPU_HAS_PREFETCH 1446 select CPU_NO_LOAD_STORE_LR 1447 select CPU_SUPPORTS_32BIT_KERNEL 1448 select CPU_SUPPORTS_HIGHMEM 1449 select CPU_SUPPORTS_MSA 1450 select HAVE_KVM 1451 select MIPS_O32_FP64_SUPPORT 1452 help 1453 Choose this option to build a kernel for release 6 or later of the 1454 MIPS32 architecture. New MIPS processors, starting with the Warrior 1455 family, are based on a MIPS32r6 processor. If you own an older 1456 processor, you probably need to select MIPS32r1 or MIPS32r2 instead. 1457 1458config CPU_MIPS64_R1 1459 bool "MIPS64 Release 1" 1460 depends on SYS_HAS_CPU_MIPS64_R1 1461 select CPU_HAS_PREFETCH 1462 select CPU_SUPPORTS_32BIT_KERNEL 1463 select CPU_SUPPORTS_64BIT_KERNEL 1464 select CPU_SUPPORTS_HIGHMEM 1465 select CPU_SUPPORTS_HUGEPAGES 1466 help 1467 Choose this option to build a kernel for release 1 or later of the 1468 MIPS64 architecture. Many modern embedded systems with a 64-bit 1469 MIPS processor are based on a MIPS64 processor. If you know the 1470 specific type of processor in your system, choose those that one 1471 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 1472 Release 2 of the MIPS64 architecture is available since several 1473 years so chances are you even have a MIPS64 Release 2 processor 1474 in which case you should choose CPU_MIPS64_R2 instead for better 1475 performance. 1476 1477config CPU_MIPS64_R2 1478 bool "MIPS64 Release 2" 1479 depends on SYS_HAS_CPU_MIPS64_R2 1480 select CPU_HAS_PREFETCH 1481 select CPU_SUPPORTS_32BIT_KERNEL 1482 select CPU_SUPPORTS_64BIT_KERNEL 1483 select CPU_SUPPORTS_HIGHMEM 1484 select CPU_SUPPORTS_HUGEPAGES 1485 select CPU_SUPPORTS_MSA 1486 select HAVE_KVM 1487 help 1488 Choose this option to build a kernel for release 2 or later of the 1489 MIPS64 architecture. Many modern embedded systems with a 64-bit 1490 MIPS processor are based on a MIPS64 processor. If you know the 1491 specific type of processor in your system, choose those that one 1492 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 1493 1494config CPU_MIPS64_R5 1495 bool "MIPS64 Release 5" 1496 depends on SYS_HAS_CPU_MIPS64_R5 1497 select CPU_HAS_PREFETCH 1498 select CPU_SUPPORTS_32BIT_KERNEL 1499 select CPU_SUPPORTS_64BIT_KERNEL 1500 select CPU_SUPPORTS_HIGHMEM 1501 select CPU_SUPPORTS_HUGEPAGES 1502 select CPU_SUPPORTS_MSA 1503 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 1504 select HAVE_KVM 1505 help 1506 Choose this option to build a kernel for release 5 or later of the 1507 MIPS64 architecture. This is a intermediate MIPS architecture 1508 release partly implementing release 6 features. Though there is no 1509 any hardware known to be based on this release. 1510 1511config CPU_MIPS64_R6 1512 bool "MIPS64 Release 6" 1513 depends on SYS_HAS_CPU_MIPS64_R6 1514 select CPU_HAS_PREFETCH 1515 select CPU_NO_LOAD_STORE_LR 1516 select CPU_SUPPORTS_32BIT_KERNEL 1517 select CPU_SUPPORTS_64BIT_KERNEL 1518 select CPU_SUPPORTS_HIGHMEM 1519 select CPU_SUPPORTS_HUGEPAGES 1520 select CPU_SUPPORTS_MSA 1521 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32 1522 select HAVE_KVM 1523 help 1524 Choose this option to build a kernel for release 6 or later of the 1525 MIPS64 architecture. New MIPS processors, starting with the Warrior 1526 family, are based on a MIPS64r6 processor. If you own an older 1527 processor, you probably need to select MIPS64r1 or MIPS64r2 instead. 1528 1529config CPU_P5600 1530 bool "MIPS Warrior P5600" 1531 depends on SYS_HAS_CPU_P5600 1532 select CPU_HAS_PREFETCH 1533 select CPU_SUPPORTS_32BIT_KERNEL 1534 select CPU_SUPPORTS_HIGHMEM 1535 select CPU_SUPPORTS_MSA 1536 select CPU_SUPPORTS_CPUFREQ 1537 select CPU_MIPSR2_IRQ_VI 1538 select CPU_MIPSR2_IRQ_EI 1539 select HAVE_KVM 1540 select MIPS_O32_FP64_SUPPORT 1541 help 1542 Choose this option to build a kernel for MIPS Warrior P5600 CPU. 1543 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes, 1544 MMU with two-levels TLB, UCA, MSA, MDU core level features and system 1545 level features like up to six P5600 calculation cores, CM2 with L2 1546 cache, IOCU/IOMMU (though might be unused depending on the system- 1547 specific IP core configuration), GIC, CPC, virtualisation module, 1548 eJTAG and PDtrace. 1549 1550config CPU_R3000 1551 bool "R3000" 1552 depends on SYS_HAS_CPU_R3000 1553 select CPU_HAS_WB 1554 select CPU_R3K_TLB 1555 select CPU_SUPPORTS_32BIT_KERNEL 1556 select CPU_SUPPORTS_HIGHMEM 1557 help 1558 Please make sure to pick the right CPU type. Linux/MIPS is not 1559 designed to be generic, i.e. Kernels compiled for R3000 CPUs will 1560 *not* work on R4000 machines and vice versa. However, since most 1561 of the supported machines have an R4000 (or similar) CPU, R4x00 1562 might be a safe bet. If the resulting kernel does not work, 1563 try to recompile with R3000. 1564 1565config CPU_R4300 1566 bool "R4300" 1567 depends on SYS_HAS_CPU_R4300 1568 select CPU_SUPPORTS_32BIT_KERNEL 1569 select CPU_SUPPORTS_64BIT_KERNEL 1570 help 1571 MIPS Technologies R4300-series processors. 1572 1573config CPU_R4X00 1574 bool "R4x00" 1575 depends on SYS_HAS_CPU_R4X00 1576 select CPU_SUPPORTS_32BIT_KERNEL 1577 select CPU_SUPPORTS_64BIT_KERNEL 1578 select CPU_SUPPORTS_HUGEPAGES 1579 help 1580 MIPS Technologies R4000-series processors other than 4300, including 1581 the R4000, R4400, R4600, and 4700. 1582 1583config CPU_TX49XX 1584 bool "R49XX" 1585 depends on SYS_HAS_CPU_TX49XX 1586 select CPU_HAS_PREFETCH 1587 select CPU_SUPPORTS_32BIT_KERNEL 1588 select CPU_SUPPORTS_64BIT_KERNEL 1589 select CPU_SUPPORTS_HUGEPAGES 1590 1591config CPU_R5000 1592 bool "R5000" 1593 depends on SYS_HAS_CPU_R5000 1594 select CPU_SUPPORTS_32BIT_KERNEL 1595 select CPU_SUPPORTS_64BIT_KERNEL 1596 select CPU_SUPPORTS_HUGEPAGES 1597 help 1598 MIPS Technologies R5000-series processors other than the Nevada. 1599 1600config CPU_R5500 1601 bool "R5500" 1602 depends on SYS_HAS_CPU_R5500 1603 select CPU_SUPPORTS_32BIT_KERNEL 1604 select CPU_SUPPORTS_64BIT_KERNEL 1605 select CPU_SUPPORTS_HUGEPAGES 1606 help 1607 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV 1608 instruction set. 1609 1610config CPU_NEVADA 1611 bool "RM52xx" 1612 depends on SYS_HAS_CPU_NEVADA 1613 select CPU_SUPPORTS_32BIT_KERNEL 1614 select CPU_SUPPORTS_64BIT_KERNEL 1615 select CPU_SUPPORTS_HUGEPAGES 1616 help 1617 QED / PMC-Sierra RM52xx-series ("Nevada") processors. 1618 1619config CPU_R10000 1620 bool "R10000" 1621 depends on SYS_HAS_CPU_R10000 1622 select CPU_HAS_PREFETCH 1623 select CPU_SUPPORTS_32BIT_KERNEL 1624 select CPU_SUPPORTS_64BIT_KERNEL 1625 select CPU_SUPPORTS_HIGHMEM 1626 select CPU_SUPPORTS_HUGEPAGES 1627 help 1628 MIPS Technologies R10000-series processors. 1629 1630config CPU_RM7000 1631 bool "RM7000" 1632 depends on SYS_HAS_CPU_RM7000 1633 select CPU_HAS_PREFETCH 1634 select CPU_SUPPORTS_32BIT_KERNEL 1635 select CPU_SUPPORTS_64BIT_KERNEL 1636 select CPU_SUPPORTS_HIGHMEM 1637 select CPU_SUPPORTS_HUGEPAGES 1638 1639config CPU_SB1 1640 bool "SB1" 1641 depends on SYS_HAS_CPU_SB1 1642 select CPU_SUPPORTS_32BIT_KERNEL 1643 select CPU_SUPPORTS_64BIT_KERNEL 1644 select CPU_SUPPORTS_HIGHMEM 1645 select CPU_SUPPORTS_HUGEPAGES 1646 select WEAK_ORDERING 1647 1648config CPU_CAVIUM_OCTEON 1649 bool "Cavium Octeon processor" 1650 depends on SYS_HAS_CPU_CAVIUM_OCTEON 1651 select CPU_HAS_PREFETCH 1652 select CPU_SUPPORTS_64BIT_KERNEL 1653 select WEAK_ORDERING 1654 select CPU_SUPPORTS_HIGHMEM 1655 select CPU_SUPPORTS_HUGEPAGES 1656 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1657 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN 1658 select MIPS_L1_CACHE_SHIFT_7 1659 select HAVE_KVM 1660 help 1661 The Cavium Octeon processor is a highly integrated chip containing 1662 many ethernet hardware widgets for networking tasks. The processor 1663 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. 1664 Full details can be found at http://www.caviumnetworks.com. 1665 1666config CPU_BMIPS 1667 bool "Broadcom BMIPS" 1668 depends on SYS_HAS_CPU_BMIPS 1669 select CPU_MIPS32 1670 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300 1671 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 1672 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380 1673 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 1674 select CPU_SUPPORTS_32BIT_KERNEL 1675 select DMA_NONCOHERENT 1676 select IRQ_MIPS_CPU 1677 select SWAP_IO_SPACE 1678 select WEAK_ORDERING 1679 select CPU_SUPPORTS_HIGHMEM 1680 select CPU_HAS_PREFETCH 1681 select CPU_SUPPORTS_CPUFREQ 1682 select MIPS_EXTERNAL_TIMER 1683 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU 1684 help 1685 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors. 1686 1687endchoice 1688 1689config CPU_MIPS32_3_5_FEATURES 1690 bool "MIPS32 Release 3.5 Features" 1691 depends on SYS_HAS_CPU_MIPS32_R3_5 1692 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \ 1693 CPU_P5600 1694 help 1695 Choose this option to build a kernel for release 2 or later of the 1696 MIPS32 architecture including features from the 3.5 release such as 1697 support for Enhanced Virtual Addressing (EVA). 1698 1699config CPU_MIPS32_3_5_EVA 1700 bool "Enhanced Virtual Addressing (EVA)" 1701 depends on CPU_MIPS32_3_5_FEATURES 1702 select EVA 1703 default y 1704 help 1705 Choose this option if you want to enable the Enhanced Virtual 1706 Addressing (EVA) on your MIPS32 core (such as proAptiv). 1707 One of its primary benefits is an increase in the maximum size 1708 of lowmem (up to 3GB). If unsure, say 'N' here. 1709 1710config CPU_MIPS32_R5_FEATURES 1711 bool "MIPS32 Release 5 Features" 1712 depends on SYS_HAS_CPU_MIPS32_R5 1713 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600 1714 help 1715 Choose this option to build a kernel for release 2 or later of the 1716 MIPS32 architecture including features from release 5 such as 1717 support for Extended Physical Addressing (XPA). 1718 1719config CPU_MIPS32_R5_XPA 1720 bool "Extended Physical Addressing (XPA)" 1721 depends on CPU_MIPS32_R5_FEATURES 1722 depends on !EVA 1723 depends on !PAGE_SIZE_4KB 1724 depends on SYS_SUPPORTS_HIGHMEM 1725 select XPA 1726 select HIGHMEM 1727 select PHYS_ADDR_T_64BIT 1728 default n 1729 help 1730 Choose this option if you want to enable the Extended Physical 1731 Addressing (XPA) on your MIPS32 core (such as P5600 series). The 1732 benefit is to increase physical addressing equal to or greater 1733 than 40 bits. Note that this has the side effect of turning on 1734 64-bit addressing which in turn makes the PTEs 64-bit in size. 1735 If unsure, say 'N' here. 1736 1737if CPU_LOONGSON2F 1738config CPU_NOP_WORKAROUNDS 1739 bool 1740 1741config CPU_JUMP_WORKAROUNDS 1742 bool 1743 1744config CPU_LOONGSON2F_WORKAROUNDS 1745 bool "Loongson 2F Workarounds" 1746 default y 1747 select CPU_NOP_WORKAROUNDS 1748 select CPU_JUMP_WORKAROUNDS 1749 help 1750 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which 1751 require workarounds. Without workarounds the system may hang 1752 unexpectedly. For more information please refer to the gas 1753 -mfix-loongson2f-nop and -mfix-loongson2f-jump options. 1754 1755 Loongson 2F03 and later have fixed these issues and no workarounds 1756 are needed. The workarounds have no significant side effect on them 1757 but may decrease the performance of the system so this option should 1758 be disabled unless the kernel is intended to be run on 2F01 or 2F02 1759 systems. 1760 1761 If unsure, please say Y. 1762endif # CPU_LOONGSON2F 1763 1764config SYS_SUPPORTS_ZBOOT 1765 bool 1766 select HAVE_KERNEL_GZIP 1767 select HAVE_KERNEL_BZIP2 1768 select HAVE_KERNEL_LZ4 1769 select HAVE_KERNEL_LZMA 1770 select HAVE_KERNEL_LZO 1771 select HAVE_KERNEL_XZ 1772 select HAVE_KERNEL_ZSTD 1773 1774config SYS_SUPPORTS_ZBOOT_UART16550 1775 bool 1776 select SYS_SUPPORTS_ZBOOT 1777 1778config SYS_SUPPORTS_ZBOOT_UART_PROM 1779 bool 1780 select SYS_SUPPORTS_ZBOOT 1781 1782config CPU_LOONGSON2EF 1783 bool 1784 select CPU_SUPPORTS_32BIT_KERNEL 1785 select CPU_SUPPORTS_64BIT_KERNEL 1786 select CPU_SUPPORTS_HIGHMEM 1787 select CPU_SUPPORTS_HUGEPAGES 1788 select ARCH_HAS_PHYS_TO_DMA 1789 1790config CPU_LOONGSON32 1791 bool 1792 select CPU_MIPS32 1793 select CPU_MIPSR2 1794 select CPU_HAS_PREFETCH 1795 select CPU_SUPPORTS_32BIT_KERNEL 1796 select CPU_SUPPORTS_HIGHMEM 1797 select CPU_SUPPORTS_CPUFREQ 1798 1799config CPU_BMIPS32_3300 1800 select SMP_UP if SMP 1801 bool 1802 1803config CPU_BMIPS4350 1804 bool 1805 select SYS_SUPPORTS_SMP 1806 select SYS_SUPPORTS_HOTPLUG_CPU 1807 1808config CPU_BMIPS4380 1809 bool 1810 select MIPS_L1_CACHE_SHIFT_6 1811 select SYS_SUPPORTS_SMP 1812 select SYS_SUPPORTS_HOTPLUG_CPU 1813 select CPU_HAS_RIXI 1814 1815config CPU_BMIPS5000 1816 bool 1817 select MIPS_CPU_SCACHE 1818 select MIPS_L1_CACHE_SHIFT_7 1819 select SYS_SUPPORTS_SMP 1820 select SYS_SUPPORTS_HOTPLUG_CPU 1821 select CPU_HAS_RIXI 1822 1823config SYS_HAS_CPU_LOONGSON64 1824 bool 1825 select CPU_SUPPORTS_CPUFREQ 1826 select CPU_HAS_RIXI 1827 1828config SYS_HAS_CPU_LOONGSON2E 1829 bool 1830 1831config SYS_HAS_CPU_LOONGSON2F 1832 bool 1833 select CPU_SUPPORTS_CPUFREQ 1834 select CPU_SUPPORTS_ADDRWINCFG if 64BIT 1835 1836config SYS_HAS_CPU_LOONGSON1B 1837 bool 1838 1839config SYS_HAS_CPU_LOONGSON1C 1840 bool 1841 1842config SYS_HAS_CPU_MIPS32_R1 1843 bool 1844 1845config SYS_HAS_CPU_MIPS32_R2 1846 bool 1847 1848config SYS_HAS_CPU_MIPS32_R3_5 1849 bool 1850 1851config SYS_HAS_CPU_MIPS32_R5 1852 bool 1853 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 1854 1855config SYS_HAS_CPU_MIPS32_R6 1856 bool 1857 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 1858 1859config SYS_HAS_CPU_MIPS64_R1 1860 bool 1861 1862config SYS_HAS_CPU_MIPS64_R2 1863 bool 1864 1865config SYS_HAS_CPU_MIPS64_R5 1866 bool 1867 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 1868 1869config SYS_HAS_CPU_MIPS64_R6 1870 bool 1871 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 1872 1873config SYS_HAS_CPU_P5600 1874 bool 1875 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 1876 1877config SYS_HAS_CPU_R3000 1878 bool 1879 1880config SYS_HAS_CPU_R4300 1881 bool 1882 1883config SYS_HAS_CPU_R4X00 1884 bool 1885 1886config SYS_HAS_CPU_TX49XX 1887 bool 1888 1889config SYS_HAS_CPU_R5000 1890 bool 1891 1892config SYS_HAS_CPU_R5500 1893 bool 1894 1895config SYS_HAS_CPU_NEVADA 1896 bool 1897 1898config SYS_HAS_CPU_R10000 1899 bool 1900 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT 1901 1902config SYS_HAS_CPU_RM7000 1903 bool 1904 1905config SYS_HAS_CPU_SB1 1906 bool 1907 1908config SYS_HAS_CPU_CAVIUM_OCTEON 1909 bool 1910 1911config SYS_HAS_CPU_BMIPS 1912 bool 1913 1914config SYS_HAS_CPU_BMIPS32_3300 1915 bool 1916 select SYS_HAS_CPU_BMIPS 1917 1918config SYS_HAS_CPU_BMIPS4350 1919 bool 1920 select SYS_HAS_CPU_BMIPS 1921 1922config SYS_HAS_CPU_BMIPS4380 1923 bool 1924 select SYS_HAS_CPU_BMIPS 1925 1926config SYS_HAS_CPU_BMIPS5000 1927 bool 1928 select SYS_HAS_CPU_BMIPS 1929 select ARCH_HAS_SYNC_DMA_FOR_CPU 1930 1931# 1932# CPU may reorder R->R, R->W, W->R, W->W 1933# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC 1934# 1935config WEAK_ORDERING 1936 bool 1937 1938# 1939# CPU may reorder reads and writes beyond LL/SC 1940# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC 1941# 1942config WEAK_REORDERING_BEYOND_LLSC 1943 bool 1944endmenu 1945 1946# 1947# These two indicate any level of the MIPS32 and MIPS64 architecture 1948# 1949config CPU_MIPS32 1950 bool 1951 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \ 1952 CPU_MIPS32_R6 || CPU_P5600 1953 1954config CPU_MIPS64 1955 bool 1956 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \ 1957 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON 1958 1959# 1960# These indicate the revision of the architecture 1961# 1962config CPU_MIPSR1 1963 bool 1964 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1 1965 1966config CPU_MIPSR2 1967 bool 1968 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 1969 select CPU_HAS_RIXI 1970 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN 1971 select MIPS_SPRAM 1972 1973config CPU_MIPSR5 1974 bool 1975 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600 1976 select CPU_HAS_RIXI 1977 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN 1978 select MIPS_SPRAM 1979 1980config CPU_MIPSR6 1981 bool 1982 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 1983 select CPU_HAS_RIXI 1984 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN 1985 select HAVE_ARCH_BITREVERSE 1986 select MIPS_ASID_BITS_VARIABLE 1987 select MIPS_CRC_SUPPORT 1988 select MIPS_SPRAM 1989 1990config TARGET_ISA_REV 1991 int 1992 default 1 if CPU_MIPSR1 1993 default 2 if CPU_MIPSR2 1994 default 5 if CPU_MIPSR5 1995 default 6 if CPU_MIPSR6 1996 default 0 1997 help 1998 Reflects the ISA revision being targeted by the kernel build. This 1999 is effectively the Kconfig equivalent of MIPS_ISA_REV. 2000 2001config EVA 2002 bool 2003 2004config XPA 2005 bool 2006 2007config SYS_SUPPORTS_32BIT_KERNEL 2008 bool 2009config SYS_SUPPORTS_64BIT_KERNEL 2010 bool 2011config CPU_SUPPORTS_32BIT_KERNEL 2012 bool 2013config CPU_SUPPORTS_64BIT_KERNEL 2014 bool 2015config CPU_SUPPORTS_CPUFREQ 2016 bool 2017config CPU_SUPPORTS_ADDRWINCFG 2018 bool 2019config CPU_SUPPORTS_HUGEPAGES 2020 bool 2021 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA)) 2022config MIPS_PGD_C0_CONTEXT 2023 bool 2024 depends on 64BIT 2025 default y if (CPU_MIPSR2 || CPU_MIPSR6) 2026 2027# 2028# Set to y for ptrace access to watch registers. 2029# 2030config HARDWARE_WATCHPOINTS 2031 bool 2032 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6 2033 2034menu "Kernel type" 2035 2036choice 2037 prompt "Kernel code model" 2038 help 2039 You should only select this option if you have a workload that 2040 actually benefits from 64-bit processing or if your machine has 2041 large memory. You will only be presented a single option in this 2042 menu if your system does not support both 32-bit and 64-bit kernels. 2043 2044config 32BIT 2045 bool "32-bit kernel" 2046 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL 2047 select TRAD_SIGNALS 2048 help 2049 Select this option if you want to build a 32-bit kernel. 2050 2051config 64BIT 2052 bool "64-bit kernel" 2053 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL 2054 help 2055 Select this option if you want to build a 64-bit kernel. 2056 2057endchoice 2058 2059config MIPS_VA_BITS_48 2060 bool "48 bits virtual memory" 2061 depends on 64BIT 2062 help 2063 Support a maximum at least 48 bits of application virtual 2064 memory. Default is 40 bits or less, depending on the CPU. 2065 For page sizes 16k and above, this option results in a small 2066 memory overhead for page tables. For 4k page size, a fourth 2067 level of page tables is added which imposes both a memory 2068 overhead as well as slower TLB fault handling. 2069 2070 If unsure, say N. 2071 2072config ZBOOT_LOAD_ADDRESS 2073 hex "Compressed kernel load address" 2074 default 0xffffffff80400000 if BCM47XX 2075 default 0x0 2076 depends on SYS_SUPPORTS_ZBOOT 2077 help 2078 The address to load compressed kernel, aka vmlinuz. 2079 2080 This is only used if non-zero. 2081 2082choice 2083 prompt "Kernel page size" 2084 default PAGE_SIZE_4KB 2085 2086config PAGE_SIZE_4KB 2087 bool "4kB" 2088 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64 2089 help 2090 This option select the standard 4kB Linux page size. On some 2091 R3000-family processors this is the only available page size. Using 2092 4kB page size will minimize memory consumption and is therefore 2093 recommended for low memory systems. 2094 2095config PAGE_SIZE_8KB 2096 bool "8kB" 2097 depends on CPU_CAVIUM_OCTEON 2098 depends on !MIPS_VA_BITS_48 2099 help 2100 Using 8kB page size will result in higher performance kernel at 2101 the price of higher memory consumption. This option is available 2102 only on cnMIPS processors. Note that you will need a suitable Linux 2103 distribution to support this. 2104 2105config PAGE_SIZE_16KB 2106 bool "16kB" 2107 depends on !CPU_R3000 2108 help 2109 Using 16kB page size will result in higher performance kernel at 2110 the price of higher memory consumption. This option is available on 2111 all non-R3000 family processors. Note that you will need a suitable 2112 Linux distribution to support this. 2113 2114config PAGE_SIZE_32KB 2115 bool "32kB" 2116 depends on CPU_CAVIUM_OCTEON 2117 depends on !MIPS_VA_BITS_48 2118 help 2119 Using 32kB page size will result in higher performance kernel at 2120 the price of higher memory consumption. This option is available 2121 only on cnMIPS cores. Note that you will need a suitable Linux 2122 distribution to support this. 2123 2124config PAGE_SIZE_64KB 2125 bool "64kB" 2126 depends on !CPU_R3000 2127 help 2128 Using 64kB page size will result in higher performance kernel at 2129 the price of higher memory consumption. This option is available on 2130 all non-R3000 family processor. Not that at the time of this 2131 writing this option is still high experimental. 2132 2133endchoice 2134 2135config ARCH_FORCE_MAX_ORDER 2136 int "Maximum zone order" 2137 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2138 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB 2139 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2140 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB 2141 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2142 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB 2143 range 0 64 2144 default "11" 2145 help 2146 The kernel memory allocator divides physically contiguous memory 2147 blocks into "zones", where each zone is a power of two number of 2148 pages. This option selects the largest power of two that the kernel 2149 keeps in the memory allocator. If you need to allocate very large 2150 blocks of physically contiguous memory, then you may need to 2151 increase this value. 2152 2153 This config option is actually maximum order plus one. For example, 2154 a value of 11 means that the largest free memory block is 2^10 pages. 2155 2156 The page size is not necessarily 4KB. Keep this in mind 2157 when choosing a value for this option. 2158 2159config BOARD_SCACHE 2160 bool 2161 2162config IP22_CPU_SCACHE 2163 bool 2164 select BOARD_SCACHE 2165 2166# 2167# Support for a MIPS32 / MIPS64 style S-caches 2168# 2169config MIPS_CPU_SCACHE 2170 bool 2171 select BOARD_SCACHE 2172 2173config R5000_CPU_SCACHE 2174 bool 2175 select BOARD_SCACHE 2176 2177config RM7000_CPU_SCACHE 2178 bool 2179 select BOARD_SCACHE 2180 2181config SIBYTE_DMA_PAGEOPS 2182 bool "Use DMA to clear/copy pages" 2183 depends on CPU_SB1 2184 help 2185 Instead of using the CPU to zero and copy pages, use a Data Mover 2186 channel. These DMA channels are otherwise unused by the standard 2187 SiByte Linux port. Seems to give a small performance benefit. 2188 2189config CPU_HAS_PREFETCH 2190 bool 2191 2192config CPU_GENERIC_DUMP_TLB 2193 bool 2194 default y if !CPU_R3000 2195 2196config MIPS_FP_SUPPORT 2197 bool "Floating Point support" if EXPERT 2198 default y 2199 help 2200 Select y to include support for floating point in the kernel 2201 including initialization of FPU hardware, FP context save & restore 2202 and emulation of an FPU where necessary. Without this support any 2203 userland program attempting to use floating point instructions will 2204 receive a SIGILL. 2205 2206 If you know that your userland will not attempt to use floating point 2207 instructions then you can say n here to shrink the kernel a little. 2208 2209 If unsure, say y. 2210 2211config CPU_R2300_FPU 2212 bool 2213 depends on MIPS_FP_SUPPORT 2214 default y if CPU_R3000 2215 2216config CPU_R3K_TLB 2217 bool 2218 2219config CPU_R4K_FPU 2220 bool 2221 depends on MIPS_FP_SUPPORT 2222 default y if !CPU_R2300_FPU 2223 2224config CPU_R4K_CACHE_TLB 2225 bool 2226 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON) 2227 2228config MIPS_MT_SMP 2229 bool "MIPS MT SMP support (1 TC on each available VPE)" 2230 default y 2231 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS 2232 select CPU_MIPSR2_IRQ_VI 2233 select CPU_MIPSR2_IRQ_EI 2234 select SYNC_R4K 2235 select MIPS_MT 2236 select SMP 2237 select SMP_UP 2238 select SYS_SUPPORTS_SMP 2239 select SYS_SUPPORTS_SCHED_SMT 2240 select MIPS_PERF_SHARED_TC_COUNTERS 2241 help 2242 This is a kernel model which is known as SMVP. This is supported 2243 on cores with the MT ASE and uses the available VPEs to implement 2244 virtual processors which supports SMP. This is equivalent to the 2245 Intel Hyperthreading feature. For further information go to 2246 <http://www.imgtec.com/mips/mips-multithreading.asp>. 2247 2248config MIPS_MT 2249 bool 2250 2251config SCHED_SMT 2252 bool "SMT (multithreading) scheduler support" 2253 depends on SYS_SUPPORTS_SCHED_SMT 2254 default n 2255 help 2256 SMT scheduler support improves the CPU scheduler's decision making 2257 when dealing with MIPS MT enabled cores at a cost of slightly 2258 increased overhead in some places. If unsure say N here. 2259 2260config SYS_SUPPORTS_SCHED_SMT 2261 bool 2262 2263config SYS_SUPPORTS_MULTITHREADING 2264 bool 2265 2266config MIPS_MT_FPAFF 2267 bool "Dynamic FPU affinity for FP-intensive threads" 2268 default y 2269 depends on MIPS_MT_SMP 2270 2271config MIPSR2_TO_R6_EMULATOR 2272 bool "MIPS R2-to-R6 emulator" 2273 depends on CPU_MIPSR6 2274 depends on MIPS_FP_SUPPORT 2275 default y 2276 help 2277 Choose this option if you want to run non-R6 MIPS userland code. 2278 Even if you say 'Y' here, the emulator will still be disabled by 2279 default. You can enable it using the 'mipsr2emu' kernel option. 2280 The only reason this is a build-time option is to save ~14K from the 2281 final kernel image. 2282 2283config SYS_SUPPORTS_VPE_LOADER 2284 bool 2285 depends on SYS_SUPPORTS_MULTITHREADING 2286 help 2287 Indicates that the platform supports the VPE loader, and provides 2288 physical_memsize. 2289 2290config MIPS_VPE_LOADER 2291 bool "VPE loader support." 2292 depends on SYS_SUPPORTS_VPE_LOADER && MODULES 2293 select CPU_MIPSR2_IRQ_VI 2294 select CPU_MIPSR2_IRQ_EI 2295 select MIPS_MT 2296 help 2297 Includes a loader for loading an elf relocatable object 2298 onto another VPE and running it. 2299 2300config MIPS_VPE_LOADER_CMP 2301 bool 2302 default "y" 2303 depends on MIPS_VPE_LOADER && MIPS_CMP 2304 2305config MIPS_VPE_LOADER_MT 2306 bool 2307 default "y" 2308 depends on MIPS_VPE_LOADER && !MIPS_CMP 2309 2310config MIPS_VPE_LOADER_TOM 2311 bool "Load VPE program into memory hidden from linux" 2312 depends on MIPS_VPE_LOADER 2313 default y 2314 help 2315 The loader can use memory that is present but has been hidden from 2316 Linux using the kernel command line option "mem=xxMB". It's up to 2317 you to ensure the amount you put in the option and the space your 2318 program requires is less or equal to the amount physically present. 2319 2320config MIPS_VPE_APSP_API 2321 bool "Enable support for AP/SP API (RTLX)" 2322 depends on MIPS_VPE_LOADER 2323 2324config MIPS_VPE_APSP_API_CMP 2325 bool 2326 default "y" 2327 depends on MIPS_VPE_APSP_API && MIPS_CMP 2328 2329config MIPS_VPE_APSP_API_MT 2330 bool 2331 default "y" 2332 depends on MIPS_VPE_APSP_API && !MIPS_CMP 2333 2334config MIPS_CMP 2335 bool "MIPS CMP framework support (DEPRECATED)" 2336 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6 2337 select SMP 2338 select SYNC_R4K 2339 select SYS_SUPPORTS_SMP 2340 select WEAK_ORDERING 2341 default n 2342 help 2343 Select this if you are using a bootloader which implements the "CMP 2344 framework" protocol (ie. YAMON) and want your kernel to make use of 2345 its ability to start secondary CPUs. 2346 2347 Unless you have a specific need, you should use CONFIG_MIPS_CPS 2348 instead of this. 2349 2350config MIPS_CPS 2351 bool "MIPS Coherent Processing System support" 2352 depends on SYS_SUPPORTS_MIPS_CPS 2353 select MIPS_CM 2354 select MIPS_CPS_PM if HOTPLUG_CPU 2355 select SMP 2356 select SYNC_R4K if (CEVT_R4K || CSRC_R4K) 2357 select SYS_SUPPORTS_HOTPLUG_CPU 2358 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6 2359 select SYS_SUPPORTS_SMP 2360 select WEAK_ORDERING 2361 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU 2362 help 2363 Select this if you wish to run an SMP kernel across multiple cores 2364 within a MIPS Coherent Processing System. When this option is 2365 enabled the kernel will probe for other cores and boot them with 2366 no external assistance. It is safe to enable this when hardware 2367 support is unavailable. 2368 2369config MIPS_CPS_PM 2370 depends on MIPS_CPS 2371 bool 2372 2373config MIPS_CM 2374 bool 2375 select MIPS_CPC 2376 2377config MIPS_CPC 2378 bool 2379 2380config SB1_PASS_2_WORKAROUNDS 2381 bool 2382 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2) 2383 default y 2384 2385config SB1_PASS_2_1_WORKAROUNDS 2386 bool 2387 depends on CPU_SB1 && CPU_SB1_PASS_2 2388 default y 2389 2390choice 2391 prompt "SmartMIPS or microMIPS ASE support" 2392 2393config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS 2394 bool "None" 2395 help 2396 Select this if you want neither microMIPS nor SmartMIPS support 2397 2398config CPU_HAS_SMARTMIPS 2399 depends on SYS_SUPPORTS_SMARTMIPS 2400 bool "SmartMIPS" 2401 help 2402 SmartMIPS is a extension of the MIPS32 architecture aimed at 2403 increased security at both hardware and software level for 2404 smartcards. Enabling this option will allow proper use of the 2405 SmartMIPS instructions by Linux applications. However a kernel with 2406 this option will not work on a MIPS core without SmartMIPS core. If 2407 you don't know you probably don't have SmartMIPS and should say N 2408 here. 2409 2410config CPU_MICROMIPS 2411 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6 2412 bool "microMIPS" 2413 help 2414 When this option is enabled the kernel will be built using the 2415 microMIPS ISA 2416 2417endchoice 2418 2419config CPU_HAS_MSA 2420 bool "Support for the MIPS SIMD Architecture" 2421 depends on CPU_SUPPORTS_MSA 2422 depends on MIPS_FP_SUPPORT 2423 depends on 64BIT || MIPS_O32_FP64_SUPPORT 2424 help 2425 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers 2426 and a set of SIMD instructions to operate on them. When this option 2427 is enabled the kernel will support allocating & switching MSA 2428 vector register contexts. If you know that your kernel will only be 2429 running on CPUs which do not support MSA or that your userland will 2430 not be making use of it then you may wish to say N here to reduce 2431 the size & complexity of your kernel. 2432 2433 If unsure, say Y. 2434 2435config CPU_HAS_WB 2436 bool 2437 2438config XKS01 2439 bool 2440 2441config CPU_HAS_DIEI 2442 depends on !CPU_DIEI_BROKEN 2443 bool 2444 2445config CPU_DIEI_BROKEN 2446 bool 2447 2448config CPU_HAS_RIXI 2449 bool 2450 2451config CPU_NO_LOAD_STORE_LR 2452 bool 2453 help 2454 CPU lacks support for unaligned load and store instructions: 2455 LWL, LWR, SWL, SWR (Load/store word left/right). 2456 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit 2457 systems). 2458 2459# 2460# Vectored interrupt mode is an R2 feature 2461# 2462config CPU_MIPSR2_IRQ_VI 2463 bool 2464 2465# 2466# Extended interrupt mode is an R2 feature 2467# 2468config CPU_MIPSR2_IRQ_EI 2469 bool 2470 2471config CPU_HAS_SYNC 2472 bool 2473 depends on !CPU_R3000 2474 default y 2475 2476# 2477# CPU non-features 2478# 2479 2480# Work around the "daddi" and "daddiu" CPU errata: 2481# 2482# - The `daddi' instruction fails to trap on overflow. 2483# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 2484# erratum #23 2485# 2486# - The `daddiu' instruction can produce an incorrect result. 2487# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 2488# erratum #41 2489# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum 2490# #15 2491# "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7 2492# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5 2493config CPU_DADDI_WORKAROUNDS 2494 bool 2495 2496# Work around certain R4000 CPU errata (as implemented by GCC): 2497# 2498# - A double-word or a variable shift may give an incorrect result 2499# if executed immediately after starting an integer division: 2500# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 2501# erratum #28 2502# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum 2503# #19 2504# 2505# - A double-word or a variable shift may give an incorrect result 2506# if executed while an integer multiplication is in progress: 2507# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 2508# errata #16 & #28 2509# 2510# - An integer division may give an incorrect result if started in 2511# a delay slot of a taken branch or a jump: 2512# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0", 2513# erratum #52 2514config CPU_R4000_WORKAROUNDS 2515 bool 2516 select CPU_R4400_WORKAROUNDS 2517 2518# Work around certain R4400 CPU errata (as implemented by GCC): 2519# 2520# - A double-word or a variable shift may give an incorrect result 2521# if executed immediately after starting an integer division: 2522# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10 2523# "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4 2524config CPU_R4400_WORKAROUNDS 2525 bool 2526 2527config CPU_R4X00_BUGS64 2528 bool 2529 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1) 2530 2531config MIPS_ASID_SHIFT 2532 int 2533 default 6 if CPU_R3000 2534 default 0 2535 2536config MIPS_ASID_BITS 2537 int 2538 default 0 if MIPS_ASID_BITS_VARIABLE 2539 default 6 if CPU_R3000 2540 default 8 2541 2542config MIPS_ASID_BITS_VARIABLE 2543 bool 2544 2545config MIPS_CRC_SUPPORT 2546 bool 2547 2548# R4600 erratum. Due to the lack of errata information the exact 2549# technical details aren't known. I've experimentally found that disabling 2550# interrupts during indexed I-cache flushes seems to be sufficient to deal 2551# with the issue. 2552config WAR_R4600_V1_INDEX_ICACHEOP 2553 bool 2554 2555# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata: 2556# 2557# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D, 2558# Hit_Invalidate_D and Create_Dirty_Excl_D should only be 2559# executed if there is no other dcache activity. If the dcache is 2560# accessed for another instruction immediately preceding when these 2561# cache instructions are executing, it is possible that the dcache 2562# tag match outputs used by these cache instructions will be 2563# incorrect. These cache instructions should be preceded by at least 2564# four instructions that are not any kind of load or store 2565# instruction. 2566# 2567# This is not allowed: lw 2568# nop 2569# nop 2570# nop 2571# cache Hit_Writeback_Invalidate_D 2572# 2573# This is allowed: lw 2574# nop 2575# nop 2576# nop 2577# nop 2578# cache Hit_Writeback_Invalidate_D 2579config WAR_R4600_V1_HIT_CACHEOP 2580 bool 2581 2582# Writeback and invalidate the primary cache dcache before DMA. 2583# 2584# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D, 2585# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only 2586# operate correctly if the internal data cache refill buffer is empty. These 2587# CACHE instructions should be separated from any potential data cache miss 2588# by a load instruction to an uncached address to empty the response buffer." 2589# (Revision 2.0 device errata from IDT available on https://www.idt.com/ 2590# in .pdf format.) 2591config WAR_R4600_V2_HIT_CACHEOP 2592 bool 2593 2594# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for 2595# the line which this instruction itself exists, the following 2596# operation is not guaranteed." 2597# 2598# Workaround: do two phase flushing for Index_Invalidate_I 2599config WAR_TX49XX_ICACHE_INDEX_INV 2600 bool 2601 2602# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra 2603# opposes it being called that) where invalid instructions in the same 2604# I-cache line worth of instructions being fetched may case spurious 2605# exceptions. 2606config WAR_ICACHE_REFILLS 2607 bool 2608 2609# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that 2610# may cause ll / sc and lld / scd sequences to execute non-atomically. 2611config WAR_R10000_LLSC 2612 bool 2613 2614# 34K core erratum: "Problems Executing the TLBR Instruction" 2615config WAR_MIPS34K_MISSED_ITLB 2616 bool 2617 2618# 2619# - Highmem only makes sense for the 32-bit kernel. 2620# - The current highmem code will only work properly on physically indexed 2621# caches such as R3000, SB1, R7000 or those that look like they're virtually 2622# indexed such as R4000/R4400 SC and MC versions or R10000. So for the 2623# moment we protect the user and offer the highmem option only on machines 2624# where it's known to be safe. This will not offer highmem on a few systems 2625# such as MIPS32 and MIPS64 CPUs which may have virtual and physically 2626# indexed CPUs but we're playing safe. 2627# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we 2628# know they might have memory configurations that could make use of highmem 2629# support. 2630# 2631config HIGHMEM 2632 bool "High Memory Support" 2633 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA 2634 select KMAP_LOCAL 2635 2636config CPU_SUPPORTS_HIGHMEM 2637 bool 2638 2639config SYS_SUPPORTS_HIGHMEM 2640 bool 2641 2642config SYS_SUPPORTS_SMARTMIPS 2643 bool 2644 2645config SYS_SUPPORTS_MICROMIPS 2646 bool 2647 2648config SYS_SUPPORTS_MIPS16 2649 bool 2650 help 2651 This option must be set if a kernel might be executed on a MIPS16- 2652 enabled CPU even if MIPS16 is not actually being used. In other 2653 words, it makes the kernel MIPS16-tolerant. 2654 2655config CPU_SUPPORTS_MSA 2656 bool 2657 2658config ARCH_FLATMEM_ENABLE 2659 def_bool y 2660 depends on !NUMA && !CPU_LOONGSON2EF 2661 2662config ARCH_SPARSEMEM_ENABLE 2663 bool 2664 2665config NUMA 2666 bool "NUMA Support" 2667 depends on SYS_SUPPORTS_NUMA 2668 select SMP 2669 select HAVE_SETUP_PER_CPU_AREA 2670 select NEED_PER_CPU_EMBED_FIRST_CHUNK 2671 help 2672 Say Y to compile the kernel to support NUMA (Non-Uniform Memory 2673 Access). This option improves performance on systems with more 2674 than two nodes; on two node systems it is generally better to 2675 leave it disabled; on single node systems leave this option 2676 disabled. 2677 2678config SYS_SUPPORTS_NUMA 2679 bool 2680 2681config HAVE_ARCH_NODEDATA_EXTENSION 2682 bool 2683 2684config RELOCATABLE 2685 bool "Relocatable kernel" 2686 depends on SYS_SUPPORTS_RELOCATABLE 2687 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \ 2688 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \ 2689 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \ 2690 CPU_P5600 || CAVIUM_OCTEON_SOC || \ 2691 CPU_LOONGSON64 2692 help 2693 This builds a kernel image that retains relocation information 2694 so it can be loaded someplace besides the default 1MB. 2695 The relocations make the kernel binary about 15% larger, 2696 but are discarded at runtime 2697 2698config RELOCATION_TABLE_SIZE 2699 hex "Relocation table size" 2700 depends on RELOCATABLE 2701 range 0x0 0x01000000 2702 default "0x00200000" if CPU_LOONGSON64 2703 default "0x00100000" 2704 help 2705 A table of relocation data will be appended to the kernel binary 2706 and parsed at boot to fix up the relocated kernel. 2707 2708 This option allows the amount of space reserved for the table to be 2709 adjusted, although the default of 1Mb should be ok in most cases. 2710 2711 The build will fail and a valid size suggested if this is too small. 2712 2713 If unsure, leave at the default value. 2714 2715config RANDOMIZE_BASE 2716 bool "Randomize the address of the kernel image" 2717 depends on RELOCATABLE 2718 help 2719 Randomizes the physical and virtual address at which the 2720 kernel image is loaded, as a security feature that 2721 deters exploit attempts relying on knowledge of the location 2722 of kernel internals. 2723 2724 Entropy is generated using any coprocessor 0 registers available. 2725 2726 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET. 2727 2728 If unsure, say N. 2729 2730config RANDOMIZE_BASE_MAX_OFFSET 2731 hex "Maximum kASLR offset" if EXPERT 2732 depends on RANDOMIZE_BASE 2733 range 0x0 0x40000000 if EVA || 64BIT 2734 range 0x0 0x08000000 2735 default "0x01000000" 2736 help 2737 When kASLR is active, this provides the maximum offset that will 2738 be applied to the kernel image. It should be set according to the 2739 amount of physical RAM available in the target system minus 2740 PHYSICAL_START and must be a power of 2. 2741 2742 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with 2743 EVA or 64-bit. The default is 16Mb. 2744 2745config NODES_SHIFT 2746 int 2747 default "6" 2748 depends on NUMA 2749 2750config HW_PERF_EVENTS 2751 bool "Enable hardware performance counter support for perf events" 2752 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64) 2753 default y 2754 help 2755 Enable hardware performance counter support for perf events. If 2756 disabled, perf events will use software events only. 2757 2758config DMI 2759 bool "Enable DMI scanning" 2760 depends on MACH_LOONGSON64 2761 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK 2762 default y 2763 help 2764 Enabled scanning of DMI to identify machine quirks. Say Y 2765 here unless you have verified that your setup is not 2766 affected by entries in the DMI blacklist. Required by PNP 2767 BIOS code. 2768 2769config SMP 2770 bool "Multi-Processing support" 2771 depends on SYS_SUPPORTS_SMP 2772 help 2773 This enables support for systems with more than one CPU. If you have 2774 a system with only one CPU, say N. If you have a system with more 2775 than one CPU, say Y. 2776 2777 If you say N here, the kernel will run on uni- and multiprocessor 2778 machines, but will use only one CPU of a multiprocessor machine. If 2779 you say Y here, the kernel will run on many, but not all, 2780 uniprocessor machines. On a uniprocessor machine, the kernel 2781 will run faster if you say N here. 2782 2783 People using multiprocessor machines who say Y here should also say 2784 Y to "Enhanced Real Time Clock Support", below. 2785 2786 See also the SMP-HOWTO available at 2787 <https://www.tldp.org/docs.html#howto>. 2788 2789 If you don't know what to do here, say N. 2790 2791config HOTPLUG_CPU 2792 bool "Support for hot-pluggable CPUs" 2793 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU 2794 help 2795 Say Y here to allow turning CPUs off and on. CPUs can be 2796 controlled through /sys/devices/system/cpu. 2797 (Note: power management support will enable this option 2798 automatically on SMP systems. ) 2799 Say N if you want to disable CPU hotplug. 2800 2801config SMP_UP 2802 bool 2803 2804config SYS_SUPPORTS_MIPS_CMP 2805 bool 2806 2807config SYS_SUPPORTS_MIPS_CPS 2808 bool 2809 2810config SYS_SUPPORTS_SMP 2811 bool 2812 2813config NR_CPUS_DEFAULT_4 2814 bool 2815 2816config NR_CPUS_DEFAULT_8 2817 bool 2818 2819config NR_CPUS_DEFAULT_16 2820 bool 2821 2822config NR_CPUS_DEFAULT_32 2823 bool 2824 2825config NR_CPUS_DEFAULT_64 2826 bool 2827 2828config NR_CPUS 2829 int "Maximum number of CPUs (2-256)" 2830 range 2 256 2831 depends on SMP 2832 default "4" if NR_CPUS_DEFAULT_4 2833 default "8" if NR_CPUS_DEFAULT_8 2834 default "16" if NR_CPUS_DEFAULT_16 2835 default "32" if NR_CPUS_DEFAULT_32 2836 default "64" if NR_CPUS_DEFAULT_64 2837 help 2838 This allows you to specify the maximum number of CPUs which this 2839 kernel will support. The maximum supported value is 32 for 32-bit 2840 kernel and 64 for 64-bit kernels; the minimum value which makes 2841 sense is 1 for Qemu (useful only for kernel debugging purposes) 2842 and 2 for all others. 2843 2844 This is purely to save memory - each supported CPU adds 2845 approximately eight kilobytes to the kernel image. For best 2846 performance should round up your number of processors to the next 2847 power of two. 2848 2849config MIPS_PERF_SHARED_TC_COUNTERS 2850 bool 2851 2852config MIPS_NR_CPU_NR_MAP_1024 2853 bool 2854 2855config MIPS_NR_CPU_NR_MAP 2856 int 2857 depends on SMP 2858 default 1024 if MIPS_NR_CPU_NR_MAP_1024 2859 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024 2860 2861# 2862# Timer Interrupt Frequency Configuration 2863# 2864 2865choice 2866 prompt "Timer frequency" 2867 default HZ_250 2868 help 2869 Allows the configuration of the timer frequency. 2870 2871 config HZ_24 2872 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ 2873 2874 config HZ_48 2875 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ 2876 2877 config HZ_100 2878 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ 2879 2880 config HZ_128 2881 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ 2882 2883 config HZ_250 2884 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ 2885 2886 config HZ_256 2887 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ 2888 2889 config HZ_1000 2890 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ 2891 2892 config HZ_1024 2893 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ 2894 2895endchoice 2896 2897config SYS_SUPPORTS_24HZ 2898 bool 2899 2900config SYS_SUPPORTS_48HZ 2901 bool 2902 2903config SYS_SUPPORTS_100HZ 2904 bool 2905 2906config SYS_SUPPORTS_128HZ 2907 bool 2908 2909config SYS_SUPPORTS_250HZ 2910 bool 2911 2912config SYS_SUPPORTS_256HZ 2913 bool 2914 2915config SYS_SUPPORTS_1000HZ 2916 bool 2917 2918config SYS_SUPPORTS_1024HZ 2919 bool 2920 2921config SYS_SUPPORTS_ARBIT_HZ 2922 bool 2923 default y if !SYS_SUPPORTS_24HZ && \ 2924 !SYS_SUPPORTS_48HZ && \ 2925 !SYS_SUPPORTS_100HZ && \ 2926 !SYS_SUPPORTS_128HZ && \ 2927 !SYS_SUPPORTS_250HZ && \ 2928 !SYS_SUPPORTS_256HZ && \ 2929 !SYS_SUPPORTS_1000HZ && \ 2930 !SYS_SUPPORTS_1024HZ 2931 2932config HZ 2933 int 2934 default 24 if HZ_24 2935 default 48 if HZ_48 2936 default 100 if HZ_100 2937 default 128 if HZ_128 2938 default 250 if HZ_250 2939 default 256 if HZ_256 2940 default 1000 if HZ_1000 2941 default 1024 if HZ_1024 2942 2943config SCHED_HRTICK 2944 def_bool HIGH_RES_TIMERS 2945 2946config KEXEC 2947 bool "Kexec system call" 2948 select KEXEC_CORE 2949 help 2950 kexec is a system call that implements the ability to shutdown your 2951 current kernel, and to start another kernel. It is like a reboot 2952 but it is independent of the system firmware. And like a reboot 2953 you can start any kernel with it, not just Linux. 2954 2955 The name comes from the similarity to the exec system call. 2956 2957 It is an ongoing process to be certain the hardware in a machine 2958 is properly shutdown, so do not be surprised if this code does not 2959 initially work for you. As of this writing the exact hardware 2960 interface is strongly in flux, so no good recommendation can be 2961 made. 2962 2963config CRASH_DUMP 2964 bool "Kernel crash dumps" 2965 help 2966 Generate crash dump after being started by kexec. 2967 This should be normally only set in special crash dump kernels 2968 which are loaded in the main kernel with kexec-tools into 2969 a specially reserved region and then later executed after 2970 a crash by kdump/kexec. The crash dump kernel must be compiled 2971 to a memory address not used by the main kernel or firmware using 2972 PHYSICAL_START. 2973 2974config PHYSICAL_START 2975 hex "Physical address where the kernel is loaded" 2976 default "0xffffffff84000000" 2977 depends on CRASH_DUMP 2978 help 2979 This gives the CKSEG0 or KSEG0 address where the kernel is loaded. 2980 If you plan to use kernel for capturing the crash dump change 2981 this value to start of the reserved region (the "X" value as 2982 specified in the "crashkernel=YM@XM" command line boot parameter 2983 passed to the panic-ed kernel). 2984 2985config MIPS_O32_FP64_SUPPORT 2986 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6 2987 depends on 32BIT || MIPS32_O32 2988 help 2989 When this is enabled, the kernel will support use of 64-bit floating 2990 point registers with binaries using the O32 ABI along with the 2991 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On 2992 32-bit MIPS systems this support is at the cost of increasing the 2993 size and complexity of the compiled FPU emulator. Thus if you are 2994 running a MIPS32 system and know that none of your userland binaries 2995 will require 64-bit floating point, you may wish to reduce the size 2996 of your kernel & potentially improve FP emulation performance by 2997 saying N here. 2998 2999 Although binutils currently supports use of this flag the details 3000 concerning its effect upon the O32 ABI in userland are still being 3001 worked on. In order to avoid userland becoming dependent upon current 3002 behaviour before the details have been finalised, this option should 3003 be considered experimental and only enabled by those working upon 3004 said details. 3005 3006 If unsure, say N. 3007 3008config USE_OF 3009 bool 3010 select OF 3011 select OF_EARLY_FLATTREE 3012 select IRQ_DOMAIN 3013 3014config UHI_BOOT 3015 bool 3016 3017config BUILTIN_DTB 3018 bool 3019 3020choice 3021 prompt "Kernel appended dtb support" if USE_OF 3022 default MIPS_NO_APPENDED_DTB 3023 3024 config MIPS_NO_APPENDED_DTB 3025 bool "None" 3026 help 3027 Do not enable appended dtb support. 3028 3029 config MIPS_ELF_APPENDED_DTB 3030 bool "vmlinux" 3031 help 3032 With this option, the boot code will look for a device tree binary 3033 DTB) included in the vmlinux ELF section .appended_dtb. By default 3034 it is empty and the DTB can be appended using binutils command 3035 objcopy: 3036 3037 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux 3038 3039 This is meant as a backward compatibility convenience for those 3040 systems with a bootloader that can't be upgraded to accommodate 3041 the documented boot protocol using a device tree. 3042 3043 config MIPS_RAW_APPENDED_DTB 3044 bool "vmlinux.bin or vmlinuz.bin" 3045 help 3046 With this option, the boot code will look for a device tree binary 3047 DTB) appended to raw vmlinux.bin or vmlinuz.bin. 3048 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb). 3049 3050 This is meant as a backward compatibility convenience for those 3051 systems with a bootloader that can't be upgraded to accommodate 3052 the documented boot protocol using a device tree. 3053 3054 Beware that there is very little in terms of protection against 3055 this option being confused by leftover garbage in memory that might 3056 look like a DTB header after a reboot if no actual DTB is appended 3057 to vmlinux.bin. Do not leave this option active in a production kernel 3058 if you don't intend to always append a DTB. 3059endchoice 3060 3061choice 3062 prompt "Kernel command line type" if !CMDLINE_OVERRIDE 3063 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ 3064 !MACH_LOONGSON64 && !MIPS_MALTA && \ 3065 !CAVIUM_OCTEON_SOC 3066 default MIPS_CMDLINE_FROM_BOOTLOADER 3067 3068 config MIPS_CMDLINE_FROM_DTB 3069 depends on USE_OF 3070 bool "Dtb kernel arguments if available" 3071 3072 config MIPS_CMDLINE_DTB_EXTEND 3073 depends on USE_OF 3074 bool "Extend dtb kernel arguments with bootloader arguments" 3075 3076 config MIPS_CMDLINE_FROM_BOOTLOADER 3077 bool "Bootloader kernel arguments if available" 3078 3079 config MIPS_CMDLINE_BUILTIN_EXTEND 3080 depends on CMDLINE_BOOL 3081 bool "Extend builtin kernel arguments with bootloader arguments" 3082endchoice 3083 3084endmenu 3085 3086config LOCKDEP_SUPPORT 3087 bool 3088 default y 3089 3090config STACKTRACE_SUPPORT 3091 bool 3092 default y 3093 3094config PGTABLE_LEVELS 3095 int 3096 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48 3097 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48) 3098 default 2 3099 3100config MIPS_AUTO_PFN_OFFSET 3101 bool 3102 3103menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" 3104 3105config PCI_DRIVERS_GENERIC 3106 select PCI_DOMAINS_GENERIC if PCI 3107 bool 3108 3109config PCI_DRIVERS_LEGACY 3110 def_bool !PCI_DRIVERS_GENERIC 3111 select NO_GENERIC_PCI_IOPORT_MAP 3112 select PCI_DOMAINS if PCI 3113 3114# 3115# ISA support is now enabled via select. Too many systems still have the one 3116# or other ISA chip on the board that users don't know about so don't expect 3117# users to choose the right thing ... 3118# 3119config ISA 3120 bool 3121 3122config TC 3123 bool "TURBOchannel support" 3124 depends on MACH_DECSTATION 3125 help 3126 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS 3127 processors. TURBOchannel programming specifications are available 3128 at: 3129 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/> 3130 and: 3131 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/> 3132 Linux driver support status is documented at: 3133 <http://www.linux-mips.org/wiki/DECstation> 3134 3135config MMU 3136 bool 3137 default y 3138 3139config ARCH_MMAP_RND_BITS_MIN 3140 default 12 if 64BIT 3141 default 8 3142 3143config ARCH_MMAP_RND_BITS_MAX 3144 default 18 if 64BIT 3145 default 15 3146 3147config ARCH_MMAP_RND_COMPAT_BITS_MIN 3148 default 8 3149 3150config ARCH_MMAP_RND_COMPAT_BITS_MAX 3151 default 15 3152 3153config I8253 3154 bool 3155 select CLKSRC_I8253 3156 select CLKEVT_I8253 3157 select MIPS_EXTERNAL_TIMER 3158endmenu 3159 3160config TRAD_SIGNALS 3161 bool 3162 3163config MIPS32_COMPAT 3164 bool 3165 3166config COMPAT 3167 bool 3168 3169config MIPS32_O32 3170 bool "Kernel support for o32 binaries" 3171 depends on 64BIT 3172 select ARCH_WANT_OLD_COMPAT_IPC 3173 select COMPAT 3174 select MIPS32_COMPAT 3175 help 3176 Select this option if you want to run o32 binaries. These are pure 3177 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of 3178 existing binaries are in this format. 3179 3180 If unsure, say Y. 3181 3182config MIPS32_N32 3183 bool "Kernel support for n32 binaries" 3184 depends on 64BIT 3185 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION 3186 select COMPAT 3187 select MIPS32_COMPAT 3188 help 3189 Select this option if you want to run n32 binaries. These are 3190 64-bit binaries using 32-bit quantities for addressing and certain 3191 data that would normally be 64-bit. They are used in special 3192 cases. 3193 3194 If unsure, say N. 3195 3196config CC_HAS_MNO_BRANCH_LIKELY 3197 def_bool y 3198 depends on $(cc-option,-mno-branch-likely) 3199 3200# https://github.com/llvm/llvm-project/issues/61045 3201config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH 3202 def_bool y if CC_IS_CLANG 3203 3204menu "Power management options" 3205 3206config ARCH_HIBERNATION_POSSIBLE 3207 def_bool y 3208 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3209 3210config ARCH_SUSPEND_POSSIBLE 3211 def_bool y 3212 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP 3213 3214source "kernel/power/Kconfig" 3215 3216endmenu 3217 3218config MIPS_EXTERNAL_TIMER 3219 bool 3220 3221menu "CPU Power Management" 3222 3223if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 3224source "drivers/cpufreq/Kconfig" 3225endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER 3226 3227source "drivers/cpuidle/Kconfig" 3228 3229endmenu 3230 3231source "arch/mips/kvm/Kconfig" 3232 3233source "arch/mips/vdso/Kconfig" 3234