1/* SPDX-License-Identifier: GPL-2.0 */ 2#include <linux/linkage.h> 3 4/* 5* modulo operation for 32 bit integers. 6* Input : op1 in Reg r5 7* op2 in Reg r6 8* Output: op1 mod op2 in Reg r3 9*/ 10 11 .text 12 .globl __modsi3 13 .type __modsi3, @function 14 .ent __modsi3 15 16__modsi3: 17 .frame r1, 0, r15 18 19 addik r1, r1, -16 20 swi r28, r1, 0 21 swi r29, r1, 4 22 swi r30, r1, 8 23 swi r31, r1, 12 24 25 beqi r6, div_by_zero /* div_by_zero division error */ 26 beqi r5, result_is_zero /* result is zero */ 27 bgeid r5, r5_pos 28 /* get the sign of the result [ depends only on the first arg] */ 29 add r28, r5, r0 30 rsubi r5, r5, 0 /* make r5 positive */ 31r5_pos: 32 bgei r6, r6_pos 33 rsubi r6, r6, 0 /* make r6 positive */ 34r6_pos: 35 addik r3, r0, 0 /* clear mod */ 36 addik r30, r0, 0 /* clear div */ 37 addik r29, r0, 32 /* initialize the loop count */ 38/* first part try to find the first '1' in the r5 */ 39div1: 40 add r5, r5, r5 /* left shift logical r5 */ 41 bgeid r5, div1 42 addik r29, r29, -1 43div2: 44 /* left shift logical r5 get the '1' into the carry */ 45 add r5, r5, r5 46 addc r3, r3, r3 /* move that bit into the mod register */ 47 rsub r31, r6, r3 /* try to subtract (r30 a r6) */ 48 blti r31, mod_too_small 49 /* move the r31 to mod since the result was positive */ 50 or r3, r0, r31 51 addik r30, r30, 1 52mod_too_small: 53 addik r29, r29, -1 54 beqi r29, loop_end 55 add r30, r30, r30 /* shift in the '1' into div */ 56 bri div2 /* div2 */ 57loop_end: 58 bgei r28, return_here 59 brid return_here 60 rsubi r3, r3, 0 /* negate the result */ 61div_by_zero: 62result_is_zero: 63 or r3, r0, r0 /* set result to 0 [both mod as well as div are 0] */ 64return_here: 65/* restore values of csrs and that of r3 and the divisor and the dividend */ 66 lwi r28, r1, 0 67 lwi r29, r1, 4 68 lwi r30, r1, 8 69 lwi r31, r1, 12 70 rtsd r15, 8 71 addik r1, r1, 16 72 73.size __modsi3, . - __modsi3 74.end __modsi3 75