1b2441318SGreg Kroah-Hartman/* SPDX-License-Identifier: GPL-2.0 */ 24e07dba7SMichal Simek#include <linux/linkage.h> 34e07dba7SMichal Simek 44e07dba7SMichal Simek/* 54e07dba7SMichal Simek* modulo operation for 32 bit integers. 64e07dba7SMichal Simek* Input : op1 in Reg r5 74e07dba7SMichal Simek* op2 in Reg r6 84e07dba7SMichal Simek* Output: op1 mod op2 in Reg r3 94e07dba7SMichal Simek*/ 104e07dba7SMichal Simek 114e07dba7SMichal Simek .text 124e07dba7SMichal Simek .globl __modsi3 134e07dba7SMichal Simek .type __modsi3, @function 144e07dba7SMichal Simek .ent __modsi3 154e07dba7SMichal Simek 164e07dba7SMichal Simek__modsi3: 174e07dba7SMichal Simek .frame r1, 0, r15 184e07dba7SMichal Simek 194e07dba7SMichal Simek addik r1, r1, -16 204e07dba7SMichal Simek swi r28, r1, 0 214e07dba7SMichal Simek swi r29, r1, 4 224e07dba7SMichal Simek swi r30, r1, 8 234e07dba7SMichal Simek swi r31, r1, 12 244e07dba7SMichal Simek 254e07dba7SMichal Simek beqi r6, div_by_zero /* div_by_zero division error */ 264e07dba7SMichal Simek beqi r5, result_is_zero /* result is zero */ 274e07dba7SMichal Simek bgeid r5, r5_pos 284e07dba7SMichal Simek /* get the sign of the result [ depends only on the first arg] */ 294e07dba7SMichal Simek add r28, r5, r0 304e07dba7SMichal Simek rsubi r5, r5, 0 /* make r5 positive */ 314e07dba7SMichal Simekr5_pos: 324e07dba7SMichal Simek bgei r6, r6_pos 334e07dba7SMichal Simek rsubi r6, r6, 0 /* make r6 positive */ 344e07dba7SMichal Simekr6_pos: 354e07dba7SMichal Simek addik r3, r0, 0 /* clear mod */ 364e07dba7SMichal Simek addik r30, r0, 0 /* clear div */ 374e07dba7SMichal Simek addik r29, r0, 32 /* initialize the loop count */ 384e07dba7SMichal Simek/* first part try to find the first '1' in the r5 */ 394e07dba7SMichal Simekdiv1: 404e07dba7SMichal Simek add r5, r5, r5 /* left shift logical r5 */ 414e07dba7SMichal Simek bgeid r5, div1 424e07dba7SMichal Simek addik r29, r29, -1 434e07dba7SMichal Simekdiv2: 444e07dba7SMichal Simek /* left shift logical r5 get the '1' into the carry */ 454e07dba7SMichal Simek add r5, r5, r5 464e07dba7SMichal Simek addc r3, r3, r3 /* move that bit into the mod register */ 474e07dba7SMichal Simek rsub r31, r6, r3 /* try to subtract (r30 a r6) */ 484e07dba7SMichal Simek blti r31, mod_too_small 494e07dba7SMichal Simek /* move the r31 to mod since the result was positive */ 504e07dba7SMichal Simek or r3, r0, r31 514e07dba7SMichal Simek addik r30, r30, 1 524e07dba7SMichal Simekmod_too_small: 534e07dba7SMichal Simek addik r29, r29, -1 544e07dba7SMichal Simek beqi r29, loop_end 554e07dba7SMichal Simek add r30, r30, r30 /* shift in the '1' into div */ 564e07dba7SMichal Simek bri div2 /* div2 */ 574e07dba7SMichal Simekloop_end: 584e07dba7SMichal Simek bgei r28, return_here 594e07dba7SMichal Simek brid return_here 604e07dba7SMichal Simek rsubi r3, r3, 0 /* negate the result */ 614e07dba7SMichal Simekdiv_by_zero: 624e07dba7SMichal Simekresult_is_zero: 634e07dba7SMichal Simek or r3, r0, r0 /* set result to 0 [both mod as well as div are 0] */ 644e07dba7SMichal Simekreturn_here: 654e07dba7SMichal Simek/* restore values of csrs and that of r3 and the divisor and the dividend */ 664e07dba7SMichal Simek lwi r28, r1, 0 674e07dba7SMichal Simek lwi r29, r1, 4 684e07dba7SMichal Simek lwi r30, r1, 8 694e07dba7SMichal Simek lwi r31, r1, 12 704e07dba7SMichal Simek rtsd r15, 8 714e07dba7SMichal Simek addik r1, r1, 16 724e07dba7SMichal Simek 734e07dba7SMichal Simek.size __modsi3, . - __modsi3 744e07dba7SMichal Simek.end __modsi3 75