1 /* 2 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> 3 * Copyright (C) 2008-2009 PetaLogix 4 * Copyright (C) 2006 Atmark Techno, Inc. 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10 11 #include <linux/export.h> 12 #include <linux/sched.h> 13 #include <linux/pm.h> 14 #include <linux/tick.h> 15 #include <linux/bitops.h> 16 #include <linux/ptrace.h> 17 #include <asm/pgalloc.h> 18 #include <linux/uaccess.h> /* for USER_DS macros */ 19 #include <asm/cacheflush.h> 20 21 void show_regs(struct pt_regs *regs) 22 { 23 pr_info(" Registers dump: mode=%X\r\n", regs->pt_mode); 24 pr_info(" r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n", 25 regs->r1, regs->r2, regs->r3, regs->r4); 26 pr_info(" r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n", 27 regs->r5, regs->r6, regs->r7, regs->r8); 28 pr_info(" r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n", 29 regs->r9, regs->r10, regs->r11, regs->r12); 30 pr_info(" r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n", 31 regs->r13, regs->r14, regs->r15, regs->r16); 32 pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n", 33 regs->r17, regs->r18, regs->r19, regs->r20); 34 pr_info(" r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n", 35 regs->r21, regs->r22, regs->r23, regs->r24); 36 pr_info(" r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n", 37 regs->r25, regs->r26, regs->r27, regs->r28); 38 pr_info(" r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n", 39 regs->r29, regs->r30, regs->r31, regs->pc); 40 pr_info(" msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n", 41 regs->msr, regs->ear, regs->esr, regs->fsr); 42 } 43 44 void (*pm_power_off)(void) = NULL; 45 EXPORT_SYMBOL(pm_power_off); 46 47 static int hlt_counter = 1; 48 49 void disable_hlt(void) 50 { 51 hlt_counter++; 52 } 53 EXPORT_SYMBOL(disable_hlt); 54 55 void enable_hlt(void) 56 { 57 hlt_counter--; 58 } 59 EXPORT_SYMBOL(enable_hlt); 60 61 static int __init nohlt_setup(char *__unused) 62 { 63 hlt_counter = 1; 64 return 1; 65 } 66 __setup("nohlt", nohlt_setup); 67 68 static int __init hlt_setup(char *__unused) 69 { 70 hlt_counter = 0; 71 return 1; 72 } 73 __setup("hlt", hlt_setup); 74 75 void default_idle(void) 76 { 77 if (likely(hlt_counter)) { 78 local_irq_disable(); 79 stop_critical_timings(); 80 cpu_relax(); 81 start_critical_timings(); 82 local_irq_enable(); 83 } else { 84 clear_thread_flag(TIF_POLLING_NRFLAG); 85 smp_mb__after_clear_bit(); 86 local_irq_disable(); 87 while (!need_resched()) 88 cpu_sleep(); 89 local_irq_enable(); 90 set_thread_flag(TIF_POLLING_NRFLAG); 91 } 92 } 93 94 void cpu_idle(void) 95 { 96 set_thread_flag(TIF_POLLING_NRFLAG); 97 98 /* endless idle loop with no priority at all */ 99 while (1) { 100 tick_nohz_idle_enter(); 101 rcu_idle_enter(); 102 while (!need_resched()) 103 default_idle(); 104 rcu_idle_exit(); 105 tick_nohz_idle_exit(); 106 107 schedule_preempt_disabled(); 108 check_pgt_cache(); 109 } 110 } 111 112 void flush_thread(void) 113 { 114 } 115 116 int copy_thread(unsigned long clone_flags, unsigned long usp, 117 unsigned long arg, struct task_struct *p) 118 { 119 struct pt_regs *childregs = task_pt_regs(p); 120 struct thread_info *ti = task_thread_info(p); 121 122 if (unlikely(p->flags & PF_KTHREAD)) { 123 /* if we're creating a new kernel thread then just zeroing all 124 * the registers. That's OK for a brand new thread.*/ 125 memset(childregs, 0, sizeof(struct pt_regs)); 126 memset(&ti->cpu_context, 0, sizeof(struct cpu_context)); 127 ti->cpu_context.r1 = (unsigned long)childregs; 128 ti->cpu_context.r20 = (unsigned long)usp; /* fn */ 129 ti->cpu_context.r19 = (unsigned long)arg; 130 childregs->pt_mode = 1; 131 local_save_flags(childregs->msr); 132 #ifdef CONFIG_MMU 133 ti->cpu_context.msr = childregs->msr & ~MSR_IE; 134 #endif 135 ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8; 136 return 0; 137 } 138 *childregs = *current_pt_regs(); 139 if (usp) 140 childregs->r1 = usp; 141 142 memset(&ti->cpu_context, 0, sizeof(struct cpu_context)); 143 ti->cpu_context.r1 = (unsigned long)childregs; 144 #ifndef CONFIG_MMU 145 ti->cpu_context.msr = (unsigned long)childregs->msr; 146 #else 147 childregs->msr |= MSR_UMS; 148 149 /* we should consider the fact that childregs is a copy of the parent 150 * regs which were saved immediately after entering the kernel state 151 * before enabling VM. This MSR will be restored in switch_to and 152 * RETURN() and we want to have the right machine state there 153 * specifically this state must have INTs disabled before and enabled 154 * after performing rtbd 155 * compose the right MSR for RETURN(). It will work for switch_to also 156 * excepting for VM and UMS 157 * don't touch UMS , CARRY and cache bits 158 * right now MSR is a copy of parent one */ 159 childregs->msr &= ~MSR_EIP; 160 childregs->msr |= MSR_IE; 161 childregs->msr &= ~MSR_VM; 162 childregs->msr |= MSR_VMS; 163 childregs->msr |= MSR_EE; /* exceptions will be enabled*/ 164 165 ti->cpu_context.msr = (childregs->msr|MSR_VM); 166 ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */ 167 ti->cpu_context.msr &= ~MSR_IE; 168 #endif 169 ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8; 170 171 /* 172 * r21 is the thread reg, r10 is 6th arg to clone 173 * which contains TLS area 174 */ 175 if (clone_flags & CLONE_SETTLS) 176 childregs->r21 = childregs->r10; 177 178 return 0; 179 } 180 181 #ifndef CONFIG_MMU 182 /* 183 * Return saved PC of a blocked thread. 184 */ 185 unsigned long thread_saved_pc(struct task_struct *tsk) 186 { 187 struct cpu_context *ctx = 188 &(((struct thread_info *)(tsk->stack))->cpu_context); 189 190 /* Check whether the thread is blocked in resume() */ 191 if (in_sched_functions(ctx->r15)) 192 return (unsigned long)ctx->r15; 193 else 194 return ctx->r14; 195 } 196 #endif 197 198 unsigned long get_wchan(struct task_struct *p) 199 { 200 /* TBD (used by procfs) */ 201 return 0; 202 } 203 204 /* Set up a thread for executing a new program */ 205 void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp) 206 { 207 regs->pc = pc; 208 regs->r1 = usp; 209 regs->pt_mode = 0; 210 #ifdef CONFIG_MMU 211 regs->msr |= MSR_UMS; 212 regs->msr &= ~MSR_VM; 213 #endif 214 } 215 216 #ifdef CONFIG_MMU 217 #include <linux/elfcore.h> 218 /* 219 * Set up a thread for executing a new program 220 */ 221 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs) 222 { 223 return 0; /* MicroBlaze has no separate FPU registers */ 224 } 225 #endif /* CONFIG_MMU */ 226