xref: /openbmc/linux/arch/microblaze/kernel/process.c (revision 94cdda6b)
1 /*
2  * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
3  * Copyright (C) 2008-2009 PetaLogix
4  * Copyright (C) 2006 Atmark Techno, Inc.
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License. See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10 
11 #include <linux/cpu.h>
12 #include <linux/export.h>
13 #include <linux/sched.h>
14 #include <linux/pm.h>
15 #include <linux/tick.h>
16 #include <linux/bitops.h>
17 #include <linux/ptrace.h>
18 #include <asm/pgalloc.h>
19 #include <linux/uaccess.h> /* for USER_DS macros */
20 #include <asm/cacheflush.h>
21 
22 void show_regs(struct pt_regs *regs)
23 {
24 	show_regs_print_info(KERN_INFO);
25 
26 	pr_info(" Registers dump: mode=%X\r\n", regs->pt_mode);
27 	pr_info(" r1=%08lX, r2=%08lX, r3=%08lX, r4=%08lX\n",
28 				regs->r1, regs->r2, regs->r3, regs->r4);
29 	pr_info(" r5=%08lX, r6=%08lX, r7=%08lX, r8=%08lX\n",
30 				regs->r5, regs->r6, regs->r7, regs->r8);
31 	pr_info(" r9=%08lX, r10=%08lX, r11=%08lX, r12=%08lX\n",
32 				regs->r9, regs->r10, regs->r11, regs->r12);
33 	pr_info(" r13=%08lX, r14=%08lX, r15=%08lX, r16=%08lX\n",
34 				regs->r13, regs->r14, regs->r15, regs->r16);
35 	pr_info(" r17=%08lX, r18=%08lX, r19=%08lX, r20=%08lX\n",
36 				regs->r17, regs->r18, regs->r19, regs->r20);
37 	pr_info(" r21=%08lX, r22=%08lX, r23=%08lX, r24=%08lX\n",
38 				regs->r21, regs->r22, regs->r23, regs->r24);
39 	pr_info(" r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n",
40 				regs->r25, regs->r26, regs->r27, regs->r28);
41 	pr_info(" r29=%08lX, r30=%08lX, r31=%08lX, rPC=%08lX\n",
42 				regs->r29, regs->r30, regs->r31, regs->pc);
43 	pr_info(" msr=%08lX, ear=%08lX, esr=%08lX, fsr=%08lX\n",
44 				regs->msr, regs->ear, regs->esr, regs->fsr);
45 }
46 
47 void (*pm_power_off)(void) = NULL;
48 EXPORT_SYMBOL(pm_power_off);
49 
50 void flush_thread(void)
51 {
52 }
53 
54 int copy_thread(unsigned long clone_flags, unsigned long usp,
55 		unsigned long arg, struct task_struct *p)
56 {
57 	struct pt_regs *childregs = task_pt_regs(p);
58 	struct thread_info *ti = task_thread_info(p);
59 
60 	if (unlikely(p->flags & PF_KTHREAD)) {
61 		/* if we're creating a new kernel thread then just zeroing all
62 		 * the registers. That's OK for a brand new thread.*/
63 		memset(childregs, 0, sizeof(struct pt_regs));
64 		memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
65 		ti->cpu_context.r1  = (unsigned long)childregs;
66 		ti->cpu_context.r20 = (unsigned long)usp; /* fn */
67 		ti->cpu_context.r19 = (unsigned long)arg;
68 		childregs->pt_mode = 1;
69 		local_save_flags(childregs->msr);
70 #ifdef CONFIG_MMU
71 		ti->cpu_context.msr = childregs->msr & ~MSR_IE;
72 #endif
73 		ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
74 		return 0;
75 	}
76 	*childregs = *current_pt_regs();
77 	if (usp)
78 		childregs->r1 = usp;
79 
80 	memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
81 	ti->cpu_context.r1 = (unsigned long)childregs;
82 #ifndef CONFIG_MMU
83 	ti->cpu_context.msr = (unsigned long)childregs->msr;
84 #else
85 	childregs->msr |= MSR_UMS;
86 
87 	/* we should consider the fact that childregs is a copy of the parent
88 	 * regs which were saved immediately after entering the kernel state
89 	 * before enabling VM. This MSR will be restored in switch_to and
90 	 * RETURN() and we want to have the right machine state there
91 	 * specifically this state must have INTs disabled before and enabled
92 	 * after performing rtbd
93 	 * compose the right MSR for RETURN(). It will work for switch_to also
94 	 * excepting for VM and UMS
95 	 * don't touch UMS , CARRY and cache bits
96 	 * right now MSR is a copy of parent one */
97 	childregs->msr &= ~MSR_EIP;
98 	childregs->msr |= MSR_IE;
99 	childregs->msr &= ~MSR_VM;
100 	childregs->msr |= MSR_VMS;
101 	childregs->msr |= MSR_EE; /* exceptions will be enabled*/
102 
103 	ti->cpu_context.msr = (childregs->msr|MSR_VM);
104 	ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
105 	ti->cpu_context.msr &= ~MSR_IE;
106 #endif
107 	ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
108 
109 	/*
110 	 *  r21 is the thread reg, r10 is 6th arg to clone
111 	 *  which contains TLS area
112 	 */
113 	if (clone_flags & CLONE_SETTLS)
114 		childregs->r21 = childregs->r10;
115 
116 	return 0;
117 }
118 
119 #ifndef CONFIG_MMU
120 /*
121  * Return saved PC of a blocked thread.
122  */
123 unsigned long thread_saved_pc(struct task_struct *tsk)
124 {
125 	struct cpu_context *ctx =
126 		&(((struct thread_info *)(tsk->stack))->cpu_context);
127 
128 	/* Check whether the thread is blocked in resume() */
129 	if (in_sched_functions(ctx->r15))
130 		return (unsigned long)ctx->r15;
131 	else
132 		return ctx->r14;
133 }
134 #endif
135 
136 unsigned long get_wchan(struct task_struct *p)
137 {
138 /* TBD (used by procfs) */
139 	return 0;
140 }
141 
142 /* Set up a thread for executing a new program */
143 void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
144 {
145 	regs->pc = pc;
146 	regs->r1 = usp;
147 	regs->pt_mode = 0;
148 #ifdef CONFIG_MMU
149 	regs->msr |= MSR_UMS;
150 	regs->msr &= ~MSR_VM;
151 #endif
152 }
153 
154 #ifdef CONFIG_MMU
155 #include <linux/elfcore.h>
156 /*
157  * Set up a thread for executing a new program
158  */
159 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
160 {
161 	return 0; /* MicroBlaze has no separate FPU registers */
162 }
163 #endif /* CONFIG_MMU */
164 
165 void arch_cpu_idle(void)
166 {
167        local_irq_enable();
168 }
169