xref: /openbmc/linux/arch/microblaze/kernel/entry.S (revision b6bec26c)
1/*
2 * Low-level system-call handling, trap handlers and context-switching
3 *
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008-2009 PetaLogix
6 * Copyright (C) 2003		John Williams <jwilliams@itee.uq.edu.au>
7 * Copyright (C) 2001,2002	NEC Corporation
8 * Copyright (C) 2001,2002	Miles Bader <miles@gnu.org>
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
13 *
14 * Written by Miles Bader <miles@gnu.org>
15 * Heavily modified by John Williams for Microblaze
16 */
17
18#include <linux/sys.h>
19#include <linux/linkage.h>
20
21#include <asm/entry.h>
22#include <asm/current.h>
23#include <asm/processor.h>
24#include <asm/exceptions.h>
25#include <asm/asm-offsets.h>
26#include <asm/thread_info.h>
27
28#include <asm/page.h>
29#include <asm/unistd.h>
30
31#include <linux/errno.h>
32#include <asm/signal.h>
33
34#undef DEBUG
35
36#ifdef DEBUG
37/* Create space for syscalls counting. */
38.section .data
39.global syscall_debug_table
40.align 4
41syscall_debug_table:
42	.space	(__NR_syscalls * 4)
43#endif /* DEBUG */
44
45#define C_ENTRY(name)	.globl name; .align 4; name
46
47/*
48 * Various ways of setting and clearing BIP in flags reg.
49 * This is mucky, but necessary using microblaze version that
50 * allows msr ops to write to BIP
51 */
52#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
53	.macro	clear_bip
54	msrclr	r0, MSR_BIP
55	.endm
56
57	.macro	set_bip
58	msrset	r0, MSR_BIP
59	.endm
60
61	.macro	clear_eip
62	msrclr	r0, MSR_EIP
63	.endm
64
65	.macro	set_ee
66	msrset	r0, MSR_EE
67	.endm
68
69	.macro	disable_irq
70	msrclr	r0, MSR_IE
71	.endm
72
73	.macro	enable_irq
74	msrset	r0, MSR_IE
75	.endm
76
77	.macro	set_ums
78	msrset	r0, MSR_UMS
79	msrclr	r0, MSR_VMS
80	.endm
81
82	.macro	set_vms
83	msrclr	r0, MSR_UMS
84	msrset	r0, MSR_VMS
85	.endm
86
87	.macro	clear_ums
88	msrclr	r0, MSR_UMS
89	.endm
90
91	.macro	clear_vms_ums
92	msrclr	r0, MSR_VMS | MSR_UMS
93	.endm
94#else
95	.macro	clear_bip
96	mfs	r11, rmsr
97	andi	r11, r11, ~MSR_BIP
98	mts	rmsr, r11
99	.endm
100
101	.macro	set_bip
102	mfs	r11, rmsr
103	ori	r11, r11, MSR_BIP
104	mts	rmsr, r11
105	.endm
106
107	.macro	clear_eip
108	mfs	r11, rmsr
109	andi	r11, r11, ~MSR_EIP
110	mts	rmsr, r11
111	.endm
112
113	.macro	set_ee
114	mfs	r11, rmsr
115	ori	r11, r11, MSR_EE
116	mts	rmsr, r11
117	.endm
118
119	.macro	disable_irq
120	mfs	r11, rmsr
121	andi	r11, r11, ~MSR_IE
122	mts	rmsr, r11
123	.endm
124
125	.macro	enable_irq
126	mfs	r11, rmsr
127	ori	r11, r11, MSR_IE
128	mts	rmsr, r11
129	.endm
130
131	.macro set_ums
132	mfs	r11, rmsr
133	ori	r11, r11, MSR_VMS
134	andni	r11, r11, MSR_UMS
135	mts	rmsr, r11
136	.endm
137
138	.macro	set_vms
139	mfs	r11, rmsr
140	ori	r11, r11, MSR_VMS
141	andni	r11, r11, MSR_UMS
142	mts	rmsr, r11
143	.endm
144
145	.macro	clear_ums
146	mfs	r11, rmsr
147	andni	r11, r11, MSR_UMS
148	mts	rmsr,r11
149	.endm
150
151	.macro	clear_vms_ums
152	mfs	r11, rmsr
153	andni	r11, r11, (MSR_VMS|MSR_UMS)
154	mts	rmsr,r11
155	.endm
156#endif
157
158/* Define how to call high-level functions. With MMU, virtual mode must be
159 * enabled when calling the high-level function. Clobbers R11.
160 * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL
161 */
162
163/* turn on virtual protected mode save */
164#define VM_ON		\
165	set_ums;	\
166	rted	r0, 2f;	\
167	nop; \
1682:
169
170/* turn off virtual protected mode save and user mode save*/
171#define VM_OFF			\
172	clear_vms_ums;		\
173	rted	r0, TOPHYS(1f);	\
174	nop; \
1751:
176
177#define SAVE_REGS \
178	swi	r2, r1, PT_R2;	/* Save SDA */			\
179	swi	r3, r1, PT_R3;					\
180	swi	r4, r1, PT_R4;					\
181	swi	r5, r1, PT_R5;					\
182	swi	r6, r1, PT_R6;					\
183	swi	r7, r1, PT_R7;					\
184	swi	r8, r1, PT_R8;					\
185	swi	r9, r1, PT_R9;					\
186	swi	r10, r1, PT_R10;					\
187	swi	r11, r1, PT_R11;	/* save clobbered regs after rval */\
188	swi	r12, r1, PT_R12;					\
189	swi	r13, r1, PT_R13;	/* Save SDA2 */			\
190	swi	r14, r1, PT_PC;	/* PC, before IRQ/trap */	\
191	swi	r15, r1, PT_R15;	/* Save LP */			\
192	swi	r16, r1, PT_R16;					\
193	swi	r17, r1, PT_R17;					\
194	swi	r18, r1, PT_R18;	/* Save asm scratch reg */	\
195	swi	r19, r1, PT_R19;					\
196	swi	r20, r1, PT_R20;					\
197	swi	r21, r1, PT_R21;					\
198	swi	r22, r1, PT_R22;					\
199	swi	r23, r1, PT_R23;					\
200	swi	r24, r1, PT_R24;					\
201	swi	r25, r1, PT_R25;					\
202	swi	r26, r1, PT_R26;					\
203	swi	r27, r1, PT_R27;					\
204	swi	r28, r1, PT_R28;					\
205	swi	r29, r1, PT_R29;					\
206	swi	r30, r1, PT_R30;					\
207	swi	r31, r1, PT_R31;	/* Save current task reg */	\
208	mfs	r11, rmsr;		/* save MSR */			\
209	swi	r11, r1, PT_MSR;
210
211#define RESTORE_REGS \
212	lwi	r11, r1, PT_MSR;					\
213	mts	rmsr , r11;						\
214	lwi	r2, r1, PT_R2;	/* restore SDA */		\
215	lwi	r3, r1, PT_R3;					\
216	lwi	r4, r1, PT_R4;					\
217	lwi	r5, r1, PT_R5;					\
218	lwi	r6, r1, PT_R6;					\
219	lwi	r7, r1, PT_R7;					\
220	lwi	r8, r1, PT_R8;					\
221	lwi	r9, r1, PT_R9;					\
222	lwi	r10, r1, PT_R10;					\
223	lwi	r11, r1, PT_R11;	/* restore clobbered regs after rval */\
224	lwi	r12, r1, PT_R12;					\
225	lwi	r13, r1, PT_R13;	/* restore SDA2 */		\
226	lwi	r14, r1, PT_PC;	/* RESTORE_LINK PC, before IRQ/trap */\
227	lwi	r15, r1, PT_R15;	/* restore LP */		\
228	lwi	r16, r1, PT_R16;					\
229	lwi	r17, r1, PT_R17;					\
230	lwi	r18, r1, PT_R18;	/* restore asm scratch reg */	\
231	lwi	r19, r1, PT_R19;					\
232	lwi	r20, r1, PT_R20;					\
233	lwi	r21, r1, PT_R21;					\
234	lwi	r22, r1, PT_R22;					\
235	lwi	r23, r1, PT_R23;					\
236	lwi	r24, r1, PT_R24;					\
237	lwi	r25, r1, PT_R25;					\
238	lwi	r26, r1, PT_R26;					\
239	lwi	r27, r1, PT_R27;					\
240	lwi	r28, r1, PT_R28;					\
241	lwi	r29, r1, PT_R29;					\
242	lwi	r30, r1, PT_R30;					\
243	lwi	r31, r1, PT_R31;	/* Restore cur task reg */
244
245#define SAVE_STATE	\
246	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */	\
247	/* See if already in kernel mode.*/				\
248	mfs	r1, rmsr;						\
249	andi	r1, r1, MSR_UMS;					\
250	bnei	r1, 1f;						\
251	/* Kernel-mode state save.  */					\
252	/* Reload kernel stack-ptr. */					\
253	lwi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP));			\
254	/* FIXME: I can add these two lines to one */			\
255	/* tophys(r1,r1); */						\
256	/* addik	r1, r1, -PT_SIZE; */				\
257	addik	r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
258	SAVE_REGS							\
259	brid	2f;							\
260	swi	r1, r1, PT_MODE; 	 				\
2611:	/* User-mode state save.  */					\
262	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
263	tophys(r1,r1);							\
264	lwi	r1, r1, TS_THREAD_INFO;	/* get the thread info */	\
265	/* MS these three instructions can be added to one */		\
266	/* addik	r1, r1, THREAD_SIZE; */				\
267	/* tophys(r1,r1); */						\
268	/* addik	r1, r1, -PT_SIZE; */			\
269	addik r1, r1, THREAD_SIZE + CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE; \
270	SAVE_REGS							\
271	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));			\
272	swi	r11, r1, PT_R1; /* Store user SP.  */		\
273	swi	r0, r1, PT_MODE; /* Was in user-mode.  */		\
274	/* MS: I am clearing UMS even in case when I come from kernel space */ \
275	clear_ums; 							\
2762:	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
277
278.text
279
280/*
281 * User trap.
282 *
283 * System calls are handled here.
284 *
285 * Syscall protocol:
286 * Syscall number in r12, args in r5-r10
287 * Return value in r3
288 *
289 * Trap entered via brki instruction, so BIP bit is set, and interrupts
290 * are masked. This is nice, means we don't have to CLI before state save
291 */
292C_ENTRY(_user_exception):
293	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
294	addi	r14, r14, 4	/* return address is 4 byte after call */
295
296	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
297	tophys(r1,r1);
298	lwi	r1, r1, TS_THREAD_INFO;	/* get stack from task_struct */
299/* calculate kernel stack pointer from task struct 8k */
300	addik	r1, r1, THREAD_SIZE;
301	tophys(r1,r1);
302
303	addik	r1, r1, -PT_SIZE; /* Make room on the stack.  */
304	SAVE_REGS
305	swi	r0, r1, PT_R3
306	swi	r0, r1, PT_R4
307
308	swi	r0, r1, PT_MODE;			/* Was in user-mode. */
309	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
310	swi	r11, r1, PT_R1;		/* Store user SP.  */
311	clear_ums;
3122:	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
313	/* Save away the syscall number.  */
314	swi	r12, r1, PT_R0;
315	tovirt(r1,r1)
316
317/* where the trap should return need -8 to adjust for rtsd r15, 8*/
318/* Jump to the appropriate function for the system call number in r12
319 * (r12 is not preserved), or return an error if r12 is not valid. The LP
320 * register should point to the location where
321 * the called function should return.  [note that MAKE_SYS_CALL uses label 1] */
322
323	/* Step into virtual mode */
324	rtbd	r0, 3f
325	nop
3263:
327	lwi	r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */
328	lwi	r11, r11, TI_FLAGS	 /* get flags in thread info */
329	andi	r11, r11, _TIF_WORK_SYSCALL_MASK
330	beqi	r11, 4f
331
332	addik	r3, r0, -ENOSYS
333	swi	r3, r1, PT_R3
334	brlid	r15, do_syscall_trace_enter
335	addik	r5, r1, PT_R0
336
337	# do_syscall_trace_enter returns the new syscall nr.
338	addk	r12, r0, r3
339	lwi	r5, r1, PT_R5;
340	lwi	r6, r1, PT_R6;
341	lwi	r7, r1, PT_R7;
342	lwi	r8, r1, PT_R8;
343	lwi	r9, r1, PT_R9;
344	lwi	r10, r1, PT_R10;
3454:
346/* Jump to the appropriate function for the system call number in r12
347 * (r12 is not preserved), or return an error if r12 is not valid.
348 * The LP register should point to the location where the called function
349 * should return.  [note that MAKE_SYS_CALL uses label 1] */
350	/* See if the system call number is valid */
351	addi	r11, r12, -__NR_syscalls;
352	bgei	r11,5f;
353	/* Figure out which function to use for this system call.  */
354	/* Note Microblaze barrel shift is optional, so don't rely on it */
355	add	r12, r12, r12;			/* convert num -> ptr */
356	add	r12, r12, r12;
357
358#ifdef DEBUG
359	/* Trac syscalls and stored them to syscall_debug_table */
360	/* The first syscall location stores total syscall number */
361	lwi	r3, r0, syscall_debug_table
362	addi	r3, r3, 1
363	swi	r3, r0, syscall_debug_table
364	lwi	r3, r12, syscall_debug_table
365	addi	r3, r3, 1
366	swi	r3, r12, syscall_debug_table
367#endif
368
369	# Find and jump into the syscall handler.
370	lwi	r12, r12, sys_call_table
371	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
372	addi	r15, r0, ret_from_trap-8
373	bra	r12
374
375	/* The syscall number is invalid, return an error.  */
3765:
377	rtsd	r15, 8;		/* looks like a normal subroutine return */
378	addi	r3, r0, -ENOSYS;
379
380/* Entry point used to return from a syscall/trap */
381/* We re-enable BIP bit before state restore */
382C_ENTRY(ret_from_trap):
383	swi	r3, r1, PT_R3
384	swi	r4, r1, PT_R4
385
386	lwi	r11, r1, PT_MODE;
387/* See if returning to kernel mode, if so, skip resched &c.  */
388	bnei	r11, 2f;
389	/* We're returning to user mode, so check for various conditions that
390	 * trigger rescheduling. */
391	/* FIXME: Restructure all these flag checks. */
392	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
393	lwi	r11, r11, TI_FLAGS;		/* get flags in thread info */
394	andi	r11, r11, _TIF_WORK_SYSCALL_MASK
395	beqi	r11, 1f
396
397	brlid	r15, do_syscall_trace_leave
398	addik	r5, r1, PT_R0
3991:
400	/* We're returning to user mode, so check for various conditions that
401	 * trigger rescheduling. */
402	/* get thread info from current task */
403	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
404	lwi	r11, r11, TI_FLAGS;		/* get flags in thread info */
405	andi	r11, r11, _TIF_NEED_RESCHED;
406	beqi	r11, 5f;
407
408	bralid	r15, schedule;	/* Call scheduler */
409	nop;				/* delay slot */
410
411	/* Maybe handle a signal */
4125:	/* get thread info from current task*/
413	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
414	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
415	andi	r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
416	beqi	r11, 1f;		/* Signals to handle, handle them */
417
418	addik	r5, r1, 0;		/* Arg 1: struct pt_regs *regs */
419	bralid	r15, do_notify_resume;	/* Handle any signals */
420	addi	r6, r0, 1;		/* Arg 2: int in_syscall */
421
422/* Finally, return to user state.  */
4231:	set_bip;			/*  Ints masked for state restore */
424	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
425	VM_OFF;
426	tophys(r1,r1);
427	RESTORE_REGS;
428	addik	r1, r1, PT_SIZE		/* Clean up stack space.  */
429	lwi	r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
430	bri	6f;
431
432/* Return to kernel state.  */
4332:	set_bip;			/*  Ints masked for state restore */
434	VM_OFF;
435	tophys(r1,r1);
436	RESTORE_REGS;
437	addik	r1, r1, PT_SIZE		/* Clean up stack space.  */
438	tovirt(r1,r1);
4396:
440TRAP_return:		/* Make global symbol for debugging */
441	rtbd	r14, 0;	/* Instructions to return from an IRQ */
442	nop;
443
444
445/* This the initial entry point for a new child thread, with an appropriate
446   stack in place that makes it look the the child is in the middle of an
447   syscall.  This function is actually `returned to' from switch_thread
448   (copy_thread makes ret_from_fork the return address in each new thread's
449   saved context).  */
450C_ENTRY(ret_from_fork):
451	bralid	r15, schedule_tail; /* ...which is schedule_tail's arg */
452	add	r5, r3, r0;	/* switch_thread returns the prev task */
453				/* ( in the delay slot ) */
454	brid	ret_from_trap;	/* Do normal trap return */
455	add	r3, r0, r0;	/* Child's fork call should return 0. */
456
457C_ENTRY(ret_from_kernel_thread):
458	bralid	r15, schedule_tail; /* ...which is schedule_tail's arg */
459	add	r5, r3, r0;	/* switch_thread returns the prev task */
460				/* ( in the delay slot ) */
461	brald	r15, r20	/* fn was left in r20 */
462	addk	r5, r0, r19	/* ... and argument - in r19 */
463	brid	ret_from_trap
464	add	r3, r0, r0
465
466C_ENTRY(sys_rt_sigreturn_wrapper):
467	brid	sys_rt_sigreturn	/* Do real work */
468	addik	r5, r1, 0;		/* add user context as 1st arg */
469
470/*
471 * HW EXCEPTION rutine start
472 */
473C_ENTRY(full_exception_trap):
474	/* adjust exception address for privileged instruction
475	 * for finding where is it */
476	addik	r17, r17, -4
477	SAVE_STATE /* Save registers */
478	/* PC, before IRQ/trap - this is one instruction above */
479	swi	r17, r1, PT_PC;
480	tovirt(r1,r1)
481	/* FIXME this can be store directly in PT_ESR reg.
482	 * I tested it but there is a fault */
483	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
484	addik	r15, r0, ret_from_exc - 8
485	mfs	r6, resr
486	mfs	r7, rfsr;		/* save FSR */
487	mts	rfsr, r0;	/* Clear sticky fsr */
488	rted	r0, full_exception
489	addik	r5, r1, 0		 /* parameter struct pt_regs * regs */
490
491/*
492 * Unaligned data trap.
493 *
494 * Unaligned data trap last on 4k page is handled here.
495 *
496 * Trap entered via exception, so EE bit is set, and interrupts
497 * are masked.  This is nice, means we don't have to CLI before state save
498 *
499 * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S"
500 */
501C_ENTRY(unaligned_data_trap):
502	/* MS: I have to save r11 value and then restore it because
503	 * set_bit, clear_eip, set_ee use r11 as temp register if MSR
504	 * instructions are not used. We don't need to do if MSR instructions
505	 * are used and they use r0 instead of r11.
506	 * I am using ENTRY_SP which should be primary used only for stack
507	 * pointer saving. */
508	swi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
509	set_bip;        /* equalize initial state for all possible entries */
510	clear_eip;
511	set_ee;
512	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
513	SAVE_STATE		/* Save registers.*/
514	/* PC, before IRQ/trap - this is one instruction above */
515	swi	r17, r1, PT_PC;
516	tovirt(r1,r1)
517	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
518	addik	r15, r0, ret_from_exc-8
519	mfs	r3, resr		/* ESR */
520	mfs	r4, rear		/* EAR */
521	rtbd	r0, _unaligned_data_exception
522	addik	r7, r1, 0		/* parameter struct pt_regs * regs */
523
524/*
525 * Page fault traps.
526 *
527 * If the real exception handler (from hw_exception_handler.S) didn't find
528 * the mapping for the process, then we're thrown here to handle such situation.
529 *
530 * Trap entered via exceptions, so EE bit is set, and interrupts
531 * are masked.  This is nice, means we don't have to CLI before state save
532 *
533 * Build a standard exception frame for TLB Access errors.  All TLB exceptions
534 * will bail out to this point if they can't resolve the lightweight TLB fault.
535 *
536 * The C function called is in "arch/microblaze/mm/fault.c", declared as:
537 * void do_page_fault(struct pt_regs *regs,
538 *				unsigned long address,
539 *				unsigned long error_code)
540 */
541/* data and intruction trap - which is choose is resolved int fault.c */
542C_ENTRY(page_fault_data_trap):
543	SAVE_STATE		/* Save registers.*/
544	/* PC, before IRQ/trap - this is one instruction above */
545	swi	r17, r1, PT_PC;
546	tovirt(r1,r1)
547	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
548	addik	r15, r0, ret_from_exc-8
549	mfs	r6, rear		/* parameter unsigned long address */
550	mfs	r7, resr		/* parameter unsigned long error_code */
551	rted	r0, do_page_fault
552	addik	r5, r1, 0		/* parameter struct pt_regs * regs */
553
554C_ENTRY(page_fault_instr_trap):
555	SAVE_STATE		/* Save registers.*/
556	/* PC, before IRQ/trap - this is one instruction above */
557	swi	r17, r1, PT_PC;
558	tovirt(r1,r1)
559	/* where the trap should return need -8 to adjust for rtsd r15, 8 */
560	addik	r15, r0, ret_from_exc-8
561	mfs	r6, rear		/* parameter unsigned long address */
562	ori	r7, r0, 0		/* parameter unsigned long error_code */
563	rted	r0, do_page_fault
564	addik	r5, r1, 0		/* parameter struct pt_regs * regs */
565
566/* Entry point used to return from an exception.  */
567C_ENTRY(ret_from_exc):
568	lwi	r11, r1, PT_MODE;
569	bnei	r11, 2f;		/* See if returning to kernel mode, */
570					/* ... if so, skip resched &c.  */
571
572	/* We're returning to user mode, so check for various conditions that
573	   trigger rescheduling. */
574	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
575	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
576	andi	r11, r11, _TIF_NEED_RESCHED;
577	beqi	r11, 5f;
578
579/* Call the scheduler before returning from a syscall/trap. */
580	bralid	r15, schedule;	/* Call scheduler */
581	nop;				/* delay slot */
582
583	/* Maybe handle a signal */
5845:	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
585	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
586	andi	r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
587	beqi	r11, 1f;		/* Signals to handle, handle them */
588
589	/*
590	 * Handle a signal return; Pending signals should be in r18.
591	 *
592	 * Not all registers are saved by the normal trap/interrupt entry
593	 * points (for instance, call-saved registers (because the normal
594	 * C-compiler calling sequence in the kernel makes sure they're
595	 * preserved), and call-clobbered registers in the case of
596	 * traps), but signal handlers may want to examine or change the
597	 * complete register state.  Here we save anything not saved by
598	 * the normal entry sequence, so that it may be safely restored
599	 * (in a possibly modified form) after do_notify_resume returns. */
600	addik	r5, r1, 0;		/* Arg 1: struct pt_regs *regs */
601	bralid	r15, do_notify_resume;	/* Handle any signals */
602	addi	r6, r0, 0;		/* Arg 2: int in_syscall */
603
604/* Finally, return to user state.  */
6051:	set_bip;			/* Ints masked for state restore */
606	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
607	VM_OFF;
608	tophys(r1,r1);
609
610	RESTORE_REGS;
611	addik	r1, r1, PT_SIZE		/* Clean up stack space.  */
612
613	lwi	r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
614	bri	6f;
615/* Return to kernel state.  */
6162:	set_bip;			/* Ints masked for state restore */
617	VM_OFF;
618	tophys(r1,r1);
619	RESTORE_REGS;
620	addik	r1, r1, PT_SIZE		/* Clean up stack space.  */
621
622	tovirt(r1,r1);
6236:
624EXC_return:		/* Make global symbol for debugging */
625	rtbd	r14, 0;	/* Instructions to return from an IRQ */
626	nop;
627
628/*
629 * HW EXCEPTION rutine end
630 */
631
632/*
633 * Hardware maskable interrupts.
634 *
635 * The stack-pointer (r1) should have already been saved to the memory
636 * location PER_CPU(ENTRY_SP).
637 */
638C_ENTRY(_interrupt):
639/* MS: we are in physical address */
640/* Save registers, switch to proper stack, convert SP to virtual.*/
641	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
642	/* MS: See if already in kernel mode. */
643	mfs	r1, rmsr
644	nop
645	andi	r1, r1, MSR_UMS
646	bnei	r1, 1f
647
648/* Kernel-mode state save. */
649	lwi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
650	tophys(r1,r1); /* MS: I have in r1 physical address where stack is */
651	/* save registers */
652/* MS: Make room on the stack -> activation record */
653	addik	r1, r1, -PT_SIZE;
654	SAVE_REGS
655	brid	2f;
656	swi	r1, r1, PT_MODE; /* 0 - user mode, 1 - kernel mode */
6571:
658/* User-mode state save. */
659 /* MS: get the saved current */
660	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
661	tophys(r1,r1);
662	lwi	r1, r1, TS_THREAD_INFO;
663	addik	r1, r1, THREAD_SIZE;
664	tophys(r1,r1);
665	/* save registers */
666	addik	r1, r1, -PT_SIZE;
667	SAVE_REGS
668	/* calculate mode */
669	swi	r0, r1, PT_MODE;
670	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
671	swi	r11, r1, PT_R1;
672	clear_ums;
6732:
674	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
675	tovirt(r1,r1)
676	addik	r15, r0, irq_call;
677irq_call:rtbd	r0, do_IRQ;
678	addik	r5, r1, 0;
679
680/* MS: we are in virtual mode */
681ret_from_irq:
682	lwi	r11, r1, PT_MODE;
683	bnei	r11, 2f;
684
685	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
686	lwi	r11, r11, TI_FLAGS; /* MS: get flags from thread info */
687	andi	r11, r11, _TIF_NEED_RESCHED;
688	beqi	r11, 5f
689	bralid	r15, schedule;
690	nop; /* delay slot */
691
692    /* Maybe handle a signal */
6935:	lwi	r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */
694	lwi	r11, r11, TI_FLAGS; /* get flags in thread info */
695	andi	r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
696	beqid	r11, no_intr_resched
697/* Handle a signal return; Pending signals should be in r18. */
698	addik	r5, r1, 0; /* Arg 1: struct pt_regs *regs */
699	bralid	r15, do_notify_resume;	/* Handle any signals */
700	addi	r6, r0, 0; /* Arg 2: int in_syscall */
701
702/* Finally, return to user state. */
703no_intr_resched:
704    /* Disable interrupts, we are now committed to the state restore */
705	disable_irq
706	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE);
707	VM_OFF;
708	tophys(r1,r1);
709	RESTORE_REGS
710	addik	r1, r1, PT_SIZE /* MS: Clean up stack space. */
711	lwi	r1, r1, PT_R1 - PT_SIZE;
712	bri	6f;
713/* MS: Return to kernel state. */
7142:
715#ifdef CONFIG_PREEMPT
716	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;
717	/* MS: get preempt_count from thread info */
718	lwi	r5, r11, TI_PREEMPT_COUNT;
719	bgti	r5, restore;
720
721	lwi	r5, r11, TI_FLAGS;		/* get flags in thread info */
722	andi	r5, r5, _TIF_NEED_RESCHED;
723	beqi	r5, restore /* if zero jump over */
724
725preempt:
726	/* interrupts are off that's why I am calling preempt_chedule_irq */
727	bralid	r15, preempt_schedule_irq
728	nop
729	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
730	lwi	r5, r11, TI_FLAGS;		/* get flags in thread info */
731	andi	r5, r5, _TIF_NEED_RESCHED;
732	bnei	r5, preempt /* if non zero jump to resched */
733restore:
734#endif
735	VM_OFF /* MS: turn off MMU */
736	tophys(r1,r1)
737	RESTORE_REGS
738	addik	r1, r1, PT_SIZE	/* MS: Clean up stack space. */
739	tovirt(r1,r1);
7406:
741IRQ_return: /* MS: Make global symbol for debugging */
742	rtid	r14, 0
743	nop
744
745/*
746 * Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18
747 * and call handling function with saved pt_regs
748 */
749C_ENTRY(_debug_exception):
750	/* BIP bit is set on entry, no interrupts can occur */
751	swi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
752
753	mfs	r1, rmsr
754	nop
755	andi	r1, r1, MSR_UMS
756	bnei	r1, 1f
757/* MS: Kernel-mode state save - kgdb */
758	lwi	r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
759
760	/* BIP bit is set on entry, no interrupts can occur */
761	addik   r1, r1, CONFIG_KERNEL_BASE_ADDR - CONFIG_KERNEL_START - PT_SIZE;
762	SAVE_REGS;
763	/* save all regs to pt_reg structure */
764	swi	r0, r1, PT_R0;	/* R0 must be saved too */
765	swi	r14, r1, PT_R14	/* rewrite saved R14 value */
766	swi	r16, r1, PT_PC; /* PC and r16 are the same */
767	/* save special purpose registers to pt_regs */
768	mfs	r11, rear;
769	swi	r11, r1, PT_EAR;
770	mfs	r11, resr;
771	swi	r11, r1, PT_ESR;
772	mfs	r11, rfsr;
773	swi	r11, r1, PT_FSR;
774
775	/* stack pointer is in physical address at it is decrease
776	 * by PT_SIZE but we need to get correct R1 value */
777	addik   r11, r1, CONFIG_KERNEL_START - CONFIG_KERNEL_BASE_ADDR + PT_SIZE;
778	swi	r11, r1, PT_R1
779	/* MS: r31 - current pointer isn't changed */
780	tovirt(r1,r1)
781#ifdef CONFIG_KGDB
782	addi	r5, r1, 0 /* pass pt_reg address as the first arg */
783	addik	r15, r0, dbtrap_call; /* return address */
784	rtbd	r0, microblaze_kgdb_break
785	nop;
786#endif
787	/* MS: Place handler for brki from kernel space if KGDB is OFF.
788	 * It is very unlikely that another brki instruction is called. */
789	bri 0
790
791/* MS: User-mode state save - gdb */
7921:	lwi	r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
793	tophys(r1,r1);
794	lwi	r1, r1, TS_THREAD_INFO;	/* get the thread info */
795	addik	r1, r1, THREAD_SIZE;	/* calculate kernel stack pointer */
796	tophys(r1,r1);
797
798	addik	r1, r1, -PT_SIZE; /* Make room on the stack.  */
799	SAVE_REGS;
800	swi	r16, r1, PT_PC;	/* Save LP */
801	swi	r0, r1, PT_MODE; /* Was in user-mode.  */
802	lwi	r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
803	swi	r11, r1, PT_R1; /* Store user SP.  */
804	lwi	CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
805	tovirt(r1,r1)
806	set_vms;
807	addik	r5, r1, 0;
808	addik	r15, r0, dbtrap_call;
809dbtrap_call: /* Return point for kernel/user entry + 8 because of rtsd r15, 8 */
810	rtbd	r0, sw_exception
811	nop
812
813	/* MS: The first instruction for the second part of the gdb/kgdb */
814	set_bip; /* Ints masked for state restore */
815	lwi	r11, r1, PT_MODE;
816	bnei	r11, 2f;
817/* MS: Return to user space - gdb */
818	/* Get current task ptr into r11 */
819	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
820	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
821	andi	r11, r11, _TIF_NEED_RESCHED;
822	beqi	r11, 5f;
823
824	/* Call the scheduler before returning from a syscall/trap. */
825	bralid	r15, schedule;	/* Call scheduler */
826	nop;				/* delay slot */
827
828	/* Maybe handle a signal */
8295:	lwi	r11, CURRENT_TASK, TS_THREAD_INFO;	/* get thread info */
830	lwi	r11, r11, TI_FLAGS;	/* get flags in thread info */
831	andi	r11, r11, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
832	beqi	r11, 1f;		/* Signals to handle, handle them */
833
834	addik	r5, r1, 0;		/* Arg 1: struct pt_regs *regs */
835	bralid	r15, do_notify_resume;	/* Handle any signals */
836	addi  r6, r0, 0;	/* Arg 2: int in_syscall */
837
838/* Finally, return to user state.  */
8391:	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
840	VM_OFF;
841	tophys(r1,r1);
842	/* MS: Restore all regs */
843	RESTORE_REGS
844	addik	r1, r1, PT_SIZE	 /* Clean up stack space */
845	lwi	r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer */
846DBTRAP_return_user: /* MS: Make global symbol for debugging */
847	rtbd	r16, 0; /* MS: Instructions to return from a debug trap */
848	nop;
849
850/* MS: Return to kernel state - kgdb */
8512:	VM_OFF;
852	tophys(r1,r1);
853	/* MS: Restore all regs */
854	RESTORE_REGS
855	lwi	r14, r1, PT_R14;
856	lwi	r16, r1, PT_PC;
857	addik	r1, r1, PT_SIZE; /* MS: Clean up stack space */
858	tovirt(r1,r1);
859DBTRAP_return_kernel: /* MS: Make global symbol for debugging */
860	rtbd	r16, 0; /* MS: Instructions to return from a debug trap */
861	nop;
862
863
864ENTRY(_switch_to)
865	/* prepare return value */
866	addk	r3, r0, CURRENT_TASK
867
868	/* save registers in cpu_context */
869	/* use r11 and r12, volatile registers, as temp register */
870	/* give start of cpu_context for previous process */
871	addik	r11, r5, TI_CPU_CONTEXT
872	swi	r1, r11, CC_R1
873	swi	r2, r11, CC_R2
874	/* skip volatile registers.
875	 * they are saved on stack when we jumped to _switch_to() */
876	/* dedicated registers */
877	swi	r13, r11, CC_R13
878	swi	r14, r11, CC_R14
879	swi	r15, r11, CC_R15
880	swi	r16, r11, CC_R16
881	swi	r17, r11, CC_R17
882	swi	r18, r11, CC_R18
883	/* save non-volatile registers */
884	swi	r19, r11, CC_R19
885	swi	r20, r11, CC_R20
886	swi	r21, r11, CC_R21
887	swi	r22, r11, CC_R22
888	swi	r23, r11, CC_R23
889	swi	r24, r11, CC_R24
890	swi	r25, r11, CC_R25
891	swi	r26, r11, CC_R26
892	swi	r27, r11, CC_R27
893	swi	r28, r11, CC_R28
894	swi	r29, r11, CC_R29
895	swi	r30, r11, CC_R30
896	/* special purpose registers */
897	mfs	r12, rmsr
898	swi	r12, r11, CC_MSR
899	mfs	r12, rear
900	swi	r12, r11, CC_EAR
901	mfs	r12, resr
902	swi	r12, r11, CC_ESR
903	mfs	r12, rfsr
904	swi	r12, r11, CC_FSR
905
906	/* update r31, the current-give me pointer to task which will be next */
907	lwi	CURRENT_TASK, r6, TI_TASK
908	/* stored it to current_save too */
909	swi	CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE)
910
911	/* get new process' cpu context and restore */
912	/* give me start where start context of next task */
913	addik	r11, r6, TI_CPU_CONTEXT
914
915	/* non-volatile registers */
916	lwi	r30, r11, CC_R30
917	lwi	r29, r11, CC_R29
918	lwi	r28, r11, CC_R28
919	lwi	r27, r11, CC_R27
920	lwi	r26, r11, CC_R26
921	lwi	r25, r11, CC_R25
922	lwi	r24, r11, CC_R24
923	lwi	r23, r11, CC_R23
924	lwi	r22, r11, CC_R22
925	lwi	r21, r11, CC_R21
926	lwi	r20, r11, CC_R20
927	lwi	r19, r11, CC_R19
928	/* dedicated registers */
929	lwi	r18, r11, CC_R18
930	lwi	r17, r11, CC_R17
931	lwi	r16, r11, CC_R16
932	lwi	r15, r11, CC_R15
933	lwi	r14, r11, CC_R14
934	lwi	r13, r11, CC_R13
935	/* skip volatile registers */
936	lwi	r2, r11, CC_R2
937	lwi	r1, r11, CC_R1
938
939	/* special purpose registers */
940	lwi	r12, r11, CC_FSR
941	mts	rfsr, r12
942	lwi	r12, r11, CC_MSR
943	mts	rmsr, r12
944
945	rtsd	r15, 8
946	nop
947
948ENTRY(_reset)
949	brai	0; /* Jump to reset vector */
950
951	/* These are compiled and loaded into high memory, then
952	 * copied into place in mach_early_setup */
953	.section	.init.ivt, "ax"
954#if CONFIG_MANUAL_RESET_VECTOR
955	.org	0x0
956	brai	CONFIG_MANUAL_RESET_VECTOR
957#endif
958	.org	0x8
959	brai	TOPHYS(_user_exception); /* syscall handler */
960	.org	0x10
961	brai	TOPHYS(_interrupt);	/* Interrupt handler */
962	.org	0x18
963	brai	TOPHYS(_debug_exception);	/* debug trap handler */
964	.org	0x20
965	brai	TOPHYS(_hw_exception_handler);	/* HW exception handler */
966
967.section .rodata,"a"
968#include "syscall_table.S"
969
970syscall_table_size=(.-sys_call_table)
971
972type_SYSCALL:
973	.ascii "SYSCALL\0"
974type_IRQ:
975	.ascii "IRQ\0"
976type_IRQ_PREEMPT:
977	.ascii "IRQ (PREEMPTED)\0"
978type_SYSCALL_PREEMPT:
979	.ascii " SYSCALL (PREEMPTED)\0"
980
981	/*
982	 * Trap decoding for stack unwinder
983	 * Tuples are (start addr, end addr, string)
984	 * If return address lies on [start addr, end addr],
985	 * unwinder displays 'string'
986	 */
987
988	.align 4
989.global microblaze_trap_handlers
990microblaze_trap_handlers:
991	/* Exact matches come first */
992	.word ret_from_trap; .word ret_from_trap   ; .word type_SYSCALL
993	.word ret_from_irq ; .word ret_from_irq    ; .word type_IRQ
994	/* Fuzzy matches go here */
995	.word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT
996	.word ret_from_trap; .word TRAP_return     ; .word type_SYSCALL_PREEMPT
997	/* End of table */
998	.word 0               ; .word 0               ; .word 0
999